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| TDA7492MV 50 W mono BTL class-D audio amplifier Features 50 W continuous output power: RL = 6 , THD = 10% at VCC = 25 V 40 W continuous output power: RL = 8 , THD = 10% at VCC = 25 V Wide range single supply operation (10 - 26 V) High efficiency ( = 90%) Four selectable, fixed gain settings of nominally 21.6 dB, 27.6 dB, 31.1 dB and 33.6 dB Differential inputs minimize common-mode noise Standby and mute features Short-circuit protection Thermal-overload protection Externally synchronizable PowerSSO-36 with exposed pad down Description The TDA7492MV is a mono BTL class-D audio amplifier with single power supply designed for home systems and docking stations. Thanks to the high efficiency and an exposed-pad-down (EPD) package no heatsink is required. Table 1. Device summary Operating temp. range 0 to 70 C 0 to 70 C Package PowerSSO-36 EPD PowerSSO-36 EPD Tube Tape and reel Packaging Order code www..com TDA7492MV TDA7492MV13TR October 2009 Doc ID 16264 Rev 1 1/26 www.st.com 26 Contents TDA7492MV Contents 1 2 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 2.2 Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 3.2 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 4.2 4.3 For 6- load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 For 8- load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 6.2 Applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5.1 6.5.2 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 www..com 6.3 6.4 6.5 6.6 6.7 6.8 Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2/26 Doc ID 16264 Rev 1 TDA7492MV List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 PowerSSO-36 EPD dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 www..com Doc ID 16264 Rev 1 3/26 List of figures TDA7492MV List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection (top view, PCB view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 THD vs output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 THD vs output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 THD vs frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 THD vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output power vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 THD vs output power (1 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 THD vs output power (100 Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 THD vs frequency (100 mW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 THD vs frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 FFT (0 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 FFT (-60 dB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Test board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 PowerSSO-36 EPD outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Applications circuit for class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on/off sequence for minimizing speaker "pop" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Typical LC filter for a 8- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Typical LC filter for a 4- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 www..com 4/26 Doc ID 16264 Rev 1 TDA7492MV Device block diagram 1 Device block diagram Figure 1 shows the block diagram of the TDA7492MV. Figure 1. Internal block diagram www..com Doc ID 16264 Rev 1 5/26 Pin description TDA7492MV 2 2.1 Pin description Pin out Figure 2. Pin connection (top view, PCB view) SUB_GND NC NC NC NC NC NC NC NC OUTN OUTN PVCC PVCC PGND PGND OUTP OUTP PGND www..com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 EP, exposed pad down Connect to ground 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 VSS SVCC VREF SGND2 VDDS2 GAIN1 GAIN0 SVR DIAG SGND VDDS SYNCLK ROSC INN INP MUTE STBY VDDPW 6/26 Doc ID 16264 Rev 1 TDA7492MV Pin description 2.2 Pin list Table 2. Number 1 2,3 4,5 6,7 8,9 10,11 12,13 14,15 16,17 18 19 20 21 22 23 24 25 26 27 Pin description list Name SUB_GND NC NC NC NC OUTN PVCC PGND OUTP PGND VDDPW STBY MUTE INP INN ROSC SYNCLCK VDDS SGND DIAG SVR GAIN0 GAIN1 VDDS2 SGND2 VREF SVCC VSS EP Type POWER OUT POWER POWER OUT POWER OUT INPUT INPUT INPUT INPUT OUT IN/OUT OUT POWER OUT OUT INPUT INPUT INPUT INPUT OUT POWER OUT Connect to the frame No internal connection No internal connection No internal connection No internal connection Negative PWM output Power supply for output channel Power ground for output channel Positive PWM output Power supply ground 3.3-V (nominal) regulator output referred to ground for power stage Standby mode control Mute mode control Positive differential input Negative differential input Master oscillator frequency-setting pin Clock in/out for external oscillator 3.3-V (nominal) regulator output referred to ground for signal blocks Signal ground Open-drain diagnostic output Supply voltage rejection Gain setting input 1 Gain setting input 2 To be connected to VDDS (pin 26) To be connected to SGND (pin 27) Half VDDS (nominal) referred to ground Signal power supply 3.3-V (nominal) regulator output referred to power supply Exposed pad for ground-plane heatsink, to be connected to ground Description www..com 28 29 30 31 32 33 34 35 36 - Doc ID 16264 Rev 1 7/26 Electrical specifications TDA7492MV 3 3.1 Electrical specifications Absolute maximum ratings Table 3. Symbol VCC VI Top Tj Tstg Absolute maximum ratings Parameter DC supply voltage for pins PVCC, SVCC Voltage limits for input pins STBY, MUTE, INN, INP, GAIN0, GAIN1 Operating temperature Junction temperature Storage temperature 30 -0.3 - 3.6 0 to 70 -40 to 150 -40 to 150 Value Unit V V C C C 3.2 Thermal data Table 4. Symbol Rth j-case Thermal data Parameter Thermal resistance, junction to case Min Typ 2 Max 3 Unit C/W 3.3 Electrical specifications Unless otherwise stated, the results in Table 5 below are given for the conditions: VCC = 25 V, RL (load) = 8 , ROSC = R3 = 39 k, C8 = 100 nF, f = 1 kHz, GV = 21.6 dB and Tamb = 25 C. Table 5. Electrical specifications Parameter Supply voltage for pins PVCCA, PVCCB, SVCC Total quiescent current Quiescent current in standby Output offset voltage Mute mode Overcurrent protection threshold RL = 0 Junction temperature at thermal shutdown Input resistance Differential input -60 4.8 48 28 6.0 150 60 29 60 A C k V Without LC Play mode VOS IOCP Tj Ri VOVP Condition Min 10 -100 26 2.5 Typ Max 26 35 5.0 100 mV Unit V mA A www..com Symbol VCC Iq IqSTBY Overvoltage protection threshold - 8/26 Doc ID 16264 Rev 1 TDA7492MV Table 5. Symbol VUVP RdsON Electrical specifications Electrical specifications (continued) Parameter Undervoltage protection threshold Power transistor on resistance Low side THD = 10% Po Output power THD = 1% RL = 6 , THD = 10%, VCC = 25V RL = 6 , THD = 1% VCC = 25V Po =40W, THD = 10% Po = 40 W Po = 1 W GAIN0 = L, GAIN1 = L GAIN0 = L, GAIN1 = H GV Closed-loop gain GAIN0 = H, GAIN1 = L GAIN0 = H, GAIN1 = H GV eN Gain matching Total input noise A Curve, GV = 20 dB f = 22 Hz to 22 kHz SVRR Tr, Tf Supply voltage rejection ratio Rise and fall times Switching frequency Output switching frequency range Digital input high (H) Digital input low (L) Mute attenuation VMUTE = 1 V 60 80 0.8 dB fr = 100 Hz, Vr = 0.5 V, CSVR = 10 F Internal oscillator With internal oscillator (1) Condition High side - Min - Typ Max 7 - Unit V 0.2 0.2 40 32 50 40 4.0 90 0.1 21.6 27.6 31.1 33.6 20 25 50 50 310 - W W 0.4 22.6 28.6 dB 30.1 32.6 -1 40 290 250 32.1 34.6 1 V 35 330 400 kHz 400 V dB ns kHz dB W % % Po Output power PD THD Dissipated power Efficiency Total harmonic distortion 80 20.6 26.6 www..com fSW fSWR VinH VinL AMUTE With external oscillator (2) 250 2.3 1. fSW = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 k (see Figure 21.). 2. fSW = fSYNCLK / 2 with the frequency of the external oscillator. Doc ID 16264 Rev 1 9/26 Characterization curves TDA7492MV 4 Characterization curves The following characterization curves were made using the TDA7492MV exposed-pad-down test board with VCC = 25 V, a signal frequency of 1 kHz and an output power of 1 W unless otherwise specified. The LC filter for the 8- load uses components of 33 H and 220 nF and for the 6- load 22 H and 220 nF. 4.1 For 6- load Figure 3. Output power vs supply voltage 52 48 44 Output Power (W) 40 36 32 28 24 20 16 12 15 16 17 18 THD = 10% THD = 1% 19 20 21 22 23 24 25 Supply Voltage (V) Figure 4. THD vs output power (1 THD vs. Output Power kHz) THD (%) 10 5 www..com 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 200m 500m 1 2 5 10 20 60 Output Power (W) 10/26 Doc ID 16264 Rev 1 TDA7492MV Figure 5. THD vs output powerTHD vs. Output Power (100 Hz) THD (%) 10 5 Characterization curves 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 200m 500m 1 2 5 10 20 60 Output Power (W) Figure 6. THD vs frequency (100 mW) THD (%) 0.5 0.4 0.3 0.2 THD vs. Frequency 0.1 0.08 0.06 0.05 0.04 0.03 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) www..com Figure 7. THD vs frequency THD (%) 0.5 0.4 0.3 0.2 THD vs. Frequency 0.1 0.08 0.06 0.05 0.04 0.03 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Doc ID 16264 Rev 1 11/26 Characterization curves Figure 8. Frequency response Ampl (dB) +2 TDA7492MV q y p +1 -0 -1 -2 -3 -4 -5 10 20 50 100 200 500 1k 2k 5k 10k 30k Frequency (Hz) Figure 9. FFT (0 dB) FFT (dB) +10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 FFT (0 dB) 500 1k 2k 5k 10k 20k Frequency (Hz) www..com Figure 10. FFT (-60 dB) FFT (dB) +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 FFT ( 60 dB) 500 1k 2k 5k 10k 20k Frequency (Hz) 12/26 Doc ID 16264 Rev 1 TDA7492MV Characterization curves 4.2 For 8- load Figure 11. Output power vs supply voltage 42 38 O put Pow ( W ut er ) 34 30 26 22 18 14 10 15 16 17 18 19 20 21 22 Suppl y Vol t age ( V) 23 24 25 THD = 1% THD = 10% Figure 12. THD vs output power (1 kHz) THD (%) 10 5 THD vs. Output Power 2 1 0.5 0.2 0.1 0.05 0.02 0.01 www..com 0.005 100m 200m 500m 1 2 5 10 20 60 Output Power (W) Doc ID 16264 Rev 1 13/26 Characterization curves Figure 13. THD vs output power (100 Hz) THD (%) 10 5 TDA7492MV THD vs. Output Power 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 100m 200m 500m 1 2 5 10 20 60 Output Power (W) Figure 14. THD vs frequency (100 mW) vs. Frequency THD THD (%) 0.5 0.4 0.3 0.2 0.1 0.08 0.06 0.05 0.04 0.03 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) www..com Figure 15. THD vs frequency THD (%) 0.5 0.4 0.3 0.2 THD vs. Frequency 0.1 0.08 0.06 0.05 0.04 0.03 0.02 0.01 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) 14/26 Doc ID 16264 Rev 1 TDA7492MV Figure 16. Frequency response Ampl (dB) +2 Characterization curves Frequency Response +1 -0 -1 r -2 -3 -4 -5 10 20 50 100 200 500 1k 2k 5k 10k 30k Frequency (Hz) Figure 17. FFT (0 dB) FFT (dB) +10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 FFT (0 dB) 500 1k 2k 5k 10k 20k Frequency (Hz) www..com Figure 18. FFT (-60 dB) FFT (dB) +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 FFT (-60 dB) 500 1k 2k 5k 10k 20k Frequency (Hz) Doc ID 16264 Rev 1 15/26 Characterization curves TDA7492MV 4.3 Test board Figure 19. Test board layout www..com 16/26 Doc ID 16264 Rev 1 TDA7492MV Package mechanical data 5 Package mechanical data The TDA7492MV comes in a 36-pin PowerSSO package with exposed pad down. Figure 20 below shows the package outline and Table 6 gives the dimensions. Figure 20. PowerSSO-36 EPD outline drawing www..com h x 45 Doc ID 16264 Rev 1 17/26 Package mechanical data Table 6. Symbol Min A A2 a1 b c D E e e3 F G H h k L M N O Q S T www..com TDA7492MV PowerSSO-36 EPD dimensions Dimensions in mm Typ 0.5 8.5 2.3 4.30 1.20 0.80 2.90 3.65 1.00 2.47 2.40 0.10 0.36 0.32 10.50 7.60 0.10 10.50 0.40 8 degrees 1.00 10 degrees 4.70 7.10 Max Min 0.085 0.085 0.000 0.007 0.009 0.398 0.291 0.398 0 0.024 0.161 0.256 0.020 0.335 0.091 0.169 0.047 0.031 0.114 0.144 0.039 Dimensions in inches Typ Max 0.097 0.094 0.004 0.014 0.013 0.413 0.299 0.004 0.413 0.016 8 degrees 0.039 10 degrees 0.185 0.280 2.15 2.15 0.00 0.18 0.23 10.10 7.40 10.10 0 0.60 4.10 6.50 U X Y In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 18/26 Doc ID 16264 Rev 1 TDA7492MV Applications information 6 6.1 Applications information Applications circuit Figure 21. Applications circuit for class-D amplifier TDA7492MV www..com Doc ID 16264 Rev 1 19/26 Applications information TDA7492MV 6.2 Mode selection The three operating modes of the TDA7492MV are set by the two inputs STBY (pin 20) and MUTE (pin 21). Standby mode: all circuits are turned off, very low current consumption. Mute mode: inputs are connected to ground and the positive and negative PWM outputs are at 50% duty cycle. Play mode: the amplifiers are active. The protection functions of the TDA7492MV are realized by pulling down the voltages of the STBY and MUTE inputs shown in Figure 22. The input current of the corresponding pins must be limited to 200 A. Table 7. Mode settings STBY L (1) H H (1) Mode Selection Standby Mute Play MUTE X (don't care) L H 1. Drive levels defined in Table 5: Electrical specifications on page 8 Figure 22. Standby and mute circuits Standby 3.3 V 0V R2 30 k C7 2.2 F STBY TDA7492MV MUTE Mute 3.3 V 0V R4 30 k C15 2.2 F Figure 23. Turn-on/off sequence for minimizing speaker "pop" www..com 20/26 Doc ID 16264 Rev 1 TDA7492MV Applications information 6.3 Gain setting The gain of the TDA7492MV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31). Internally, the gain is set by changing the feedback resistors of the amplifier. Table 8. Gain settings GAIN0 L L H H L H L H GAIN1 21.6 27.6 31.1 33.6 Nominal gain, Gv (dB) 6.4 Input resistance and capacitance The input impedance is set by an internal resistor Ri = 60 k (typical). An input capacitor (Ci) is required to couple the AC input signal. The equivalent circuit and frequency response of the input components are shown in Figure 24. For Ci = 470 nF the high-pass filter cut-off frequency is below 20 Hz: fc = 1 / (2 * * Ri * Ci) Figure 24. Device input circuit and frequency response Rf Input signal www..com Ci Input pin Ri Doc ID 16264 Rev 1 21/26 Applications information TDA7492MV 6.5 Internal and external clocks The clock of the class-D amplifier can be generated internally or can be driven by an external source. If two or more class-D amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. This can be implemented by using one TDA7492MV as master clock, while the other devices are in slave mode (that is, externally clocked. The clock interconnect is via pin SYNCLK of each device. As explained below, SYNCLK is an output in master mode and an input in slave mode. 6.5.1 Master mode (internal clock) Using the internal oscillator, the output switching frequency, fSW, is controlled by the resistor, ROSC, connected to pin ROSC: fSW = 106 / ((16 * ROSC + 182) * 4) kHz where ROSC is in k. In master mode, pin SYNCLK is used as a clock output pin, whose frequency is: fSYNCLK = 2 * fSW For master mode to operate correctly then resistor ROSC must be less than 60 k as given below in Table 9. 6.5.2 Slave mode (external clock) In order to accept an external clock input the pin ROSC must be left open, that is, floating. This forces pin SYNCLK to be internally configured as an input as given in Table 9. The output switching frequency of the slave devices is: fSW = fSYNCLK / 2 Table 9. How to set up SYNCLK Mode Master Slave ROSC ROSC < 60 k Floating (not connected) Output Input SYNCLK www..com Figure 25. Master and slave connection Master TDA7492xy ROSC SYNCLK Output Slave TDA7492MV SYNCLK Input ROSC Cosc 100 nF Rosc 39 k 22/26 Doc ID 16264 Rev 1 TDA7492MV Applications information 6.6 Output low-pass filter To avoid EMI problems, it may be necessary to use a low-pass filter before the speaker. The cutoff frequency should be larger than 22 kHz and much lower than the output switching frequency. It is necessary to choose the L-C component values depending on the loud speaker impedance. Some typical values, which give a cut-off frequency of 27 kHz, are shown in Figure 26 and Figure 27 below. Figure 26. Typical LC filter for a 8- speaker Figure 27. Typical LC filter for a 4- speaker www..com 6.7 Protection function The TDA7492MV is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. Overvoltage protection (OVP) If the supply voltage exceeds the value for VOVP given in Table 5: Electrical specifications on page 8 the overvoltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage falls back to within the operating range the device restarts. Undervoltage protection (UVP) If the supply voltage drops below the value for VUVP given in Table 5: Electrical specifications on page 8 the undervoltage protection is activated which forces the outputs to Doc ID 16264 Rev 1 23/26 Applications information TDA7492MV the high-impedance state. When the supply voltage recovers to within the operating range the device restarts. Overcurrent protection (OCP) If the output current exceeds the value for IOCP given in Table 5: Electrical specifications on page 8 the overcurrent protection is activated which forces the outputs to the high-impedance state. Periodically, the device attempts to restart. If the overcurrent condition is still present then the OCP remains active. The restart time, TOC, is determined by the R-C components connected to pin STBY. Thermal protection (OTP) If the junction temperature, Tj, reaches 145 C (nominal), the device goes to mute mode and the positive and negative PWM outputs are forced to 50% duty cycle. If the junction temperature exceeds the value for Tj given in Table 5: Electrical specifications on page 8 the device shuts down and the output is forced to the high impedance state. When the device cools sufficiently the device restarts. 6.8 Diagnostic output The output pin DIAG is an open drain transistor. When the protection is activated it is in the high-impedance state. The pin can be connected to a power supply (< 26 V) by a pull-up resistor whose value is limited by the maximum sinking current (200 A) of the pin. Figure 28. Behavior of pin DIAG for various protection conditions VDD TDA7492MV DIAG Protection logic R1 www..com VDD Restart Overcurrent protection OV, UV, OT protection Restart 24/26 Doc ID 16264 Rev 1 TDA7492MV Revision history 7 Revision history Table 10. Date 20-Oct-2009 Document revision history Revision 1 Initial release. Changes www..com Doc ID 16264 Rev 1 25/26 TDA7492MV Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. www..com Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 26/26 Doc ID 16264 Rev 1 |
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