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W83176R-400 W83176G-400
Winbond Current Mode Differential Buffer for PCI Express and SATA
Date:
May/16/2006
Revision: 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
W83176R-400/W83176G-400 Datasheet Revision History
PAGES DATES VERSION WEB VERSION MAIN CONTENTS
1 2 3 4 5 6 7 8 9 10
n.a. 7
05/11/04 05/16/06
0.5 0.6
n.a. n.a.
First publish Add lead free part
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Publication Release Date: May, 2006 Revision 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA Table of Content1. 2. 3. 4. 5. GENERAL DESCRIPTION ......................................................................................................... 1 PRODUCT FEATURES .............................................................................................................. 1 PIN CONFIGURATION ............................................................................................................... 1 BLOCK DIAGRAM ...................................................................................................................... 2 PIN DESCRIPTION..................................................................................................................... 3 5.1 5.2 6.
2
Clock Outputs ..............................................................................................................................3 Power Pins...................................................................................................................................3 Register 0: Control Register (Default: 07h) ................................................................................4 Register 1: Control Register (Default: FFh) ................................................................................4 Register 2: Control Register (Default: 00h) ................................................................................4 Register 3: Reserved Register (Default: 00h) ............................................................................5 Register 4: Winbond Chip ID - Project Code Register (Default: 11h).......................................5 Register 5: Test Register (Default: 00h) .....................................................................................5 Block Write protocol.....................................................................................................................6 Block Read protocol ....................................................................................................................6 Byte Write protocol ......................................................................................................................6 Byte Read protocol......................................................................................................................6
I C CONTROL AND STATUS REGISTERS............................................................................... 4 6.1 6.2 6.3 6.4 6.5 6.6
7.
ACCESS INTERFACE ................................................................................................................ 6 7.1 7.2 7.3 7.4
8. 9. 10.
ORDERING INFORMATION....................................................................................................... 7 HOW TO READ THE TOP MARKING........................................................................................ 7 PACKAGE DRAWING AND DIMENSIONS................................................................................ 8
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W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 1. GENERAL DESCRIPTION
The W83176R-400 supports four current mode differential Clock pair's buffer output companion devices to CK409 or CK410 clock generator. The W83176R-400 provides I2C serial bus interface to program the registers to enable or disable each clock outputs. The W83176R-400 accepts a reference clock as its input current mode differential pair's clock.
2. PRODUCT FEATURES
* * * * * * * * Four current mode differential clock pairs clock outputs Support zero delay buffer mode and normal buffer mode Supports two hardware output enable/disable pin Programmable PLL bandwidth Low Skew outputs (< 50ps) Low cycle to cycle jitter (<100ps) I2C 2-Wire serial interface and supports Byte or Block Data R/W 28-pin SSOP package
3. PIN CONFIGURATION
*: Internal pull-up resistor 120K to VDD
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Publication Release Date: May, 2006 Revision 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 4. BLOCK DIAGRAM
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W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 5. PIN DESCRIPTION
BUFFER TYPE SYMBOL DESCRIPTION
IN OUT INtp120k * #
Input Output Latched input at power up, internal 120k pull up. Internal 120k pull-up Low Active
5.1
Clock Outputs
PIN PIN NAME TYPE DESCRIPTION
2,3 6,9,20,23, 7,10,19,22 8,21 13 14 15 16 17
SRCT_IN SRCC_IN DIFT (1,2,5,6) DIFC (1,2,5,6) OE (1,6)* SCLK * SDATA * PD#* SRC_STOP#* HIGH_BW#*
IN OUT OUT IN IN I/O IN IN INtp120k
SRC Differential clock input True Clocks of differential pair outputs Complement Clocks of differential pair outputs DIFT/C (1, 6) output control, 0=Tri-state, 1=Enable output, This is internal 120K pull up. Serial clock of I2C 2-wire control interface Internal pull-up resistor 120K to VDD Serial data of I2C 2-wire control interface Internal pull-up resistor 120K to VDD Active low to power down the device into low power state is stopped VCO and all output buffers, This is internal 120K pull up. Active low to stop differential output buffers, This is internal 120K pull up. Latched input at power up to selecting PLL Band Width 0=HIGH, 1=LOW, This is internal 120K pull up. Deciding the reference current for the Differential clock pairs. The pin was connected to the precision resistor tied to ground to decide the appropriate current; 475 ohm is the standard value for 0.7V differential clock output.
26
IREF
OUT
5.2
Power Pins
PIN PIN NAME DESCRIPTION
4,25,27 1,5,11,18,24 28
GND VDD VDDA
Ground Power Supply 3.3V Analog power supply, 3.3V
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Publication Release Date: May, 2006 Revision 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 6. I2C CONTROL AND STATUS REGISTERS
6.1
BIT
Register 0: Control Register (Default: 07h)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
PD_DM SRC_ST_DM SEL_SRCDIV SEL_NORMAL SEL_PLLBW PLL_BW_ ADJ NORMAL#/PLL SRC_DIV#
0 0 0 0 0 1 1 1
PD# Drive mode, 0:driven, 1:Hi-Z SRC_STOP Drive mode, 0:driven, 1:Hi-Z 0:control by pin, 1:control by I2C 0:control by pin, 1:control by I2C 0:control by pin, 1:control by I2C 0:High BW, 1:Low BW 0:Normal buffer, 1:PLL mode 0:Divided by 2 mode, 1:Normal (output=input)
6.2
BIT
Register 1: Control Register (Default: FFh)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
Reserved DIF6_EN DIF5_EN Reserved Reserved DIF2_EN DIF1_EN Reserved
1 1 1 1 1 1 1 1
Reserved 0:Disabled (Hi-Z), 1:Enable 0:Disabled (Hi-Z), 1:Enable Reserved Reserved 0:Disabled (Hi-Z), 1:Enable 0:Disabled (Hi-Z), 1:Enable Reserved
6.3
BIT
Register 2: Control Register (Default: 00h)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
Reserved DIF6STOP_EN DIF5STOP_EN Reserved Reserved DIF2STOP_EN DIF1STOP_EN Reserved
0 0 0 0 0 0 0 0
Reserved 0:Free-run, 1:Stoppable 0:Free-run, 1:Stoppable Reserved Reserved 0:Free-run, 1:Stoppable 0:Free-run, 1:Stoppable Reserved
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W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
6.4
BIT
Register 3: Reserved Register (Default: 00h)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
0 0 0 0 0 0 0 0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
6.5
BIT
Register 4: Winbond Chip ID - Project Code Register (Default: 11h)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
CHPI_ID [7] CHPI_ID [6] CHPI_ID [5] CHPI_ID [4] CHPI_ID [3] CHPI_ID [2] CHPI_ID [1] CHPI_ID [0]
0 0 0 1 0 0 0 1
Winbond Chip ID. W83176R-400 (SA5911). Winbond Chip ID. Winbond Chip ID. Winbond Chip ID. Winbond Chip ID. Winbond Chip ID. Winbond Chip ID. Winbond Chip ID.
6.6
BIT
Register 5: Test Register (Default: 00h)
NAME PWD DESCRIPTION
7 6 5 4 3 2 1 0
TEST1 TEST0 Reserved Reserved Reserved Reserved Reserved Reserved
0 0 0 0 0 0 0 0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
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Publication Release Date: May, 2006 Revision 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 7. ACCESS INTERFACE
The W83176R-400 provides I2C Serial Bus for microprocessor to read/write internal registers. In the W83176R-400 is provided Block Read/Block Write and Byte-Data Read/Write protocol. The I2C write address is defined at 0xDC. The I2C read address is defined at 0xDD.
7.1
Block Write protocol
7.2
Block Read protocol
## In block mode, the command code must filled `00h'
7.3
Byte Write protocol
7.4
Byte Read protocol
## In Byte Mode, the index No= (Register No) + 1
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W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 8. ORDERING INFORMATION
PART NUMBER PACKAGE TYPE PRODUCTION FLOW
W83176R_400 W83176G-400
28 PIN SSOP 28 PIN SSOP (Lead free package)
Commercial, 0C to +70C Commercial, 0C to +70C
9. HOW TO READ THE TOP MARKING
W83176R-400 28051234 510GBSA W83176G-400 28051234 510GBSA
1st line: Winbond logo and the type number: Normal part: W83176R-400, Lead free part: W83176G-400 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 418 G B SA 510: packages made in '2005, week 10 G: assembly house ID; O means OSE, G means GR B: IC revision SA: Winbond Internal use All the trademarks of products and companies mentioned in this datasheet belong to their respective owners.
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Publication Release Date: May, 2006 Revision 0.6
W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 10. PACKAGE DRAWING AND DIMENSIONS
28pin 209mil
D
2
15 DIMENSION IN MM DIMENSION IN INCH MIN. NOM MAX. MIN. NOM MAX.
SYMBOL
DTEAIL A
HE E
1
14
A A1 A2 b c D E HE e L L1 Y
2.00 0.05 1.65 1.75 0.22 0.09 9.90 10.20 5.00 5.30 7.40 7.80 0.65 0.55 0.75 1.25 0 0.002 1.85 0.065 0.38 0.009 0.25 0.004 10.50 0.389 5.60 0.197 8.20 0.291 0.95 0.10 8
0.079 0.069 0.073 0.015 0.010 0.401 0.413 0.209 0.220 0.307 0.323
0.0256
0.021 0.030 0.037 0.050 0.004 0 8
A2 A
SEATING PLANE
Y
e
b
DETAIL A A1
SEATING PLANE
L L1
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W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
Important Notice
Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5665577 http://www.winbond.com.tw/
Winbond Electronics Corporation America
2727 North First Street, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-5441798
Winbond Electronics (Shanghai) Ltd.
27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998
Taipei Office
9F, No.480, Rueiguang Rd., Neihu District, Taipei, 114, Taiwan, R.O.C. TEL: 886-2-8177-7168 FAX: 886-2-8751-3579
Winbond Electronics Corporation Japan
7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064
Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners.
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Publication Release Date: May, 2006 Revision 0.6

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