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| CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer Rev. 1 -- 21 February 2011 Product data sheet 1. General description The CBTL03SB212 is a sideband signal multiplexer for DisplayPort Gen2 applications. It provides one differential channel capable of switching or multiplexing (bidirectional and AC-coupled) DisplayPort 1.2 Fast AUX or AUX signal, using high-bandwidth pass-gate technology. Additionally, it provides for switching/multiplexing of the Hot Plug Detect signal as well as the Display Data Channel (DDC) signals, for a total of three channels. A typical application of CBTL03SB212 is on motherboards where one of two GPU display sources needs to be selected to connect to a display sink device or connector. A controller chip selects which path to use by setting a select signal HIGH or LOW. Due to the non-directional nature of the signal paths (which use high-bandwidth pass-gate technology), the CBTL03SB212 can also be used in the reverse topology, e.g., to connect one display source device to one of two display sink devices or connectors. GND CBTL03SB212 AUX1+ AUX1- AUX2+ AUX2- +3.3 V 2:1 MUX 100 k AUX+ AUX- 100 k +3.3 V GPU1 2 k DDC_CLK1 DDC_DAT1 DDC_CLK2 DDC_DAT2 HPD_1 HPD_2 2:1 MUX HPD 2:1 MUX DDC_CLK DDC_DAT SEL, XSD_N GPU2 002aag007 Fig 1. CBTL03SB212 application example NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 2. Features and benefits 1 : 2 multiplexing of DisplayPort signals 1 high-speed differential channel for Fast AUX or AUX 1 channel for DDC clock and data 1 channel for HPD High-bandwidth analog pass-gate technology Very low intra-pair differential skew (5 ps typical) Switch/MUX position select Shutdown mode CMOS input Shutdown mode minimizes power consumption while switching all channels off Very low operation current of 0.2 mA typical Very low shutdown current of < 10 A Single 3.3 V power supply ESD 4 kV HBM, 1 kV CDM Available in 4 mm x 4 mm HVQFN20 package 3. Applications Motherboard applications requiring DisplayPort sideband switching/multiplexing Docking stations Notebook computers 4. Ordering information Table 1. Ordering information Package Name CBTL03SB212BS HVQFN20 Description plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 4 x 4 x 0.85 mm[1] Version SOT917-1 Type number [1] Total height after printed-circuit board mounting = 1 mm (maximum). CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 2 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 5. Functional diagram AUX1+ AUX1- AUX2+ AUX2- 2:1 MUX AUX+ AUX- DDC_CLK1 DDC_DAT1 DDC_CLK2 DDC_DAT2 2:1 MUX DDC_CLK DDC_DAT HPD_1 2:1 MUX HPD_2 HPD SEL, XSD_N 002aag008 Fig 2. Functional diagram 6. Pinning information 6.1 Pinning 17 AUX1+ 16 AUX1- 15 XSD_N 14 AUX2+ 13 AUX2- 12 DDC_CLK1 11 DDC_DAT1 HPD_1 10 6 7 8 DDC_DAT2 9 DDC_CLK2 20 AUX+ 19 GND HPD_2 terminal 1 index area AUX- DDC_CLK DDC_DAT HPD SEL 1 2 3 4 5 CBTL03SB212BS VDD 18 VDD 002aag009 Transparent top view Fig 3. Pin configuration for HVQFN20 CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 3 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 6.2 Pin description Table 2. Symbol SEL XSD_N Pin description Pin 5 15 Type 3.3 V CMOS single-ended input 3.3 V CMOS single-ended input Description Selects between two multiplexer/switch paths. Shutdown pin. Should be driven HIGH or connected to VDD for normal operation. When LOW, all paths are switched off (non-conducting high-impedance state), and supply current consumption is minimized. High-speed differential pair for AUX signals, right-side. Pair of single-ended terminals for DDC clock and data signals, right-side. Single-ended channel for the HPD signal, right-side. High-speed differential pair for AUX signals, path 1, left-side. High-speed differential pair for AUX signals, path 2, left-side. Pair of single-ended terminals for DDC clock and data signals, path 1, left-side. Pair of single-ended terminals for DDC clock and data signals, path 2, left-side. Single-ended channel for the HPD signal, path 1, left-side. Single-ended channel for the HPD signal, path 2, left-side. 3.3 V power supply. Ground. AUX+ AUX- DDC_CLK DDC_DAT HPD AUX1+ AUX1- AUX2+ AUX2- DDC_CLK1 DDC_DAT1 DDC_CLK2 DDC_DAT2 HPD_1 HPD_2 VDD GND[1] [1] 20 1 2 3 4 17 16 14 13 12 11 9 8 10 7 6, 18 19 differential I/O differential I/O differential I/O differential I/O single-ended I/O differential I/O differential I/O differential I/O differential I/O differential I/O differential I/O differential I/O differential I/O single-ended I/O single-ended I/O power supply ground HVQFN20 package die supply ground is connected to both GND pin and exposed center pad. GND pin and the exposed center pad must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region. CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 4 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 7. Functional description Refer to Figure 2 "Functional diagram". The CBTL03SB212 uses 3.3 V power supply. All signal paths are implemented using high-bandwidth pass-gate technology, are bidirectional and no clock or reset signal is needed for the multiplexer to function. The switch position is selected using the select signal (SEL). The detailed operation is described in Section 7.1. 7.1 MUX select (SEL) function The internal multiplexer switch position is controlled by the logic inputs SEL as described below. Table 3. SEL 0 1 MUX select control Path 2 high-impedance active Path 1 active high-impedance 7.2 Shutdown function The CBTL03SB212 provides a shutdown function to minimize power consumption when the application is not active but power to the CBTL03SB212 is provided. Pin XSD_N (active LOW) puts all channels in Off mode (non-conducting high-impedance state) while reducing current consumption to near-zero. Table 4. XSD_N 0 1 Shutdown function State shutdown active CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 5 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDD Tcase VESD Parameter supply voltage case temperature electrostatic discharge voltage for operation within specification HBM CDM [1] [2] Conditions Min -0.3 -40 - Max +5 +85 4000 1000 Unit V C V V [1] [2] Human Body Model: ANSI/EOS/ESD-S5.1-1994, standard for ESD sensitivity testing, Human Body Model Component level; Electrostatic Discharge Association, Rome, NY, USA. Charged-Device Model: ANSI/EOS/ESD-S5.3-1-1999, standard for ESD sensitivity testing, Charged-Device Model - Component level; Electrostatic Discharge Association, Rome, NY, USA. 9. Recommended operating conditions Table 6. Symbol VDD VI Tamb Recommended operating conditions Parameter supply voltage input voltage ambient temperature operating in free air Conditions Min 3.0 -40 Typ 3.3 Max 3.6 3.6 +85 Unit V V C CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 6 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 10. Characteristics 10.1 General characteristics Table 7. Symbol IDD Ptot tstartup trcfg General characteristics Parameter supply current total power dissipation start-up time reconfiguration time Conditions operating mode (XSD_N = HIGH); VDD = 3.3 V shutdown mode (XSD_N = LOW); VDD = 3.3 V operating mode (XSD_N = HIGH); VDD = 3.3 V supply voltage valid or XSD_N going HIGH to channel specified operating characteristics SEL state change to channel specified operating characteristics Min Typ 0.2 Max 1 10 5 10 1 Unit mA A mW s s 10.2 AUX channel characteristics Table 8. Symbol VI VIC VID DDIL AUX channel characteristics Parameter input voltage common-mode input voltage differential input voltage differential insertion loss peak-to-peak channel is on; f = 100 MHz channel is on; f = 2.5 GHz channel is off; 0 Hz f 1.0 GHz DDRL differential return loss channel is on; 0 Hz f 1.0 GHz adjacent channels are on; 0 Hz f 1.0 GHz -3.0 dB intercept from left-side port to right-side port or vice versa intra-pair DDNEXT differential near-end crosstalk B tPD tsk(dif) bandwidth propagation delay differential skew time Conditions Min -0.3 0 Typ -0.8 -3 2.5 100 5 Max +2.6 2.0 +1.4 -30 -10 -40 Unit V V V dB dB dB dB dB GHz ps ps 10.3 DDC ports Table 9. Symbol VI tPD DDC port characteristics Parameter input voltage propagation delay from left-side port to right-side port or vice versa Conditions Min -0.3 Typ 100 Max VDD Unit V ps CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 7 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 10.4 HPD input, HPD output Table 10. Symbol VI tPD HPD input and output characteristics Parameter input voltage propagation delay from left-side port to right-side port or vice versa Conditions [1] Min -0.3 - Typ 100 Max 3.6 - Unit V ps [1] Low-speed input changes state on cable plug/unplug. 10.5 MUX select input Table 11. Symbol VIH VIL ILI SEL, XSD_N input characteristics Parameter HIGH-level input voltage LOW-level input voltage input leakage current Conditions SEL, XSD_N SEL, XSD_N measured with input at VIH(max) and VIL(min) Min 2.0 0 Typ Max 3.6 0.8 10 Unit V V A 11. Test information 11.1 Switch test fixture requirements The test fixture for switch S-parameter measurement shall be designed and built to specific requirements, as described below, to ensure good measurement quality and consistency. * The test fixture shall be a FR4-based PCB of the microstrip structure; the dielectric thickness or stack-up shall be about 4 mils. * The total thickness of the test fixture PCB shall be 1.57 mm (0.062 in). * The measurement signals shall be launched into the switch from the top of the test fixture, capturing the through-hole stub effect. * Traces between the DUT and measurement ports (SMA or microprobe) should be uncoupled from each other, as much as possible. Therefore, the traces should be routed in such a way that traces will diverge from each other exiting from the switch pin field. * The trace lengths between the DUT and measurement port shall be minimized. The maximum trace length shall not exceed 1000 mils. The trace lengths between the DUT and measurement port shall be equal. * All of the traces on the test board and add-in card must be held to a characteristic impedance of 50 with a tolerance of 7 %. * SMA connector is recommended for ease of use. The SMA launch structure shall be designed to minimize the connection discontinuity from SMA to the trace. The impedance range of the SMA connector seen from a TDR with a 60 ps rise time should be within 50 7 . CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 8 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 12. Package outline HVQFN20: plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 4 x 4 x 0.85 mm SOT917-1 D B A terminal 1 index area E A A1 c detail X e1 e 6 L 11 5 Eh 1 15 e e2 b 10 vMCAB wMC y1 C C y terminal 1 index area 20 Dh 16 X 0 DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D(1) 4.1 3.9 Dh 2.45 2.15 E(1) 4.1 3.9 Eh 2.45 2.15 e 0.5 2.5 scale 5 mm e1 2 e2 2 L 0.6 0.4 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT917 -1 REFERENCES IEC --JEDEC MO-220 JEITA --EUROPEAN PROJECTION ISSUE DATE 05-10-08 05-10-31 Fig 4. CBTL03SB212 Package outline HVQFN20 (SOT917-1) All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 9 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 "Surface mount reflow soldering description". 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: * Through-hole components * Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: * * * * * * Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 13.3 Wave soldering Key characteristics in wave soldering are: * Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave * Solder bath specifications, including temperature and impurities CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 10 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 13.4 Reflow soldering Key characteristics in reflow soldering are: * Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 5) than a SnPb process, thus reducing the process window * Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board * Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 12 and 13 Table 12. SnPb eutectic process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 2.5 2.5 Table 13. 235 220 Lead-free process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 1.6 1.6 to 2.5 > 2.5 260 260 250 350 to 2000 260 250 245 > 2000 260 245 245 350 220 220 Package thickness (mm) Package thickness (mm) Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 5. CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 11 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 5. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 "Surface mount reflow soldering description". 14. Abbreviations Table 14. Acronym AUX CDM CMOS DDC DUT ESD FAUX GPU HBM HPD I/O MUX PCB SMA TDR Abbreviations Description Auxiliary channel in DisplayPort definition Charged-Device Model Complementary Metal-Oxide Semiconductor Display Data Channel Device Under Test ElectroStatic Discharge Fast AUX Graphics Processor Unit Human Body Model Hot Plug Detect Input/Output Multiplexer Printed-Circuit Board SubMiniature, version A (connector) Time-Domain Reflectometry CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 12 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 15. Revision history Table 15. Revision history Release date 20110221 Data sheet status Product data sheet Change notice Supersedes Document ID CBTL03SB212 v.1 CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 13 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. (c) NXP B.V. 2011. All rights reserved. 16.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or CBTL03SB212 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 1 -- 21 February 2011 14 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com CBTL03SB212 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 -- 21 February 2011 15 of 16 NXP Semiconductors CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer 18. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 8 9 10 10.1 10.2 10.3 10.4 10.5 11 11.1 12 13 13.1 13.2 13.3 13.4 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 MUX select (SEL) function . . . . . . . . . . . . . . . . 5 Shutdown function . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 7 General characteristics . . . . . . . . . . . . . . . . . . . 7 AUX channel characteristics. . . . . . . . . . . . . . . 7 DDC ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 HPD input, HPD output. . . . . . . . . . . . . . . . . . . 8 MUX select input . . . . . . . . . . . . . . . . . . . . . . . 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switch test fixture requirements . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering of SMD packages . . . . . . . . . . . . . . 10 Introduction to soldering . . . . . . . . . . . . . . . . . 10 Wave and reflow soldering . . . . . . . . . . . . . . . 10 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 10 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 February 2011 Document identifier: CBTL03SB212 |
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