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HD74LV221A
Dual Monostable Multivibrators
REJ03D0326-0600Z (Previous ADE-205-271D (Z)) Rev.6.00 Jun. 23, 2004
Description
The HD74LV221A features output pulse-duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. Pulse duration can be reduced by taking CLR low.
Features
* * * * * VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Output current 6 mA (@VCC = 3.0 V to 3.6 V), 12 mA (@VCC = 4.5 V to 5.5 V) Ordering Information
Package Type SOP-16 pin (JEITA) SOP-16 pin (JEDEC) TSSOP-16 pin Package Code FP-16DAV FP-16DNV TTP-16DAV Package Abbreviation FP RP T Taping Abbreviation (Quantity) EL (2,000 pcs/reel) EL (2,500 pcs/reel) ELL (2,000 pcs/reel)
Part Name HD74LV221AFPEL HD74LV221ARPEL HD74LV221ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs CLR L X X H H Note: H: L: X: : : A X H X L L High level Low level Immaterial Low to high transition High to low transition : High level pulse : Low level pulse B X X L H H Outputs Q L L L Q H H H
Rev.6.00 Jun. 23, 2004 page 1 of 13
HD74LV221A
Pin Arrangement
1A 1 1B 1CLR 2 3
16 VCC 15 1Rext / Cext 14 1Cext 13 1Q 12 2Q 11 2CLR 10 2B 9 2A
1Q 4 2Q 2Cext 2Rext / Cext 5 6 7
GND 8
(Top view)
Absolute Maximum Ratings
Item Supply voltage range Input voltage range*1 Output voltage range*1, 2 Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation at 3 Ta = 25C (in still air)* Storage temperature Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -0.5 to 7.0 -20 50 25 50 785 500 -65 to 150 Unit V V V mA mA mA mA mW C Conditions
Output: H or L VCC: OFF VI < 0 VO < 0 or VO > VCC VO = 0 to VCC
SOP TSSOP
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150C.
Rev.6.00 Jun. 23, 2004 page 2 of 13
HD74LV221A
Recommended Operating Conditions
Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOH Min 2.0 0 0 -- -- -- -- -- -- -- -- 0 0 0 5 1 -- 1 -40 Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
unlimited
Max 5.5 5.5 VCC -50 -2 -6 -12 50 2 6 12 200 100 20 -- -- -- -- 85
Unit V V V A mA
Conditions
IOL
A mA
Input transition rise or fall rate
t /v
ns/V
VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC 2.3 V
External timing resistance External timing capacitance Power-up ramp rate Operating free-air temperature
Rext Cext t /VCC Ta
k F ms/V C
-- --
Note: Unused or floating inputs must be held high or low.
Logic Diagram
A Q Q
B Q CLR CLR Q
Rev.6.00 Jun. 23, 2004 page 3 of 13
HD74LV221A
DC Electrical Characteristics
Ta = -40 to 85C Item Input voltage Symbol VIH VCC (V) 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min to Max 2.3 3.0 4.5 Min to Max 2.3 3.0 4.5 0 to 5.5 5.5 5.5 2.3 3.0 4.5 5.5 0 3.3 Min 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 -- -- -- -- VCC - 0.1 2.0 2.48 3.8 -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max -- -- -- -- 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 -- -- -- -- 0.1 0.4 0.44 0.55 1 2.5 20 220 280 650 975 5 -- Unit V Test Conditions
VIL
Output voltage
VOH
V
VOL
V
Input current Input current Rext / Cext Quiescent supply current Active state supply current (per circuit)
IIN IIN ICC ICC
A A A A
IOH = -50 A IOH = -2 mA IOH = -6 mA IOH = -12 mA IOL = 50 A IOL = 2 mA IOL = 6 mA IOL = 12 mA VIN = 5.5 V or GND VIN = VCC or GND VIN = VCC or GND, IO = 0 VIN = VCC or GND Rext/Cext = 0.5 VCC
Output leakage current Input capacitance
IOFF CIN
-- --
-- 4.0
A pF
VI or VO = 0 V to 5.5 V VI = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.6.00 Jun. 23, 2004 page 4 of 13
HD74LV221A
Switching Characteristics
VCC = 2.5 0.2 V Ta = 25C Item Propagation delay time Symbol tPLH tPHL Min -- -- -- -- -- -- 6.0 -- 90 0.9 twQ -- Typ 13.3 15.5 10.9 12.5 13.5 15.9 -- 170 100 1.0 1 Max 31.4 36.0 25.0 32.8 33.4 38.0 -- 260 110 1.1 -- Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 6.5 -- 90 0.9 -- Max 37.0 42.0 29.5 34.5 39.0 44.0 -- 320 110 1.1 -- Unit ns Test Conditions FROM (Input) TO (Output)
Pulse width Output pulse width
tw twQ
ns ns s ms %
CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k CL = 50 pF VCC = 3.3 0.3 V
Ta = 25C Item Propagation delay time Symbol tPLH tPHL Min -- -- -- -- -- -- 5.0 -- 90 0.9 twQ -- Typ 9.9 11.6 8.3 9.7 9.9 11.6 -- 150 100 1.0 1 Max 20.6 24.1 15.8 19.3 22.4 25.9 -- 240 110 1.1 --
Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 5.0 -- 90 0.9 -- Max 24.0 27.5 18.5 22.0 26.0 29.5 -- 300 110 1.1 -- Unit ns
Test Conditions
FROM (Input)
TO (Output)
Pulse width Output pulse width
tw twQ
ns ns s ms %
CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k CL = 50 pF
Rev.6.00 Jun. 23, 2004 page 5 of 13
HD74LV221A
Switching Characteristics (cont)
VCC = 5.0 0.5 V Ta = 25C Item Propagation delay time Symbol tPLH tPHL Min -- -- -- -- -- -- 5.0 -- 90 0.9 twQ -- Typ 7.3 8.7 6.2 7.4 7.3 8.6 -- 140 100 1.0 1 Max 12.0 14.0 9.4 11.4 12.9 14.9 -- 200 110 1.1 -- Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 5.0 -- 90 0.9 -- Max 14.0 16.0 11.0 13.0 15.0 17.0 -- 240 110 1.1 -- Unit ns Test Conditions FROM (Input) TO (Output)
Pulse width Output pulse width
tw twQ
ns ns s ms %
CL = 15 pF A or B Q or Q CL = 50 pF CL = 15 pF CLR Q or Q CL = 50 pF CL = 15 pF CLR Q or Q (Trigger) CL = 50 pF A, B or CLR CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k CL = 50 pF
Operating Characteristics
CL = 50 pF Ta = 25C Item Power dissipation capacitance Symbol CPD VCC (V) 3.3 5.0 Min -- -- Typ 74.0 86.0 Max -- -- Unit pF Test Conditions f = 10 MHz
Test Circuit
VCC Cext
- +
Rext
Cext = 28 pF or 100 pF or 0.01 F or 0.1 F Rext = 1 k or 2 k or 10 k
VCC
Refer to Function Table
Cext Rext/ Cext A B CLR GND
VCC Q Output C L = 15 pF or 50 pF
Input
Q
Output C L = 15 pF or 50 pF
Note : C L includes the probe and jig capacitance.
Rev.6.00 Jun. 23, 2004 page 6 of 13
HD74LV221A
Timing diagram
t rr A
B CLR
Rext/ Cext Q tw tw t w +t rr
Caution in use In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor between Vcc and GND, and keep the wiring between the External components and Cext, Rext/Cext pins as short as possible. Large values of Cext may cause problems when powering down the HD74LV221A because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor may discharge from Vcc through the protection diodes at pin 7 or pin 15. Current through the input protection diodes must be limited to 20 mA; therefore, the turn-off time of the Vcc power supply must not be faster than t = Vcc * Cext/(20 mA). For example, if Vcc = 5 V and Cext = 22 F, the Vcc supply must turn off no faster than t = (5 V) * (22 F)/ 20 mA = 5.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of Vcc to zero volts occurs, the HD74LV221A may sustain damage. To avoid this possibility, use an external calmping diode. The input pins for unused circuit should be used under conditions to fix the outputs to avoid malfunction cased by noises. Also, it's recommended that Rext / Cext terminals are open and external parts are not connected to.
Rev.6.00 Jun. 23, 2004 page 7 of 13
HD74LV221A
* Waveform - 1
90% 50% 10% tr Input B 10% tr Input CLR 10% 90% 50% 90% 50% 10% t w (L) t PLH (trigger) t PHL VOH Output Q 50% VCC t PHL (trigger) t PLH VOH Output Q 50% VCC 50% VCC VOL 50% VCC VOL tf tr 90% 50% 10% VCC GND 90% 50% VCC GND
tf VCC GND
Input A
Rev.6.00 Jun. 23, 2004 page 8 of 13
HD74LV221A
* Waveform - 2
tr 90% 50% 10% tf 90% 50% 10% 10% t w (L) 90% 50% 10%
tf
tr 90% 50% 10% t w (L) tf 90% 50% 90% 50% 10% t w (H) VCC GND VCC GND
Input A
t w (H) tr
Input B
VOH Output Q 50% VCC 50% VCC VOL t w (out) VOH Output Q 50% VCC 50% VCC VOL
Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , t r 3 ns, t f 3 ns 2. The output are measured one at a time with one transition per measurement.
Application Data
Vcc = 2.5 V 10000.0
t WQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Rev.6.00 Jun. 23, 2004 page 9 of 13
HD74LV221A
Vcc = 3.3 V 10000.0
t WQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Vcc = 5.0 V 10000.0
t WQ (s) Output pulse width
1000.0
100.0
10.0 Rext 1.0 1 k 10 k 100 k 1 M
2 3 4 5 6 7
0.1 10
10
10
10
10
10
Timing capacitance
Cext (pF)
Rev.6.00 Jun. 23, 2004 page 10 of 13
HD74LV221A
Rext = 2 k 1.4 Cext 1000 pF 10000 pF 100000 pF 1000000 pF
Coefficient of output pulse width
K
1.3
1.2
1.1
1.0
0.9
0.8 2.0 2.5 3.0 3.5 4.0 4.5 VCC (V) 5.0 5.5 6.0
Supply voltage
Rext = 10 k 1.4 Cext
Coefficient of output pulse width
K
1.3
1000 pF 10000 pF 100000 pF 1000000 pF
1.2
1.1
1.0
0.9
0.8 2.0 2.5 3.0 3.5 4.0 4.5 VCC (V) 5.0 5.5 6.0
Supply voltage
Rev.6.00 Jun. 23, 2004 page 11 of 13
HD74LV221A
Package Dimensions
As of January, 2003
10.06 10.5 Max 16 9
Unit: mm
1
*0.20 0.05
8
0.80 Max
5.5
0.20 7.80 + 0.30 -
2.20 Max
1.15
1.27
0.10 0.10
0 - 8
0.70 0.20
*0.40 0.06
0.15
0.12 M
Package Code JEDEC JEITA Mass (reference value) FP-16DAV -- Conforms 0.24 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
9.9 10.3 Max 16 9
1 1.27 0.635 Max
8
0.11 0.14 + 0.04 - 1.75 Max
3.95
*0.20 0.05
0.10 6.10 + 0.30 -
1.08
0 - 8
0.67 0.60 + 0.20 -
*0.40 0.06
0.15 0.25 M
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
FP-16DNV Conforms Conforms 0.15 g
Rev.6.00 Jun. 23, 2004 page 12 of 13
HD74LV221A
As of January, 2003
Unit: mm
5.00 5.30 Max 16 9
1
*0.20 0.05
8 0.65 0.13 M 0.65 Max 6.40 0.20 0 - 8 0.50 0.10 1.0
4.40
*0.15 0.05
1.10 Max
0.10
0.07 +0.03 -0.04
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
TTP-16DAV -- -- 0.05 g
Rev.6.00 Jun. 23, 2004 page 13 of 13
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