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| S71GL-N Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 64/32 Megabit (4/2 M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory and 32/16/8/4 Megabit (2M/1M/512k/256k x 16-bit) Pseudo Static RAM Data Sheet (Advance Information) S71GL-N Based MCPs Cover Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions. Publication Number S71GL-N_00 Revision 03 Issue Date March 25, 2008 Data Sheet (Advance Information) Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. The following descriptions of Spansion data sheet designations are presented here to highlight their presence and definitions. Advance Information The Advance Information designation indicates that Spansion Inc. is developing one or more specific products, but has not committed any design to production. Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. Spansion Inc. therefore places the following conditions upon Advance Information content: "This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice." Preliminary The Preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. This designation covers several aspects of the product life cycle, including product qualification, initial production, and the subsequent phases in the manufacturing process that occur before full production is achieved. Changes to the technical specifications presented in a Preliminary document should be expected while keeping these aspects of production under consideration. Spansion places the following conditions upon Preliminary content: "This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications." Combination Some data sheets contain a combination of products with different designations (Advance Information, Preliminary, or Full Production). This type of document distinguishes these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with the DC Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first page refers the reader to the notice on this page. Full Production (No Designation on Document) When a product has been in production for a period of time such that no changes or only nominal changes are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following conditions to documents in this category: "This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur." Questions regarding these document designations may be directed to your local sales office. 2 S71GL-N Based MCPs S71GL-N_00_03 March 25, 2008 S71GL-N Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 64/32 Megabit (4/2 M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory and 32/16/8/4 Megabit (2M/1M/512k/256k x 16-bit) Pseudo Static RAM Data Sheet (Advance Information) Distinctive Characteristics MCP Features Power supply voltage of 2.7 to 3.1 volt High performance - 90 ns access time (90 ns Flash, 70 ns pSRAM/SRAM) - 25 ns page read times Packages - 7 x 9 x 1.2 mm 56 ball FBGA (TLC056) Operating Temperature - -25C to +85C General Description The S71GL-N product series consists of S29GL-N Flash memory with pSRAM combinations defined as: Flash Memory Density 32 Mb 4 Mb S71GL032N40 S71GL032N80 S71GL032NA0 S71GL064NA0 S71GL064NB0 64 Mb pSRAM Density 8 Mb 16 Mb 32 Mb For detailed specifications, please refer to the individual data sheets. Document S29GL-N 4 Mb pSRAM Type 9 8 Mb pSRAM Type 9 16 Mb pSRAM Type 7 32 Mb pSRAM Type 8 Publication Identification Number (PID) S29GL-N_00 pSRAM_33 pSRAM_34 pSRAM_13 pSRAM_31 Publication Number S71GL-N_00 Revision 03 Issue Date March 25, 2008 This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. Data Sheet (Advance Information) 1. 1.1 Product Selector Guide 64 Mb Flash Memory Device-Model# (Note) S71GL032N40-0K S71GL032N40-0P S71GL032N80-0K S71GL032N80-0P S71GL032NA0-0U 90 70 16 Mb pSRAM7 TLC056 8 Mb 4 Mb pSRAM 9 Flash Access time (ns) (p)SRAM density (p)SRAM Access time (ns) (p)SRAM type Package S71GL032NA0-0Z S71GL064NA0-0U S71GL064NA0-0Z S71GL064NB0-0U S71GL064NB0-0Z 32 Mb pSRAM 8 Note Please see the valid combinations table for the model# description. 4 S71GL-N Based MCPs S71GL-N_00_03 March 25, 2008 Data Sheet (Advance Information) 2. MCP Block Diagram VCCf VCC CE1#f WP#/ACC RESET# Flash-only Address Shared Address OE# WE# VSS RY/BY# Flash VCCS DQ15 to DQ0 VCC pSRAM IO15-IO0 CE1#s UB# LB# CE2s CE# UB# LB# March 25, 2008 S71GL-N_00_03 S71GL-N Based MCPs 5 Data Sheet (Advance Information) 3. Connection Diagram 56-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down) A2 A7 B1 A3 C1 A2 D1 A1 E1 A0 F1 CE1#f G1 CE1#s B2 A6 C2 A5 D2 A4 E2 VSS F2 OE# G2 DQ0 H2 DQ8 A3 LB# B3 UB# C3 A18 D3 A17 E3 DQ1 F3 DQ9 G3 DQ10 H3 DQ2 A4 WP/ACC B4 RST#f C4 RY/BY# A5 WE# B5 CE2s C5 A20 A6 A8 B6 A19 C6 A9 D6 A10 E6 DQ6 A7 A11 B7 A12 C7 A13 D7 A14 E7 RFU F7 DQ15 G7 DQ7 H7 DQ14 B8 A15 C8 A21 D8 RFU E8 A16 F8 RFU G8 VSS Legend Shared (Note 1) Flash only RAM only F4 DQ3 G4 VCCf H4 DQ11 F5 DQ4 G5 VCCs H5 RFU F6 DQ13 G6 DQ12 H6 DQ5 Reserved for Future Use Note May be shared depending on density. MCP S71GL032NA0 S71GL032N80 S71GL032N40 S71GL064NB0 S71GL064NA0 Flash-only Addresses A20 A20-A19 A20-A18 A21 A21-A20 Shared Addresses A19-A0 A18-A0 A17-A0 A20-A0 A19-A0 3.1 Special Handling Instructions For FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150C for prolonged periods of time. 6 S71GL-N Based MCPs S71GL-N_00_03 March 25, 2008 Data Sheet (Advance Information) 4. Pin Description Pin A21-A0 DQ15-DQ0 CE1#f CE1#s CE2s OE# WE# RY/BY# UB# LB# RESET# WP#/ACC VCCf VCCS VSS NC Description 22 Address Inputs (Common and Flash only) (A20-A0 for the S71GL032N) 16 Data Inputs/Outputs (Common) Chip Enable (Flash) Chip Enable 1 (pSRAM/SRAM) Chip Enable 2 (pSRAM/SRAM) Output Enable (Common) Write Enable (Common) Ready/Busy Output (Flash 1) Upper Byte Control (pSRAM/SRAM) Lower Byte Control (pSRAM/SRAM) Hardware Reset Pin, Active Low (Flash) Hardware Write Protect/Acceleration Pin (Flash) Flash 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) pSRAM/SRAM Power Supply Device Ground (Common) Pin Not Connected Internally March 25, 2008 S71GL-N_00_03 S71GL-N Based MCPs 7 Data Sheet (Advance Information) 5. Ordering Information The order number is formed by a valid combinations of the following: S71GL 064 N A0 BF W 0 Z 0 PACKING TYPE 0 = Tray 2 = 7" Tape and Reel 3 = 13" Tape and Reel MODEL NUMBER See the Valid Combinations table. PACKAGE MODIFIER 0 = 7 x 9 mm, 1.2 mm height, 56 balls (TLC056) TEMPERATURE RANGE W = Wireless (-25C to +85C) PACKAGE TYPE BF = Fine-pitch BGA Lead (Pb)-free package BH = Fine-pitch BGA Lead (PB)-free, Low-Halogen package pSRAM / SRAM DENSITY B0 = 32 Mb pSRAM A0 = 16 Mb pSRAM 40 = 4 Mb pSRAM 80 = 8 Mb pSRAM PROCESS TECHNOLOGY N = 110 nm, MirrorBit(R) Technology FLASH DENSITY 064 = 64Mb 032 = 32Mb PRODUCT FAMILY S71GL Multi-chip Product (MCP) 3.0-volt Page Mode Flash Memory and RAM Table 5.1 Valid Combinations S71GL064N Valid Combinations Base Ordering Part Number S71GL032N40 0P 0K S71GL032N80 0P 0U S71GL032NA0 S71GL064NA0 S71GL064NA0 S71GL064NB0 S71GL064NB0 BFW, BHW 0Z 0U 0Z 0U 0Z 0, 2, 3 (1) 90 / Top Boot Sector 90 / Bottom Boot Sector pSRAM7 / 70 90 / Top Boot Sector 90 / Bottom Boot Sector pSRAM8 / 70 90 / Top Boot Sector Note 1. Type 0 is standard. Specify other options as required. 90 / Top Boot Sector 90 / Bottom Boot Sector pSRAM7 / 70 TLC056 90 / Top Boot Sector 90 / Bottom Boot Sector pSRAM9 / 70 Package & Temperature Package Modifier/Model Number 0K Packing Type Speed Options (ns)/Boot Sector Option 90 / Bottom Boot Sector pSRAM9 / 70 (p)SRAM Type/ Access Time (ns) Package Marking Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. 8 S71GL-N Based MCPs S71GL-N_00_03 March 25, 2008 Data Sheet (Advance Information) 6. Physical Dimensions 6.1 TLC056--56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7 mm Package D 0.15 C (2X) 8 7 6 A D1 eD SE 7 E eE 5 4 3 2 1 E1 INDEX MARK PIN A1 CORNER 10 H G F E D CB A B 7 TOP VIEW 0.15 C (2X) SD PIN A1 CORNER BOTTOM VIEW 0.20 C A A2 A1 6 C 0.08 C SIDE VIEW b 56X 0.15 M C A B 0.08 M C NOTES: PACKAGE JEDEC DxE SYMBOL A A1 A2 D E D1 E1 MD ME n b eE eD SD / SE 0.35 TLC 056 N/A 9.00 mm x 7.00 mm PACKAGE MIN --0.20 0.81 NOM ------9.00 BSC. 7.00 BSC. 5.60 BSC. 5.60 BSC. 8 8 56 0.40 0.80 BSC. 0.80 BSC 0.40 BSC. A1,A8,D4,D5,E4,E5,H1,H8 0.45 MAX 1.20 --0.97 PROFILE BALL HEIGHT BODY THICKNESS BODY SIZE BODY SIZE MATRIX FOOTPRINT MATRIX FOOTPRINT MATRIX SIZE D DIRECTION MATRIX SIZE E DIRECTION BALL COUNT BALL DIAMETER BALL PITCH BALL PITCH SOLDER BALL PLACEMENT DEPOPULATED SOLDER BALLS 9. 8. 7 6 NOTE 2. 3. 4. 5. 1. DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010. e REPRESENTS THE SOLDER BALL GRID PITCH. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. N/A 10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3348 \ 16-038.22a March 25, 2008 S71GL-N_00_03 S71GL-N Based MCPs 9 Data Sheet (Advance Information) 7. Revision History Section Revision 01 (May 14, 2007) Description Initial release. Revision 02 (June 19, 2007) Global Revision 03 (March 25, 2008) Editorial changes to valid combinations table Added Low-Halogen option to package type. Ordering Information 10 S71GL-N Based MCPs S71GL-N_00_03 March 25, 2008 Data Sheet (Advance Information) Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright (c) 2007-2008 Spansion Inc. All rights reserved. Spansion(R), the Spansion Logo, MirrorBit(R), MirrorBit(R) EclipseTM, ORNANDTM, ORNAND2TM, HD-SIMTM and combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. March 25, 2008 S71GL-N_00_03 S71GL-N Based MCPs 11 |
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