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| DN3765 N-Channel Depletion-Mode Vertical DMOS FET Features High input impedance Low input capacitance Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage General Description This depletion-mode (normally-on) transistor utilizes an advanced vertical DMOS structure and Supertex's wellproven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Normally-on switches Solid state relays Converters Linear amplifiers Constant current sources Telecom Ordering Information BVDSX/ BVDGX (V) Pin Configuration Package Option TO-252 (D-PAK) DN3765K4-G SOURCE GATE DRAIN RDS(ON) max () IDSS min (mA) 650 8.0 200 -G indicates package is RoHS compliant (`Green') TO-252 (D-PAK) (K4) Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage Operating and storage temperature Maximum junction temperature Value BVDSX BVDGX 20V -55OC to +150OC 150OC Product Marking YYWW DN3765 LLLLLLL YY = Year Sealed WW = Week Sealed L = Lot Number = "Green" Packaging TO-252 (D-PAK) (K4) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. DN3765 Thermal Characteristics Package TO-252 (D-PAK) ID (continuous)(1) (A) ID (pulsed) (A) Power Dissipation (2) @TA = 25OC (W) jc ( C/W) O O ja ( C/W) IDR(1) (A) IDRM (A) 0.30 0.50 2.5 6.25 50 0.30 0.50 Notes: (1) ID (continuous) is limited by max rated Tj of 150OC. (2) Mounted on FR4 board, 25mm x 25mm x 1.57mm. Electrical Characteristics (T Sym BVDSX VGS(OFF) IGSS ID(OFF) IDSS RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Parameter A = 25OC unless otherwise specified) Min 650 -1.5 - Typ 800 Max -3.5 4.5 100 10 1.0 8.0 1.1 825 190 110 50 75 75 100 1.8 - Units V V nA A mA mA %/ C O Conditions VGS = -5.0V, ID = 100A VDS = 25V, ID= 10A VGS = 20V, VDS = 0V VGS = -10V, VDS = Max Rating VGS = -10V, VDS = 0.8 Max Rating, TA = 125C VGS = 0V, VDS = 25V VGS = 0V, ID = 150mA VGS = 0V, ID = 150mA VGS = -10V, VDS = 25V, f = 1.0MHz VDD = 25V, ID = 150mA, RGEN = 25 Drain-to-source breakdown voltage Gate-to-source OFF voltage Gate body leakage current Drain-to-source leakage current Saturated drain-to-source current Static drain-to-source on-state resistance Change in RDS(ON) with temperature Forward transductance Input capacitance Common source output capacitance Reverse transfer capacitance Turn-ON delay time Rise time Turn-OFF delay time Fall time Diode forward voltage drop Reverse recovery time VGS(OFF) Change in VGS(OFF) with temperature mV/OC VDS = 25V, ID= 10A 200 100 - mmho ID = 100mA, VDS = 10V pF ns V ns VGS = -5.0V, ISD = 200mA VGS = -5.0V, ISD = 200mA Notes: (1) All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) (2) All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V VDD 90% INPUT -10V 10% t(ON) PULSE GENERATOR t(OFF) tr td(OFF) tF RL OUTPUT RGEN td(ON) VDD 10% 10% INPUT D.U.T. OUTPUT 0V 90% 90% 2 DN3765 3-Lead TO-252 D-PAK Package Outline (K4) A c2 E E1 L3 4 1 H D D1 1 2 3 L4 L5 Detail B b2 e b Side View Front View Rear View Gauge Plane L2 L L1 A1 Seating Plane Detail B Notes: 1. 4 terminal locations are shown, only 3 are functional. Lead number 2 was removed. Symbol MIN Dimension (inches) NOM MAX A .086 .094 A1 .005 b .025 .035 b2 .030 .045 c2 .018 .035 D .235 .240 .245 D1 .205 - E .250 .265 E1 .170 - e .090 BSC H .370 .410 L .055 .060 .070 L1 .108 REF L2 .020 BSC L3 .035 .050 L4 .040 L5 .045 .060 0O 10O 1 0O 15O JEDEC Registration TO-252, Variation AA, Issue E, June 2004. Drawings not to scale. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-DN3765 NR101207 3 |
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