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 LTC4362-1/LTC4362-2 1.2A Overvoltage/ Overcurrent Protector FEATURES
n n n n n n n n n n n n n
DESCRIPTION
The LTC(R)4362 monolithic overvoltage/overcurrent protector safeguards 2.5V to 5.5V systems from power supply overvoltage. It is designed for portable devices with multiple power supply options including wall adaptors, car battery adaptors and USB ports. The LTC4362 controls an internal 40m N-channel MOSFET in series with the input power supply. During overvoltage transients, the LTC4362 turns off the MOSFET within 1s, isolating downstream components from the input supply. In most applications, the LTC4362 rides through inductive cable transients without requiring transient voltage suppressors or other external components. An internal current sense resistor is used to implement overcurrent protection. The LTC4362 has a delayed start-up at plug-in and controlled dV/dt ramp-up for inrush current limiting. A PWRGD pin provides power good monitoring for VIN. The LTC4362 features a soft-shutdown controlled by the ON pin and drives an optional external P-channel MOSFET for negative voltage protection. Following an overvoltage condition, the LTC4362 automatically restarts with a 130ms delay. After an overcurrent fault, the LTC4362-1 remains off while the LTC4362-2 automatically restarts after a 130ms delay.
2.5V to 5.5V Operation Overvoltage Protection Up to 28V Internal 40m N-Channel MOSFET and 31m RSENSE Avalanche Rated MOSFET Requires No Input Capacitor or TVS for Most Applications <1s Overvoltage Turn-Off, Gentle Shutdown 2% Accurate 5.8V Overvoltage Threshold 20% Accurate 1.5A Overcurrent Threshold Input Withstands Up to 25kV HBM ESD with 1F COUT Controlled Power-Up dV/dt Limits Inrush Current Reverse Voltage Protection Driver Low Current Shutdown Latchoff (LTC4362-1) or Auto-Retry (LTC4362-2) After Overcurrent Available in 8-Lead DFN 2mm x 3mm Package
APPLICATIONS
n n n n n
USB Protection Handheld Computers Cell/Smart Phones MP3/MP4 Players Digital Cameras
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT, PowerPath and Hot Swap are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Protection from Overvoltage and Overcurrent
VIN 5V VOUT 5V 0.5A
Output Protected from Overvoltage at Input
VIN
IN
OUT LTC4362 COUT
ON
PWRGD GND
436212 TA01a
VOUT VIN, VOUT 5V/DIV
0.2s/DIV COUT = 10F
436212 TA01b
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1
LTC4362-1/LTC4362-2 ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)
PIN CONFIGURATION
TOP VIEW GATEP 1 IN 2 GND 3 SENSE 4 9 SENSE 8 OUT 7 OUT 6 ON 5 PWRGD
Bias Supply Voltage IN to OUT (Note 3) ................................. -0.3V to 28V Input Voltages SENSE to OUT (Notes 3 and 4) .............. -0.3V to 28V ON ........................................................... -0.3V to 9V Output Voltages OUT, PWRGD ........................................... -0.3V to 9V IN to GATEP ........................................... -0.3V to 10V Operating Temperature Range LTC4362C ................................................ 0C to 70C LTC4362I .............................................-40C to 85C Storage Temperature Range ................. -65C to 150C
DCB PACKAGE 8-LEAD (2mm 3mm) PLASTIC DFN TJMAX = 125C, JA = 64C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* LFNC LFJN LFNC PACKAGE DESCRIPTION 8-Lead Plastic DFN 8-Lead Plastic DFN 8-Lead Plastic DFN TEMPERATURE RANGE 0C to 70C 0C to 70C -40C to 85C -40C to 85C LTC4362CDCB-1#TRMPBF LTC4362CDCB-1#TRPBF LTC4362CDCB-2#TRMPBF LTC4362CDCB-2#TRPBF LTC4362IDCB-1#TRMPBF LTC4362IDCB-1#TRPBF
LTC4362IDCB-2#TRMPBF LTC4362IDCB-2#TRPBF LFJN 8-Lead Plastic DFN TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC4362-1/LTC4362-2 ELECTRICAL CHARACTERISTICS
SYMBOL Supplies VIN VIN(UVL) IIN Thresholds VIN(OV) VOV Input Pins VON(TH) ION Output Pins VOUT(UP) IOUT VGATEP(CLP) RGATEP VPWRGD(OL) RPWRGD RON ITRIP IAS EAS Delay tON tOFF(OV) tOFF(OC) tPWRGD(LH) tPWRGD(HL) tON(OFF) ESD Protection ESD Protection for IN to GND COUT = 1F Human Body Model , 25 kV Turn-On Delay Turn-Off Delay for Overvoltage Turn-Off Delay for Overcurrent PWRGD Rising Delay PWRGD Falling Delay ON High to N-channel MOSFET Off VIN High to VOUT = 0.5V, ROUT = 1k VIN = 5V IOUT = 0.5A VIN = 5V 6.5V to VOUT = 4.5V, ROUT = 1k 3A to VOUT = 4.5V 6.5V
l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 5V, VON = 0V unless otherwise noted.
PARAMETER Input Voltage Range Input Undervoltage Lockout Input Supply Current VIN Rising VON = 0V VON = 2.5V VIN Rising CONDITIONS
l l l l l l l
MIN 2.5 1.8
TYP
MAX 28
UNITS V V A A V mV V A V/ms A V M V k m A A mJ
2.1 220 1.5
2.45 400 10 5.916 200 1.5
IN Pin Overvoltage Threshold Overvoltage Hysteresis ON Input Threshold ON Pull-Down Current OUT Turn-On Ramp-Rate OUT Leakage Current IN to GATEP Clamp Voltage GATEP Pull-Down Resistance PWRGD Output Low Voltage PWRGD Pull-Up Resistance to OUT On Resistance Overcurrent Threshold Peak Avalanche Current Single Pulse Avalanche Energy
5.684 25 0.4 2.5 1.5 5 0.8 250
5.8 100
VON = 2.5V VOUT = 0.5V to 4V VON = 2.5V, VOUT = 5V VGATEP = 3V VIN = 5V, IPWRGD = 3mA VIN = 6.5V, VPWRGD = 1V IOUT = 0.5A L = 0.1mH (Note 5) IAS = 10A, L = 0.1mH (Note 5)
l l l l l l l l l
5 3 0 5.8 2 0.23 500 40
10 4.5 3 7.5 3.2 0.4 800 70 1.8
Internal N-Channel MOSFET 1.2 1.5 10 10 50 5 130 0.45 10 0.3 25 65 40 200 1 20 1 100 100
ms s s s ms s
VIN = 0V 5V, VOUT = 0.5V to PWRGD Pull Low, ROUT = 1k VON = 0V 2.5V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified.
Note 3: The minimum drain-source breakdown voltage of the internal MOSFET is 28V. Driving the IN and SENSE pins more than 28V above OUT may damage the device if the EAS capability of the MOSFET is exceeded. Note 4: An internal current sense resistor ties IN and SENSE. Driving SENSE relative to IN may damage the resistor. Note 5: The IAS and EAS typical values are based on characterization and are not production tested.
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LTC4362-1/LTC4362-2 TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at TA = 25C, VIN = 5V, VON = 0V unless otherwise noted. Input Supply Current vs Input Voltage
1000 VON = 0V 100 VON = 2.5V 10 VIN(0V) (V) IIN (A) 5.80 400 5.82 VPWRGD(OL) (mV) 300 5.84
Overvoltage Threshold vs Temperature
500
PWRGD Voltage vs PWRGD Current
200
1
5.78
100
0.1
1
10 VIN (V)
100
436212 G01
5.76 -50
0 -25 0 25 50 TEMPERATURE (C) 75 100
0
1
2 3 IPWRGD (mA)
4
5
436212 G03
436212 G02
Internal MOSFET On Resistance vs Temperature
60 40
Internal RSENSE vs Temperature
1.60
Overcurrent Threshold vs Temperature
INTERNAL RSENSE (m)
50 RON (m) VIN = 3V 40 VIN = 5V
35 ITRIP (A) -25 0 25 50 TEMPERATURE (C) 75 100
1.55
30
1.50
30
25
1.45
20 -50
-25
0 25 50 TEMPERATURE (C)
75
100
20 -50
1.40 -50
-25
0 25 50 TEMPERATURE (C)
75
100
436212 G04
436212 G05
436212 G06
Overvoltage Turn-Off Delay vs Temperature
1.0 VIN = STEP 5V TO 6.5V 14
Overcurrent Turn-Off Delay vs Temperature
IOUT = STEP 0.5A TO 3A 8
Overvoltage Turn-Off Delay vs Overdrive (VOVDRV)
VIN = STEP 5V TO (VIN(OV) + VOVDRV)
0.8
12 tOFF(OC) (s) tOFF(OV) (s) -25 0 25 50 TEMPERATURE (C) 75 100
6
tOFF(OV) (s)
0.6
10
4
0.4
0.2
8
2
0 -50
-25
0 25 50 TEMPERATURE (C)
75
100
6 -50
0
0
0.5
1 1.5 VOVDRV (V)
2
2.5
436212 G09
436212 G07
436212 G08
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4
LTC4362-1/LTC4362-2 TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at TA = 25C, VIN = 5V, VON = 0V unless otherwise noted. Normal Start-Up Sequence
VIN 5V/DIV
Turn-On Ramp-Up
VIN 5V/DIV VOUT 5V/DIV
Entering Sleep Mode
VIN 5V/DIV
VOUT 5V/DIV
VOUT 5V/DIV
VON 5V/DIV
ICABLE 0.5A/DIV
ICABLE 0.5A/DIV
ICABLE 0.5A/DIV
20ms/DIV FIGURE 4 CIRCUIT RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 G10
1ms/DIV FIGURE 4 CIRCUIT RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 G11
50s/DIV FIGURE 4 CIRCUIT RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 G12
PIN FUNCTIONS
GATEP: Gate Drive for External P-channel MOSFET. GATEP connects to the gate of an optional external P-channel MOSFET to protect against negative voltages at IN. Internally clamped to 5.8V below VIN. An internal 2M resistor connects this pin to ground. Connect to IN if unused. GND: Device Ground. IN: Supply Voltage Input. Connect this pin to the input power supply. This pin has an overvoltage threshold of 5.8V. After an overvoltage event, this pin must fall below VIN(OV) - VOV to release the overvoltage lockout. During lockout, the internal N-channel MOSFET remains off and the PWRGD pull-down releases. ON: On Control Input. A logic low at ON enables the LTC4362. A logic high at ON activates a low current pulldown on the gate of the internal N-channel MOSFET and causes the LTC4362 to enter a low current sleep mode. An internal 5A current pulls ON down to ground. Connect to ground or leave open if unused. OUT: Source of Internal N-Channel MOSFET. Connect to load. PWRGD: Power Good Status. Open-drain output with internal 500k resistive pull-up to OUT. Pulls low 65ms after the MOSFET gate ramps above its internal gate high threshold. SENSE, Exposed Pad: Current Sense Node and Internal N-Channel MOSFET Drain. An internal sense resistor between IN and SENSE is used to implement the 1.5A overcurrent threshold. The exposed pad is connected to SENSE and must be soldered to an electrically isolated printed circuit board trace to properly transfer the heat out of the package. To disable the overcurrent function, connect SENSE and the exposed pad to IN.
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5
LTC4362-1/LTC4362-2 BLOCK DIAGRAM
SENSE IN SENSE RESISTOR 31m OUT
GATEP 200k
5.8V CHARGE PUMP 1.8M 10A 5.8V
ON 1V 5A CONTROL
+ -
+ -
GATE HIGH COMPARATOR GATE HIGH THRESHOLD OVERCURRENT COMPARATOR
500k
PWRGD
+ - + -
+-
47mV
OVERVOLTAGE COMPARATOR 5.8V 5.7V
GND
436212 BD
OPERATION
Mobile devices like cell phones and MP3/MP4 players have highly integrated subsystems fabricated from deep submicron CMOS processes. The small form factor is accompanied by low absolute maximum voltage ratings. The sensitive electronics are susceptible to damage from transient or DC overvoltage conditions from the power supply. Failures or faults in the power adaptor can cause an overvoltage event. So can hot-plugging an AC adaptor into the power input of the mobile device (see Application Note 88). Today's mobile devices derive their power supply or recharge their internal batteries from multiple alternative inputs like AC wall adaptors, car battery adaptors and USB ports. A user might unknowingly plug in the wrong adaptor, damaging the device with a high or even a negative power supply voltage. The LTC4362 protects low voltage electronics from these overvoltage conditions by controlling an internal N-channel MOSFET configured as a pass transistor. At power-up (VIN > 2.1V), a start-up delay cycle begins. Any overvoltage condition causes the delay cycle to continue until a safe voltage is present. When the delay cycle completes, an internal high-side switch driver slowly ramps up the MOSFET gate, powering up the output at a controlled rate and limiting the inrush current to the output capacitor.
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6
LTC4362-1/LTC4362-2 OPERATION
If the voltage at the IN pin exceeds 5.8V (VIN(OV)), the internal N-channel MOSFET is turned off quickly to protect the load. The incoming power supply must remain below 5.7V (VOUT(OV) - VOV) for the duration of the start-up delay to restart the OUT ramp-up. An internal sense resistor is used to implement an overcurrent protection with a 1.5A current trip threshold and a 10s glitch filter. After an overcurrent, the LTC4362-1 latches off while the LTC4362-2 restarts following a 130ms delay. The LTC4362 has a CMOS compatible ON input. When driven low, the part is enabled. When driven high, the internal N-channel MOSFET is turned off and the supply current of the LTC4362 drops to 1.5A. The PWRGD pull-down releases during this low current sleep mode, UVLO, overvoltage, overcurrent or thermal shutdown and the subsequent 130ms start-up delay. After the start-up delay, the internal MOSFET gate starts its 3V/ms ramp-up. It trips an internal gate high threshold to trigger a 65ms delay. When that completes, PWRGD pulls low. The output pull-down device is capable of sinking up to 3mA allowing it to drive an optional LED. The LTC4362 has a GATEP pin that drives an optional external P-channel MOSFET to provide protection against negative voltages at IN.
APPLICATIONS INFORMATION
The typical LTC4362 application protects 2.5V to 5.5V systems in portable devices from power supply overvoltage. The basic application circuit is shown in Figure 1. Device operation and external component selection is discussed in detail in the following sections.
VIN 5V IN OUT LTC4362 5V VIO R1 1k ON PWRGD GND D1 LN1351CTR
436212 F01
OUT Control An internal charge pump enhances the internal N-channel MOSFET with the OUT ramp-rate limited to 3V/ms. This results in an inrush current into the load capacitor COUT of: IINRUSH = COUT * Overvoltage When power is first applied, VIN must remain below 5.7V (VIN(OV) - VOV) for more than 130ms before the output is turned on. If VIN then rises above 5.8V (VIN(OV)), the overvoltage comparator turns off the internal MOSFET within 1s. After an overvoltage condition, the MOSFET is held off until VIN once again remains below 5.7V for 130ms. Overcurrent The overcurrent comparator protects the internal MOSFET from excessive current. It trips when IOUT > 1.5A for more than 10s. When the overcurrent comparator trips, the internal MOSFET is turned off quickly and the PWRGD pulldown releases. The LTC4362-2 automatically tries to apply power again after a 130ms start-up delay. The LTC4362-1 has an internal latch that maintains this off state until it is reset. To reset this latch, cycle IN below 2.1V (VIN(UVL))
436212f
VOUT 5V COUT 0.5A 10F
dVOUT = COUT * 3[mA/F ] dt
Figure 1. Protection from Overvoltage and Overcurrent
Start-Up When VIN is less than the undervoltage lockout level of 2.1V, the internal N-channel MOSFET is held off and the PWRGD pull-down is high impedance. When VIN rises above 2.1V and ON is held low, a 130ms delay cycle starts. Any undervoltage or overvoltage event at IN (VIN < 2.1V or VIN > 5.7V) restarts the delay cycle. This delay allows the MOSFET to isolate the output from any input transients that occur at start-up. When the delay cycle completes, the MOSFET is turned on and OUT starts its slow ramp-up.
7
LTC4362-1/LTC4362-2 APPLICATIONS INFORMATION
or ON above 1.5V (VON(TH)) for more than 500s. After reset, the LTC4362-1 goes through the start-up cycle. In applications not requiring the overcurrent protection, tie SENSE and the exposed pad to the IN pin. PWRGD Output PWRGD is an active low output with a MOSFET pull-down to ground and a 500k resistive pull-up to OUT. The PWRGD pin pull-down releases during the low current sleep mode (invoked by ON high), UVLO, overvoltage, overcurrent or thermal shutdown and the subsequent 130ms start-up delay. After the start-up delay, the internal MOSFET gate starts its 3V/ms ramp-up and control of the PWRGD pull-down passes on to the internal gate high comparator. When the internal gate is higher than the gate high threshold for more than 65ms, PWRGD asserts low. When the internal gate goes lower than the gate high threshold, the PWRGD pull-down releases. The PWRGD pull-down device is capable of sinking up to 3mA of current allowing it to drive an optional LED. To interface PWRGD to another I/O rail, connect a resistor from PWRGD to that I/O rail with a resistance low enough to override the internal 500k pull-up to OUT. Figure 2 details PWRGD behavior for a LTC4362-2 with 1k pull-up to 5V at PWRGD.
START-UP FROM UVLO OV RESTART FROM OV
ON Input ON is a CMOS compatible, active low enable input. It has a default 5A pull-down to ground. Connect this pin to ground or leave open to enable normal device operation. If it is driven high while the MOSFET is turned on, the MOSFET is turned off gradually with an internal 40A gate pull-down, minimizing input voltage transients. The LTC4362 then goes into a low current sleep mode, drawing only 1.5A at IN. When ON goes back low, the part restarts with a 130ms delay cycle. GATEP Control GATEP has a 2M resistive pull-down to ground and a 5.8V Zener clamp in series with a 200k resistor to IN. It controls the gate of an optional external P-channel MOSFET to provide negative voltage protection. The 2M pull-down turns on the external P-channel MOSFET once VIN is more than the P-channel MOSFET gate threshold voltage. The IN to GATEP Zener protects the external Pchannel MOSFET from gate overvoltage by clamping its VGS to 5.8V when VIN goes high.
ON
RESTART FROM ON
OC RESTART FROM OC
OC THRESHOLD
ICABLE VIN(OV) VIN(UVL) IN VIN(OV) - VOV
OUT INTERNAL GATE HIGH MOSFET THRESHOLD GATE
GATE HIGH THRESHOLD GATE HIGH THRESHOLD GATE HIGH THRESHOLD GATE HIGH THRESHOLD
ON
PWRGD 130ms 65ms 130ms 65ms 130ms 65ms 130ms 65ms 10s (NOT TO SCALE)
436212 F02
Figure 2. PWRGD Behavior
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8
LTC4362-1/LTC4362-2 APPLICATIONS INFORMATION
WALL ADAPTOR AC/DC
RIN
LIN ICABLE CABLE
IN
MOBILE DEVICE COUT LOAD VIN 10V/DIV
+
436212 F03a
ICABLE 20A/DIV 5s/DIV RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 F03b
Figure 3. 20V Hot-Plug Into a 10F Capacitor
WALL ADAPTOR AC/DC
RIN
LIN ICABLE CABLE
IN IN OUT LT4362
OUT
MOBILE DEVICE
+
COUT GND
LOAD
VIN 10V/DIV VOUT 1V/DIV ICABLE 1A/DIV 5s/DIV RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 F04b
436212 F04a
Figure 4. 20V Hot-Plug Into the LTC4362
Thermal Shutdown The internal N-channel MOSFET is protected by a thermal shutdown circuit. If its temperature reaches 150C, it will shut off immediately and the PWRGD pull-down releases. It will turn on again after its temperature drops below 140C. Input Transients Figure 3 shows a typical setup when an AC wall adaptor charges a mobile device. The inductor LIN represents the lumped equivalent inductance of the cable and the EMI filter found in some wall adaptors. RIN is the lumped equivalent resistance of the cable, adaptor output capacitor ESR and the connector contact resistance.
LIN and RIN form an LC tank circuit with any capacitance at IN. If the wall adaptor is powered-up first, plugging the wall adaptor output to IN does the equivalent of applying a voltage step to this LC circuit. The resultant voltage overshoot at IN can rise to twice the DC output voltage of the wall adaptor (or more if ceramic capacitors with large voltage coefficients are used) as shown in Figure 3. Figure 4 shows the 20V adaptor output applied to the LTC4362. Due to the low capacitance at the IN pin, the plug-in transient has been brought down to a manageable level. Input transients also occur when the current through the cable inductance changes abruptly. This can happen when the LTC4362 turns off its internal N-channel MOSFET quickly in an overvoltage or overcurrent event.
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9
LTC4362-1/LTC4362-2 APPLICATIONS INFORMATION
Figure 5 shows an input transient after an overcurrent. The current in LIN will cause VIN to overshoot and avalanche the internal N-channel MOSFET to COUT. adaptor is mistakenly hot-plugged into the 5V device with the USB input already live. As shown in Figure 7, a large current can build up in LIN to charge up COUT. When the internal MOSFET shuts off, this current is dumped into COUT, causing a large 40V transient. The LTC4362 limits this to a 1V rise in the output voltage.
VIN 10V/DIV
TURN-OFF ICABLE 10A/DIV
VOUT 5V/DIV ICABLE 2A/DIV
OVERCURRENT
VOUT 2V/DIV 2s/DIV FIGURE 4 CIRCUIT RIN = 150m, LIN = 0.7H LOAD = 10, COUT = 10F
436212 F05
VIN 10V/DIV 1s/DIV RIN = 150m, LIN = 2H LOAD = 10 COUT = 10F (16V, SIZE 1210)
436212 F07
Figure 5. Input Transient After Overcurrent
Typically, IN will be clamped to a voltage of VOUT + 1.3*(30V BVDSS of Internal MOSFET) = 45V. The single, nonrepetitive, pulse of energy (EAS) absorbed by the MOSFET during this avalanche breakdown with a peak current IAS is approximated by the formula: 1 E AS = * LIN *IAS 2 2 For LIN = 0.7H and IAS = 3A, then EAS = 3.15J. This is within the IAS and EAS capabilities of the internal MOSFET. So in most instances, the LTC4362 can ride through such transients without a bypass capacitor, transient voltage suppressor or other external components at IN. Figure 6 shows a particularly bad situation which can occur in a mobile device with dual power inputs. A 20V wall
RIN 20V WALL ADAPTOR LIN
Figure 7. Overvoltage Protection Waveforms When 20V Plugged into 5V System
If the voltage rise at VOUT due to the discharge of the energy in LIN into COUT is not acceptable or the avalanche capability of the MOSFET is exceeded, an additional external clamp Z1 such as the SMAJ24A can be placed between IN and GND. Figure 8 shows the resulting waveform.
ICABLE 10A/DIV VOUT 2V/DIV
+ -
ICABLE IN IN OUT B160 LT4362 COUT LOAD OUT
VIN 10V/DIV 1s/DIV RIN = 150m, LIN = 0.7H LOAD = 10 COUT = 10F (16V, SIZE 1210)
436212 F08
5V USB
+ -
GND
436212 F06
Figure 8. Overvoltage Protection Waveforms When 20V Plugged into 5V System with External IN Clamp
436212f
Figure 6. Setup for Testing 20V Plugged into 5V System
10
LTC4362-1/LTC4362-2 APPLICATIONS INFORMATION
COUT is the decoupling capacitor of the protected circuit and its value is largely determined by the circuit requirements. Using a larger COUT works with LIN to slow down the dV/dt at OUT, allowing time for the LTC4362 to shut off its MOSFET before VOUT overshoots to a dangerous voltage. A larger COUT also helps to lower the VOUT due to the discharge of energy in LIN if the MOSFET BVDSS is used as an input clamp. Layout Considerations Figure 9 shows an example PCB layout for the LTC4362 with an external P-channel MOSFET for negative voltage protection. Keep the traces to the internal N-channel MOSFET wide and short. The PCB traces associated with the power path through the internal N-channel MOSFET should have low resistance.
SUPPLY 6 5 4 1 Si1471DH 2 3 4 1 2 3 GND
436212 F08
8 LTC4362 9 7 6 5 OUT
Figure 9. Layout for External P-channel MOSFET Configuration
PACKAGE DESCRIPTION
DC Package 8-Lead Plastic DFN (2mm x 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
2.00 0.10 (2 SIDES) 0.70 0.05 1.35 0.05 1.65 0.05 3.00 0.10 (2 SIDES) PACKAGE OUTLINE PIN 1 BAR TOP MARK (SEE NOTE 6) 4 0.25 0.45 BSC 1.35 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.00 - 0.05 0.05 0.200 REF 0.75 0.05 1.35 REF BOTTOM VIEW--EXPOSED PAD 1 R = 0.115 TYP R = 0.05 5 TYP 0.40 8 0.10
3.50 0.05 2.10 0.05
1.35 0.10 1.65 0.10 PIN 1 NOTCH R = 0.20 OR 0.25 45 CHAMFER
(DCB8) DFN 0106 REV A
0.23 0.45 BSC
0.05
NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
436212f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4362-1/LTC4362-2 TYPICAL APPLICATION
5V System Protected from 24V Power Supplies and Overcurrent
M1 Si1471DH IN Z1 OPTIONAL GATEP Z1: SMAJ24A LTC4362 5V VIO R1 1k ON GND
436212 TA02
VIN 5V
OUT COUT 10F
VOUT 5V 0.5A
PWRGD
D1 LN1351CTR
RELATED PARTS
PART NUMBER LTC2935 LT3008 LT3009 LTC3576/ LTC3576-1 LTC4090/ LTC4090-5 LTC4098 LTC4210 LTC4213 LT4356 LTC4411 LTC4412 LTC4413-1/ LTC4413-2 DESCRIPTION Ultralow Power Supervisor with Eight Pin-Selectable Thresholds 20mA, 45V, 3A IQ Micropower LDO 20mA, 3A IQ Micropower LDO Switching USB Power Manager with USB OTG + Triple Step-Down DC/DCs High Voltage USB Power Manager with Ideal Diode Controller and High Efficiency Li-Ion Battery Charger USB-Compatible Switchmode Power Manager with OVP Single Channel, Low Voltage Hot SwapTM Controller No RSENSE Electronic Circuit Breaker Surge Stopper Overvoltage/Overcurrent Protection Regulator SOT-23 Ideal Diode 2.5V to 28V, Low Loss PowerPathTM Controller in ThinSOT Dual 2.6A, 2.5V to 5.5V Fast Ideal Diodes in 3mm x 3mm DFN COMMENTS 500nA Quiescent Current, 2mm x 2mm 8-Lead DFN and TSOT-23 Packages 280mV Dropout Voltage, Low IQ: 3A, VIN = 2.0V to 45V, VOUT = 0.6V to 39.5V; ThinSOTTM and 2mm x 2mm DFN-6 Packages 280mV Dropout Voltage, Low IQ: 3A, VIN = 1.6V to 20V, VOUT = 0.6V to 19.5V; ThinSOT and SC-70 Packages Complete Multifunction PMIC: Bidirectional Switching Power Manager + 3 Bucks + LDO High Efficiency 1.2A Charger from 6V to 38V (60V Max) Input Charges Single Cell Li-Ion Batteries Directly from a USB Port . High VIN: 38V Operating, 60V Transient; 66V OVP 1.5A Max Charge Current from Wall, 600mA Charge Current from USB Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6 Controls Load Voltages from 0V to 6V. 3 Selectable Circuit Breaker Thresholds. Dual Level Overcurrent Fault Protection Wide Operation Range: 4V to 80V. Reverse Input Protection to -60V. Adjustable Output Clamp Voltage 2.6A Forward Current, 28mV Regulated Forward Voltage More Efficient than Diode ORing, Automatic Switching Between DC Sources, Simplified Load Sharing 130m On-Resistance, Low Reverse Leakage Current, 18mV Regulated Forward Voltage (LTC4413-2 with Overvoltage Protection Sensor)
436212f
12 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0610 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2010


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