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NJU8789
Monaural BTL Output Clock-less Switching Driver for Class D Amplifier
GENERAL DESCRIPTION
The NJU8789 is a monaural BTL output switching driver for class D amplifier including Separated Power Source terminals between Input and Output. It converts 1bit digital signal input, such as PWM or PDM signal. The NJU8789 realizes very high power-efficiency by class D operation. Therefore, It is suitable for portable set with speaker. NJU8789V
PACKAGE OUTLINE
FEATURES
Clock-less switching driver 1-channel 1bit Audio Signal Input Monaural BTL Output Standby(Hi-Z) Control Function Operating Voltage : 1.8V to 4.5V Driving Voltage : VDD to 4.5V CMOS Technology Package Outline : SSOP10
PIN CONFIGURATION
VDD IN NC TEST STBYb
1 2 3 4 5
10 9 8 7 6
VSS OUTP VDDO OUTN VSS
BLOCK DIAGRAM
VDD VDDO
IN
LEVEL SHIFTER
OUTN
OUTP STBYb
LEVEL SHIFTER
NJU8789
VSS
Ver.2009-01-21
-1-
NJU8789
TERMINAL DESCRIPTION
No. 1 8 6 10 2 9 7 SYMBOL VDD VDDO VSS IN OUTP OUTN I/O - - - I O O Function Power Supply Output Power Supply GND terminal
1-bit Data Input Terminal Positive output Negative output Standby Control Terminal 5 STBYB I L: Standby Maker test Terminal 4 TEST I L: Normal operation Non connection 3 NC - *VSS(Terminal No.6,10) should be connected at a nearest point to the IC.
INPUT TERMINAL STRUCTURE
VDD
Input Terminal
VSS
-2-2-
Ver.2009-01-21
NJU8789 NJU3555
FUNCTIONAL DESCRIPTION
(1) IN terminal (Input Signal) The input signals are PWM signals or PDM signals. (2) OUTP and OUTN terminal (Output Signal) The OUTP and OUTN generate PMW output signal The NJU8789 drives a speaker by the BTL output, and OUTP is a positive output and OUTN is a negative outputs. A switching regulator with a high response against a voltage fluctuation is the best selection for the VDDO, which is the power supply for output drivers. (3) Standby Control Function By setting the STBYb terminal to "L", the NJU8789 becomes standby condition. During standby condition, OUTP and OUTN are in Hi-Z. The STBYb terminal must be connected to VDD when not using the Standby Function.
Ver.2009-01-21
-3-
NJU8789
ABSOLUTE MAXIMUM RATINGS
(Ta=25C) PARAMETER Supply Voltage Input Voltage Operating Temperature Storage Temperature Power Dissipation Thermal Resistance SYMBOL VDD VDDO Vin Ta Tstg PD ja RATING -0.3 to +5.5 -0.3 to +5.5 -0.3 to VDD+0.3 -40 to +85 -40 to +125 370* 270 UNIT V V C C mW C /W
* : Mounted on two-layer board of based on the EIA/JEDEC STD. Note 1) All voltage values are specified as VSS=0V. Note 2) If the LSI is used on condition beyond the absolute maximum rating, the LSI may be destroyed. Using LSI within electrical characteristics is strongly recommended for normal operation. Use beyond the electrical characteristics conditions will cause malfunction and poor reliability. Note 3) De-coupling capacitors should be connected between VDD-VSS and VDDO-VSS due to the stabilized operation.
ELECTRICAL CHARACTERISTICS
DC Characteristics (Ta=25C, VDD=2.2V, VDDO=3.5V, VSS=0V, unless otherwise noted) PARAMETER VDD Supply Voltage VDDO Supply Voltage Output Driver High side Resistance Output Driver Low side Resistance Operating Current at Standby SYMBOL VDD VDD RONH RONH IST ISTO IDD IDDO VIH Input Voltage VIL Input Leakage Current ILK VOUT=VDDO-0.1V VOUT=0.1V VDD,IN=0V No-load operating VDDO,IN=0V No-load operating VDD fIN=30kHz No-load operating VDDO fIN=30kHz No-load operating IN,STBYb IN STBYb IN,STBYb CONDITIONS MIN. 1.8 VDD 0.7VDD 0 0 TYP. 2.2 3.5 0.6 0.6 50 180 MAX. 4.5 4.5 1.2 1.2 0.4 0.4 100 360 VDD 0.3VDD 0.5 1 UNIT V V A A A A V V A
Operating Current at Operating (Mute signal input)
-4-4-
Ver.2009-01-21
NJU8789 NJU3555
AC Characteristics PARAMETER Input Pulse Width "H" Input Pulse Width "L" Turn up Pulse Delay Time Turn down Pulse Delay Time Turn up Time Turn down Time Input Frequency (Ta = 25 C, VDD =2.2 V, VDDO =3.5 V, VSS = 0.0 V unless otherwise noted) SYMBOL CONDITIONS MIN TYP MAX UNIT tH tL tPDH tPDL tUP tDN fin IN IN IN-OUTP, IN-OUTN, CL = 10 pF IN-OUTP, IN-OUTN, CL = 10 pF IN, STBYb IN, STBYb IN 25 25 20 25 25 50 50 2000 ns ns ns ns ns ns kHz
TIMING CHARACTERISTICS
Input Pulse Width "H" and "L".
IN
0.5VDD
0.5VDD
0.5VDD
tH
tL
Pulse Delay Time
IN
0.5VDD
0.5VDD
OUTP
0.5VDDO
0.5VDDO
OUTN
0.5VDDO
0.5VDDO
tPDH
tPDL
Output Control Signal Input
IN
STBYb
0.3VDD
0.7VDD
0.7VDD
0.3VDD
tri tUP
tfi tDN
Ver.2009-01-21
-5-
NJU8789
APPLICATION CIRCUIT
LO
Signal
IN(2)
OUTN(7)
220H
Control
STBYb(5) OUTP(9)
8 Speaker
TEST(4)
10F
0.1F +
NJU8789
Logic Power
VDD(1) VSS(6or10)
VDDO(8)
1F
10F +
Output Power
Note 4) De-coupling capacitors must be connected between each power supply terminal and GND terminal. Note 5) The power supply for VDDO requires fast driving response performance such as a switching regulator for T.H.D. Note 6) The above circuit shows only application example and does not guarantee the any electrical characteristics. Therefore, please consider and check the circuit carefully to fit your application. Note 7) VDD and VDDO must be applied with conbecting to VSS in STBYb must be connected to VSS. Note 8) STBYb must be connected to VSS when applying voltage to VDD and VDDO. Note 9) It is necessary to connect the Coil(Lo) to OUTN or OUTP terminal and Speaker for low power consumption of the NJU8789. Note 10) (1) to (10) indicates pin numbers. .
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
-6-6-
Ver.2009-01-21

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