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DCR4100W42
Phase Control Thyristor Preliminary Information
DS5753-2.4 May 2009 (LN26738)
FEATURES
Double Side Cooling High Surge Capability
KEY PARAMETERS VDRM IT(AV) ITSM dV/dt* dI/dt 4200V 3880A 53500A 1500V/s 400A/s
APPLICATIONS
High Power Drives High Voltage Power Supplies Static Switches VOLTAGE RATINGS
Part and Ordering Number Repetitive Peak Voltages VDRM and VRRM V 4200 4000 3500 3000 Conditions
* Higher dV/dt selections available
DCR4100W42 DCR4100W40 DCR4100W35 DCR4100W30
Tvj = -40 to 125 C C, IDRM = IRRM = 200mA, VDRM, VRRM tp = 10ms, VDSM & VRSM = VDRM & VRRM + 100V respectively
Lower voltage grades available.
Outline type code: W (See Package Details for further information)
ORDERING INFORMATION
When ordering, select the required part number shown in the Voltage Ratings selection table. For example: DCR4100W42
Note: Please use the complete part number when ordering and quote this number in any future correspondence relating to your order.
Fig. 1 Package outline
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DCR4100W42
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60 unless stated otherwise C
Symbol Double Side Cooled IT(AV) IT(RMS) IT
Parameter
Test Conditions
Max.
Units
Mean on-state current RMS value Continuous (direct) on-state current
Half wave resistive load -
3880 6095 5725
A A A
SURGE RATINGS
Symbol ITSM It
2
Parameter Surge (non-repetitive) on-state current I t for fusing
2
Test Conditions 10ms half sine, Tcase = 125 C VR = 0
Max. 53.5 14.31
Units kA MA s
2
THERMAL AND MECHANICAL RATINGS
Symbol Rth(j-c) Parameter Thermal resistance - junction to case Test Conditions Double side cooled Single side cooled DC Anode DC Cathode DC Rth(c-h) Thermal resistance - case to heatsink Clamping force 76kN (with mounting compound) Tvj Virtual junction temperature On-state (conducting) Reverse (blocking) Tstg Fm Storage temperature range Clamping force Double side Single side Min. -55 68.0 Max. 0.00631 0.01115 0.01453 0.0014 0.0028 135 125 125 84.0 Units C/W C/W C/W C/W C/W C C C kN
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DCR4100W42
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol IRRM/IDRM dV/dt dI/dt
Parameter Peak reverse and off-state current Max. linear rate of rise of off-state voltage Rate of rise of on-state current
Test Conditions At VRRM/VDRM, Tcase = 125 C To 67% VDRM, Tj = 125 gate open C, From 67% VDRM to 2x IT(AV) Gate source 30V, 10 , tr < 0.5s, Tj = 125 C
Repetitive 50Hz Non-repetitive
Min. -
Max. 200 1500 200 400
Units mA V/s A/s A/s
VT(TO)
Threshold voltage - Low level Threshold voltage - High level
700A to 4100A at Tcase = 125 C 4100A to 12000A at Tcase = 125 C 700A to 4100A at Tcase = 125 C 4100A to 12000A at Tcase = 125 C VD = 67% VDRM, gate source 30V, 10 tr = 0.5s, Tj = 25 C
TBD
0.83 1.0 0.1688 0.1263 TBD
V V m m s
rT
On-state slope resistance - Low level On-state slope resistance - High level
tgd
Delay time
tq
Turn-off time
Tj = 125 VR = 200V, dI/dt = 1A/s, C, dVDR/dt = 20V/s linear
250
500
s
QS IL IH
Stored charge Latching current Holding current
IT = 2000A, Tj = 125 dI/dt - 1A/s, C, Tj = 25 VD = 5V C, Tj = 25 RG-K = , ITM = 500A, IT = 5A C,
1500 -
4500 3 300
C A mA
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DCR4100W42
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol VGT VGD IGT IGD
Parameter Gate trigger voltage Gate non-trigger voltage Gate trigger current Gate non-trigger current
Test Conditions VDRM = 5V, Tcase = 25 C At VDRM, Tcase = 125 C VDRM = 5V, Tcase = 25 C VDRM = 5V, Tcase = 25 C
Max. 1.5 TBD 250 TBD
Units V V mA mA
CURVES
7000
Instantaneous on-state current IT - (A)
6000 5000 4000 3000 2000 1000 0 0.8 1.0
min 125 C max 125 C min 125 C max 25 C
1.2
1.4
1.6
1.8
2.0
Instantaneous on-state voltage VT - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION VTM = A + Bln (IT) + C.IT+D. IT
A = 0.348967 B = 0.066851 C = 0.000102 D = 0.003788 these values are valid for Tj = 125 for IT 500A to 10000A C
Where
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DCR4100W42
SEMICONDUCTOR
16 14
130
Maximum case temperature, T case ( C )
120 110 100 90 80 70 60 50 40 30 20 10 0 0 1000 2000 3000 4000
Mean power dissipation - (kW)
12 10 8 6 4 2 0 0 1000 2000 3000 4000 5000 6000 180 120 90 60 30
180 120 90 60 30
o
5000
6000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.3 On-state power dissipation - sine wave
Fig.4 Maximum permissible case temperature, double side cooled - sine wave
16
Maximum heatsink temperature, T Heatsink - ( C )
130 120 110 100 90 80 70 60 50 40 30 20 10 0 0 1000 2000 3000 4000 5000 6000 180 120 90 60 30
o
14
Mean power dissipation - (kW)
12 10 8 6 4 2 0 0 1000 2000 3000 4000 5000 6000 7000 8000 d.c. 180 120 90 60 30
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature, double side cooled - sine wave
Fig.6 On-state power dissipation - rectangular wave
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DCR4100W42
SEMICONDUCTOR
130 Maximum permissible case temperature , Tcase - ( C) 120 110 100 90 80 70 60 50 40 30 20 10 0
0
130 Maximum heatsik temperature Theatsink - (oC) d.c. 180 120 90 60 30 120 110 100 90 80 70 60 50 40 30 20 10 0
1000 2000 3000 4000 5000 6000 7000 8000 0 1000 2000 3000 4000 5000 6000 7000 8000
d.c. 180 120 90 60 30
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.7 Maximum permissible case temperature, double side cooled - rectangular wave
16 Double Side Cooling
Fig.8 Maximum permissible heatsink temperature, double side cooled - rectangular wave
1 0.8816 0.0106818 1.5197 0.0170581 1.4106 0.0158344 [1] 2 1.2993 0.058404 3.2398 0.2424644 2.4667 0.1786951 3 2.8048 0.3584979 5.7622 6.013 6.7451 3.6201 4 1.3305 1.1285 0.6312 15.364 3.9054 6.196
Double side cooled Anode side cooled Cathode side cooled
Ri ( C/kW) Ti (s) Ri ( C/kW) Ti (s) Ri ( C/kW) Ti (s)
Thermal Impedance, Zth(j-c) - ( C/kW)
14 12 10 8
Anode Side Cooling Cathode Sided Cooling
Zth = A [Ri x ( 1-exp. (t/ti))]
ARth(j-c) Conduction
6 4 2 0 0.001 0.01 0.1 1 10 100
Tables show the increments of thermal resistance R th(j-c) when the device operates at conduction angles other than d.c.
Double side cooling AZth (z) Anode Side Cooling AZth (z) Cathode Sided Cooling AZth (z)
A 180 120 90 60 30 15
sine. 1.00 1.16 1.33 1.48 1.61 1.66
rect. 0.67 0.97 1.13 1.31 1.51 1.61
A 180 120 90 60 30 15
sine. 0.94 1.08 1.23 1.37 1.47 1.52
rect. 0.64 0.91 1.06 1.22 1.38 1.47
A 180 120 90 60 30 15
sine. 0.95 1.09 1.25 1.38 1.49 1.54
rect. 0.65 0.92 1.07 1.23 1.40 1.49
Time ( s )
Fig.9 Maximum (limit) transient thermal impedance - junction to case ( C/kW)
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DCR4100W42
SEMICONDUCTOR
60 Conditions: Tcase = 125C VR =0 Pulse width = 10ms
180 160
Surge current, ITSM - (kA)
60 Conditions: Tcase= 125C VR = 0 half-sine wave
Surge current, ITSM- (kA)
50
140 120 100 80 60 40 20
40
20
30
20 1 10 100
0 1 10
0 100
Number of cycles
Fig.10 Multi-cycle surge current
30000 800 700 Reverse recovery current, IRR - (A) 600
Pulse width, tP - (ms)
Fig.11 Single-cycle surge current
25000 Stored Charge, QS - (uC)
Max QS = 5404.7*(di/dt)0.4733
Conditions: Tj = 125C, VRpeak ~ 2500V, VRM ~ 1700V snubber as required to control reverse voltages
20000
Min QS = 2246.2*(di/dt)
0.5657
IRR max = 62.4*(di/dt)0.7284
500 400 300 200 100 0
15000
10000
5000
Conditions: Tj = 125C, VRpeak ~ 2500V, VRM ~ 1700V snubber as required to control reverse voltages
IRR min = 36.417*(di/dt)0.8041
0 0 5 10 15 20 25 30 Rate of decay of on-state current, di/dt - (A/us)
0
5
10
15
20
25
2
I2t
I t (MA s)
30
ITSM
40
2
Rate of decay of on-state current, di/dt - (A/us)
Fig.12 Stored charge
Fig.13 Reverse recovery current
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DCR4100W42
SEMICONDUCTOR
10 9
Pulse Width us 100 200 500 1000 10000 Pulse Power PGM (Watts) Frequency Hz 50 100 150 150 150 150 150 150 150 100 20 -
Gate trigger voltage, VGT - (V)
8 7 6 5 4 3 2 1 0 0
400 150 125 100 25 -
Upper Limit
Preferred gate drive area
Tj = 125 C
o
Tj = 25oC
Tj = -40oC
Lower Limit
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig14 Gate Characteristics
30
Lower Limit Upper Limit 5W 10W 20W 50W 100W 150W -40C
25
Gate trigger voltage, VGT - (V)
20
15
10
5
0 0 1 2 3 4 5 6 7 8 9 10
Gate trigger current, IGT - (A)
Fig. 15 Gate characteristics
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DCR4100W42
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise. DO NOT SCALE.
3rd ANGLE PROJECTION
DO NOT SCALE
IF IN DOUBT ASK
HOLE O3.60 X 2.00 DEEP (IN BOTH ELECTRODES)
20 OFFSET (NOM.) TO GATE TUBE
Device DCR1594SW28 DCR1595SW42 DCR1596SW52 DCR5450W22 DCR4910W28 DCR4100W42 DCR3640W52 DCR2950W65 DCR2450W85
Maximum Minimum Thickness Thickness (mm) (mm) 27.34 26.79 27.57 27.02 27.69 27.14 27.265 26.715 27.34 26.79 27.57 27.02 27.69 27.14 27.95 27.4 28.31 27.76
O120.0 MAX. CATHODE
O1.5
O84.6 NOM.
GATE O84.6 NOM. FOR PACKAGE HEIGHT SEE TABLE
ANODE
Lead length: 420mm Lead terminal connector: M4 ring Package outline type code: W
Fig.16 Package outline
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DCR4100W42
SEMICONDUCTOR
POWER ASSEMBLY CAPABILITY The Power Assembly group was set up to provide a support service for those customers requiring more than the basic semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages and current capability of our semiconductors. We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today. The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers. Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete Solution (PACs). HEATSINKS The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request. For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or Customer Services.
Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be followed. http://www.dynexsemi.com e-mail: power_solutions@dynexsemi.com HEADQUARTERS OPERATIONS DYNEX SEMICONDUCTOR LTD Doddington Road, Lincoln Lincolnshire, LN6 3LF. United Kingdom. Tel: +44(0)1522 500500 Fax: +44(0)1522 500550 CUSTOMER SERVICE Tel: +44(0)1522 502753 / 502901. Fax: +44(0)1522 500020
Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRODUCED IN UNITED KINGDOM.
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request. All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.
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