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| November 2006 rev 1.3 Low Frequency EMI Reduction IC Features * * * * * * FCC approved method of EMI attenuation. Provides up to 15dB of EMI suppression. Generates a 1X or 1/2X low EMI spread spectrum clock of the input frequency. Input frequency range: 8MHz to 32MHz. Internal loop filter minimizes external components and board space. Frequency deviation: * * * * * * * P2005A/S deviations ranging form 0.6% to 3.0%. Refer Frequency Deviation Selections Table. The P2005A/S reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P2005A/S allows significant system cost savings by reducing the number of circuit board layers ferrite beads, required to pass EMI regulations. The P2005A/S uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The P2005A/S modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called `spread spectrum clock generation'. shielding and other passive components that are traditionally P2005A: 1% to 3% P2005S: 0.6% to 1.8% SSON# control pin for spread spectrum enable and disable options. Low cycle-to-cycle jitter. 3.3V or 5V operating voltage range. Ultra-low power CMOS design. Available in 8-pin SOIC and TSSOP. Product Description The P2005A/S is a versatile spread spectrum frequency modulator frequencies designed from specifically to for input Refer clock Output 8MHz 32MHz. Frequency Selection Table. The P2005A/S can generate an EMI reduced clock from crystal, ceramic resonator, or system clock. The P2005A/S offers various percentage Applications The P2005A/S is targeted towards EMI management for high-speed digital applications such as PC peripheral devices, consumer electronics and embedded controller systems. BlockDiagram SR0 SSON# VDD DIV2 Modulation XIN Crystal Oscillator XOUT Frequency Divider Feedback Divider Phase Detector Loop Filter PLL VCO Output Divider MODOUT VSS PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 * Tel: 408-879-9077 * Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. November 2006 rev 1.3 Pin Configuration XIN /CLK XOUT DIV2 VSS 1 2 8 7 6 5 P2005A/S VDD ModOUT SSON# SR0 P2005A/S 3 4 Pin Description Pin# 1 2 3 4 5 6 7 8 Pin Name XIN/CLK XOUT DIV2 VSS SR0 SSON# ModOUT VDD Type I O I P I I O P Connect to crystal or clock. Crystal output. Description Digital logic input used to select normal output mode or divide-by-two output mode. When this pin is HIGH, the frequency of the output clock is the same as the input clock frequency. When it is tied low, the output frequency is half the input clock frequency. This pin has an internal pull-up resistor. Ground to entire chip. Connect to system ground. Digital logic input used to select Spreading Range Refer Modulation Output and Spreading Range Selection Table. This pin has an internal pull-up resistor. Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pulllow resistor. Spread spectrum clock output. Power supply for the entire chip (+3.3V or 5.0V) Output Frequency Selections Input Frequency DIV2 0 (1/2 X) 1 (1X) 8MHz 4MHz 8MHz 12MHz 6MHz 12MHz 16MHz 8MHz 16MHz 20MHz 10MHz 20MHz 24MHz 12MHz 24MHz 28MHz 14MHz 28MHz 32MHz 16MHz 32MHz Output Frequency Frequency Deviation Selections as a Function of Input Frequency P/N SR0 0 1 0 1 Input Frequency Range 8MHz 3.0% 2.5% 1.8% 1.5% 12MHz 2.5% 2.0% 1.5% 1.2% 16MHz 2.0% 1.8% 1.2% 1.1% 20MHz 1.8% 1.5% 1.1% 0.9% 24MHz 1.5% 1.3% 0.9% 0.8% 28MHz 1.5% 1.3% 0.9% 0.8% 32MHz 1.3% 1.0% 0.8% 0.6% Modulation Rate (KHz) P2005A (XIN/20) * 62.5 P2005S Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 8 November 2006 rev 1.3 Spread Spectrum P2005A/S The Output Frequency Selection Table and the Frequency Deviations Selections Table illustrate the two possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: The center frequency is the frequency of the external reference input on CLKIN, Pin1). Example: The P2005A/S is designed for communications, digital video and imaging applications. It is not only optimized for operation in the 8MHz - 32MHz range, but its output frequency can be extended down to one half of the input clock frequency using the divide-by-two feature. This feature extends low frequency as low as to 4MHz. Setting Pin 3 low (DIV2 = 0; Divide-by-two mode) sets the output frequency (ModOUT) to half the frequency of the input clock (CLKIN). This is a simple way to generate a spread spectrum modulated low frequency clock when only a higher frequency signal is available. If you want the output frequency to be the same as the input, you can either set DIV2=1 or leave it unconnected. Selecting the P2005A/S's spread options is a matter of either setting SR0=1 or SR0=0. Setting SR0=0 set as a lower modulation spread, while setting it to 1 introduces a wider spectral spread in the output clock. Refer Modulation output and Spreading Selections Tables. The example given in the figure below shows the device set to the divide-by-two mode (DIV2=0) with a lower spectrum range (SR0=0). The versatility provided by allowing both clock division and spread spectrum on one chip is already proving to be a popular solution among leading system manufacturers. P2005A/S Application Schematic +3.3V 8.832MHz Crystal 1 CLKIN 2 XOUT 3 DIV2 4 VSS VDD 8 MODOUT 7 0.1F SSON# 6 SR0 5 Modulated 4.416MHz is connected to CLK input pin of the system P2005A/S Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 8 November 2006 rev 1.3 Absolute Maximum Ratings Symbol VDD, VIN TSTG TA Ts TJ TDV Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) P2005A/S Parameter Rating -0.5 to +7.0 -65 to +125 0 to 70 260 150 2 Unit V C C C C KV Voltage on any pin with respect to Ground Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics Symbol VIL VIH IIL IIH IXOL IXOH VOL VOH ICC IDD VDD tON ZOUT Input low voltage Input high voltage Input low current (pull-up resistors on inputs SR0, SR1, CP0 and CP1) Input high current (pull-down resistor on input SSON#) XOUT Output Low Current (@ 0.4V, VDD = 3.3V) XOUT Output High Current (@ 2.5V, VDD = 3.3V) Output low voltage (VDD = 3.3V, IOL = 20mA) Output high voltage (VDD = 3.3V, IOH = 20mA) Dynamic supply current normal mode (3.3V, and 15pF loading) Static supply current standby mode Operating voltage Power up time (first locked clock cycle after power up) Clock output impedance 2.5 6.0 3.1 - Parameter Min GND - 0.3 2.0 - Typ 3 3 7.0 0.6 3.3 0.18 50 Max 0.8 VDD + 0.3 -35 35 - Unit V V A A mA 0.4 8.3 5.5 - V V mA mA V mS AC Electrical Characteristics Symbol fIN fOUT tLH* tHL* tJC tD Input frequency Output frequency 1X Option 1/2X Option Parameter Min 8 8 4 0.7 0.6 45 Typ 0.9 0.8 50 Max 32 32 16 1.1 1.0 360 55 Unit MHz MHz nS nS pS % Output rise time (measured at 0.8V to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle to cycle) Output duty cycle *tLH and tHL are measured into a capacitive load of 15pF Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 November 2006 rev 1.3 Package Information P2005A/S 8-lead (150-mil) SOIC Package E H D A2 A e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8 Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 November 2006 rev 1.3 8-lead TSSOP (4.40-MM Body) P2005A/S H E D A2 A e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L 0.020 0 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8 0.50 0 Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30 Millimeters Min Max 1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8 Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 November 2006 rev 1.3 Ordering Codes Part Number P2005XF-08ST P2005XF-08SR P2005XF-08TT P2005XF-08TR P2005XG-08ST P2005XG-08SR P2005XG-08TT P2005XG-08TR Note: X=A or S P2005A/S Marking P2005XF P2005XF P2005XF P2005XF P2005XG P2005XG P2005XG P2005XG Package type 8 PIN SOIC, TUBE, Pb Free 8 PIN SOIC, TAPE AND REEL, Pb Free 8 PIN TSSOP, TUBE, Pb Free 8 PIN TSSOP, TAPE AND REEL, Pb Free 8 PIN SOIC, TUBE, Green 8 PIN SOIC, TAPE AND REEL, Green 8 PIN TSSOP, TUBE, Green 8 PIN TSSOP, TAPE AND REEL, Green Temperature Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Device Ordering Information P 2005XF-08 ST Package: ST - SOIC, TUBE SR - SOIC, T/R TT - TSSOP, TUBE TR - TSSOP, T/R PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER P = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-25C to 85C) A = Automotive Temperature Range (-40C to 125C) Licensed under U.S Patent Nos 5,488,627 and 5,631,921 Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 November 2006 rev 1.3 P2005A/S PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright (c) PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: P2005A/S Document Version: v1.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 (c) Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore's best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore's Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore's Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Low Frequency EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8 |
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