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Telecom Performance TCXO / VCTCXO Description 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Features: Miniature 5.0 x7.0mm Surface Mount Package 3.3V Operation LVCMOS or Clipped Sinewave Output Logic Frequency Stabilities Available: T50x / T60x: +/-0.28ppm T51x / T61x: +/-0.50ppm T52x / T62x: +/-1.00ppm Temperature Ranges Available: T5xx Series: 0 to 70C T6xx Series: -40 to 85C Frequency Tolerance: +/-4.60ppm for 20 yrs. Low Jitter <1pS RMS Tri-State Enable/Disable Tape and Reel Packaging RoHS Compliant / Lead Free Recommended for New Designs US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 The Connor-Winfield 5.0x7.0mm Temperature Compensated Crystal Controlled Oscillators and Voltage Controlled Temperature Compensated Crystal Controlled Oscillators are designed for use in S3 Telecom Applications. Through the use of Analog Temperature Compensation, this device is capable of holding sub 1-ppm stabilities over the commercial or the industrial temperature ranges. All models meet +/-4.6ppm accuracies for twenty years. Applications STRATUM 3 Applications Timing Reference Package Layout 0.276 0.006 (7.0mm) 0.079 Max. (2.0mm) Pin Connections 1 2 3 4 5 6 7 8 9 10 Do not connect Do not connect Do not connect Ground Output Do not connect Do not connect Tri-state Enable / Disable Supply, Vcc Voltage Control (VCTCXO) N/C (TCXO) T504 0702 19.44MHz Pin 1 0.197 0.006 (5.0mm) 0.025(6 Places) (0.635mm) 1 0.030 (0.762mm) (4 Places) 2 3 4 10 Bottom View 0.040 (1.02mm) (6 Places) 0.100 (2.54mm) 9 8 0.038 (0.965mm) (4 Places) 7 6 5 0.100 (2.54mm) Dimensional Tolerance: .005 (.127mm) .02 (.508mm) Standard Frequencies Available * 6.4 MHz 9.72 MHz 10.0 MHz 10.24 MHz 12.5 Mhz 12.8 MHz 13.5 MHz 19.2 MHz 19.44 MHz 20.0 MHz 20.48 MHz 25 MHz 27 MHz 38.88 MHz * Available frequencies from the factory for small quantity orders or quick delivery. Additional frequencies are available. Ordering Information T able 1.0 T Type: Precision TCXO VCTCXO 5x7mm 5 Temperature Range: 5 = 0 to 70 C 6 = -40 to 85 C 0 Frequency Stability: 0 = +/-0.28 ppm 1 = +/- 0.50 ppm 2 = +/- 1.00 ppm 4 - 019.44M Output Frequency: Frequency Format -xxx.xM Min.* -xxx.xxxxxxM Max.* *Amount of numbers after the decimal point. M = MHz Features: 2 = TCXO, LVCMOS, 3.3Vdc. 3 = TCXO, Clipped Sinewave, 3.3Vdc. 4 = VCTCXO, LVCMOS, 3.3Vdc. 5 = VCTCXO, Clipped Sinewave, 3.3Vdc. Bulletin Page Revision Date Tx176 1 of 4 07 25 Aug 2008 Example: T504-019.44M = 5x7mm, TCXO, LVCMOS, 3.3Vdc, 0 to 70C, +/-0.28ppm, Output Frequency 19.44MHz To order an T504 with an output frequency of: 6.4 MHz = T504-006.4M 20 MHz = T504-020.0M 38.88 MHz = T504-038.88M Specifications subject to change without notice. All dimensions in inches. (c) Copyright 2008 The Connor-Winfield Corporation 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com Absolute Maximum Ratings Table 2.0 Parameter Storage T emperature Supply Voltage (Vcc) Input Voltage (Vcc) Model Specifications Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range Holdover Stability Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range Holdover Stability T502 LVCMOS TCXO Minimum -55 -0.5 -0.5 Nominal - Maximum 125 6.0 Vcc+0.6 Units C Vdc Vdc Notes T503 T504 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 40 MHz 0.28ppm 3.3Vdc 0 to 70C 0.32ppm T603 T604 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 40 MHz 0.28ppm 3.3Vdc -40 to 85C 0.32ppm T505 Clipped Sinewave VCTCXO Table 3.0 Notes 1 Features 2 Table 4.0 Notes T602 LVCMOS TCXO T605 Clipped Sinewave VCTCXO 1 2 Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range T512 LVCMOS TCXO T513 T514 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 40 MHz 0.50ppm 3.3Vdc 0 to 70C T613 T614 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 40 MHz 0.50ppm 3.3Vdc -40 to 85C T515 Clipped Sinewave VCTCXO Table 5.0 Notes 1 TCXO VCTCXO 3.3V Operation LVCMOS Output Clipped Sinewave Output Frequency Stability: T50x/T60xSeries+/-0.28ppm T51x/T61x-Series+/-0.50ppm T52x/T62x-Series+/-1.00ppm Temperature Range: T5xx-Series 0 to 70C T6xx-Series -40 to 85C Low Jitter <1pS RMS Tri-State Enable/Disable Surface Mount Package Tape and Reel Packing RoHS Compliant / Lead Free T612 LVCMOS TCXO T615 Clipped Sinewave VCTCXO Table 6.0 Notes 1 LVCMOS Test Circuit DNC DNC DNC 1 2 3 4 5 Output Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range Model Number Output Type TCXO / VCTCXO Frequency Range Frequency Stability Supply Voltage Temperature Range T522 LVCMOS TCXO T523 T524 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 52 MHz 1.00ppm 3.3Vdc 0 to 70C T623 T624 Clipped Sinewave LVCMOS TCXO VCTCXO 6.4 to 52 MHz 1.00ppm 3.3Vdc -40 to 85C T525 Clipped Sinewave VCTCXO Table 7.0 Notes N/C - TCXO VC- VCTCXO Vcc Supply Voltage .01 uF Bypass 10 9 8 7 6 15 pF E/D DNC DNC 1 T622 LVCMOS TCXO T625 Clipped Sinewave VCTCXO Table 8.0 Notes 1 US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 Bulletin Page Revision Date Tx176 2 of 4 07 Notes: 1) Frequency stability vs. change in temperature. [(Fmax - Fmin)/2.Fo]. 2) Inclusive of frequency stability, supply voltage change (1%), aging, for 24 hours. Specifications subject to change without notice. All dimensions in inches. (c) Copyright 2008 The Connor-Winfield Corporation 25 Aug 2008 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com Electrical Specifications for all Models Operating Specifications Parameter TCXO Frequency Calibration @ 25 C Supply Voltage Variation. (Vcc5%) Load Coefficient, 5pF Static Temperature Hysteresis Total Frequency Tolerance Supply Voltage Supply Current Period Jitter Integrated Phase Jitter (BW=12kHz to 20MHz) SSB Phase Noise at 10Hz offset SSB Phase Noise at 100Hz offset SSB Phase Noise at 1KHz offset SSB Phase Noise at >10KHz offset SSB Phase Noise at >100KHz offset Start Up Time (Vcc) (Icc) Minimum -1.00 -0.2 -0.2 -0.4 -4.60 3.135 Nominal 3.3 6 3 0.3 -80 -110 -135 -150 -150 Maximum 1.00 0.2 0.2 0.4 4.60 3.465 10 5 1.0 -70 -100 -130 -145 -150 10 Units ppm ppm ppm ppm ppm Vdc mA ps rms ps rms dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz ms Table 9.0 Notes 1 2 3 4 Features TCXO VCTCXO 3.3V Operation LVCMOS Output Clipped Sinewave Output Frequency Stability: T50x/T60xSeries+/-0.28ppm T51x/T61x-Series+/-0.50ppm T52x/T62x-Series+/-1.00ppm Temperature Range: T5xx-Series 0 to 70C T6xx-Series -40 to 85C Low Jitter <1pS RMS Tri-State Enable/Disable Surface Mount Package Tape and Reel Packing RoHS Compliant / Lead Free Input Characteristics For Enable / Disable Function (Pad 8) Parameter Enable Voltage (High) or open circuit Disable Voltage (Low) Output Tri-stated (Vih) (Vil) Minimum 70% Vcc Nominal Maximum 30% Vcc Units Vdc Vdc Table 10.0 Notes 5 Input Characteristics For Voltage Control (Pad10) Parameter Control Voltage Range (Vcc = 3.3V) Frequency Tuning Linearity Slope (Vc) Minimum 0.3 10 5 Positive Nominal 1.65 Maximum 3.0 Units Vdc ppm % Table 11.0 Notes 6 LVCMOS Output Characteristics Parameter LOAD Voltage Current (High) (Low) (High) (Low) Duty Cycle at 50% of Vcc Rise / Fall Time 10% to 90% (Voh) (Vol) (Ioh) (Iol) Minimum 90%Vcc -4 45 Nominal 50 Maximum 15 10%Vcc 4 55 8 Units pF Vdc Vdc mA mA % ns Table 12.0 Notes Clipped Sinewave Test Circuit Table 13.0 DNC DNC DNC Clipped Sinewave Output Characteristics Parameter Load Output Load Resistance Output Load Capacitance Output Voltage (< 40 MHz) Output Voltage (> 40 MHz) Notes: 1) TCXO: Initial calibration @ 25 C. Specifications at time of shipment after 48 hours of operation. 2) Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25C. 3) Inclusive of calibration @ 25 C, frequency vs. change in temperature, change in supply voltage (5%), load change (5%), reflow soldering process and 20 years aging. 4) For best in application performance, careful selection of an external power source is critical. Select an external regulator that meets or exceeds the following specifications regarding voltage regulation tolerance, initial accuracy, temperature coefficient, voltage noise, and low voltage noise density. Factory Test Conditions: Initial Accuracy 2mv, Noise (0.1Hz to 10 KHz) 15uV p-p, Voltage Noise Density = 50nV/square root of Hz, Temperature Coefficient < 5ppm per degree C. 5) Leave Pad 8 unconnected if enable / disable function is not required. When tristated, the output stage is disabled but the oscillator and compensation circuit are still active (current consumption < 1 mA). 6) Additional pull ranges are available; please contact the factory for additional information. 7) Output is AC coupled. Specifications subject to change without notice. All dimensions in inches. (c) Copyright 2008 The Connor-Winfield Corporation Minimum 1.00 0.80 Nominal 10K 10 - Maximum - Units Ohms pF V pk-pk V pk-pk Notes 7 Voltage Control Vcc Supply Voltage .01 uF Bypass E/D DNC DNC 1 10 9 8 7 6 10Kohm 10 pF 2 3 4 5 Output US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 Bulletin Page Revision Date Tx176 3 of 4 07 25 Aug 2008 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com Design Recommendations Vcc, should have a large copper area for reduced inductance. Connect a 0.01uF bypass capacitor <0.1"(2.54mm) from the pad. Package Characteristics Package Ceramic Surface Mount Package. Table 14.0 8 9 6 5 0.010"(0.254mm) Recommended clearance inductance for internal copper flood. Ground, should have a large copper area for reduced inductance. Vcc 50 Ohm trace <1"by design Buffer Environmental Characteristics Vibration: Shock: Soldering: Solderability Table 15.0 Vibration per Mil Std 883E Method 2007.3 Test Condition A Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B. SMD product suitable for Convection Reflow soldering. Peak temperature 260 C. Maximum time above 220 C, 60 seconds. Solderability per Mil Std 883E Method 2003 10 1 3 4 Ground Top View Ground Top View Suggested Pad Layout 0.295 (7.49mm) 0.051 (1.28mm) OSC TOP LAYER GROUND LAYER 50 Ohm Trace Without Output Vias Buffer 0.030 (0.76mm) 0.037 (0.94mm) 0.215 (5.46mm) Top View 1 Dimensional Tolerance: .005 (.127mm) .02 (.508mm) Keep Out Area ....... BOTTOM LAYER 0.051 (1.28mm) Typical Phase Noise Model T504-019.44MHz Solder Profile Temperature 260C 220C 180C 150C 120C 260C 0 120 S Max. Time 10 S 60 S Max. 360 Sec. Max. LVCMOS Output Waveform 90% 50% 10% Tape and Reel Specifications Clipped Sinewave Output Waveform 0 1 200 mV/Div US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 Bulletin Page Revision Date Specifications subject to change without notice. All dimensions in inches. (c) Copyright 2008 The Connor-Winfield Corporation Tx176 4 of 4 07 25 Aug 2008 |
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