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HD74ALVCH162244
16-bit Buffers / Drivers with 3-state Outputs
REJ03D0052-0300Z (Previous ADE-205-173A(Z)) Rev.3.00 Oct.02.2003
Description
The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include 26 resistors to reduce overshoot and undershoot. * * * * * * VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25C) High output current 12 mA (@VCC = 3.0 V) Bus hold on data inputs eliminates the need for external pullup / pulldown resistors All outputs have equivalent 26 series resistors, so no external resistors are required.
Rev.3.00, Oct.02.2003, page 1 of 9
HD74ALVCH162244
Function table
Inputs OE L L H H : High level L : Low level X : Immaterial Z : High impedance A H L X H L Z Output Y
Rev.3.00, Oct.02.2003, page 2 of 9
HD74ALVCH162244
Pin Arrangement
1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 2Y1 8 2Y2 9 GND 10 2Y3 11 2Y4 12 3Y1 13 3Y2 14 GND 15 3Y3 16 3Y4 17 VCC 18 4Y1 19 4Y2 20 GND 21 4Y3 22 4Y4 23 4OE 24
48 2OE 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 2A1 40 2A2 39 GND 38 2A3 37 2A4 36 3A1 35 3A2 34 GND 33 3A3 32 3A4 31 VCC 30 4A1 29 4A2 28 GND 27 4A3 26 4A4 25 3OE
(Top view)
Rev.3.00, Oct.02.2003, page 3 of 9
HD74ALVCH162244
Absolute Maximum Ratings
Item Supply voltage Input voltage *1 Output voltage
*1, 2
Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg
Ratings -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCC +0.5 -50 50 50 100 0.85 -65 to 150
Unit V V V mA mA mA mA W C
Conditions
Input clamp current Output clamp current Continuous output current VCC, GND current / pin Maximum power dissipation at Ta = 55C (in still air) *3 Storage temperature
VI < 0 VO < 0 or VO > VCC VO = 0 to VCC TSSOP
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils.
Recommended Operating Conditions
Item Supply voltage Input voltage Output voltage High level output current Symbol VCC VI VO IOH Min 2.3 0 0 -- -- -- Low level output current IOL -- -- -- Input transition rise or fall rate Operating temperature t / v Ta 0 -40 Max 3.6 VCC VCC -6 -8 -12 6 8 12 10 85 ns / V C mA Unit V V V mA VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V Conditions
Note: Unused control inputs must be held high or low to prevent them from floating.
Rev.3.00, Oct.02.2003, page 4 of 9
HD74ALVCH162244
Logic Diagram
1OE 1A1
1
2OE
2
48
47
1Y1
2A1
41
8
2Y1
1A2
46
3
1Y2
2A2
40
9
2Y2
1A3
44
5
1Y3
2A3
38
11
2Y3
1A4
43
6
1Y4
2A4
37
12
2Y4
3OE 3A1
25
4OE
13
24
36
3Y1
4A1
30
19
4Y1
3A2
35
14
3Y2
4A2
29
20
4Y2
3A3
33
16
3Y3
4A3
27
22
4Y3
3A4
32
17
3Y4
4A4
26
23
4Y4
Rev.3.00, Oct.02.2003, page 5 of 9
HD74ALVCH162244
Electrical Characteristics
(Ta = -40 to 85C)
Item Input voltage Symbol VIH VIL Output voltage VOH VCC (V) Min Max -- -- 0.7 0.8 V IOH = -100 A IOH = -4 mA, VIH = 1.7 V IOH = -6 mA, VIH = 1.7 V IOH = -6 mA, VIH = 2.0 V IOH = -8 mA, VIH = 2.0 V IOH = -12 mA, VIH = 2.0 V IOL = 100 A IOL = 4 mA, VIL = 0.7 V IOL = 6 mA, VIL = 0.7 V IOL = 6 mA, VIL = 0.8 V IOL = 8 mA, VIL = 0.8 V IOL = 12 mA, VIL = 0.8 V A VIN = VCC or GND VIN = 0.7 V VIN = 1.7 V VIN = 0.8 V VIN = 2.0 V VIN = 0 to 3.6 V *1 A A A VOUT = VCC or GND VIN = VCC or GND VIN = one input at (VCC-0.6) V, other inputs at VCC or GND -- -- -- -- -- 0.2 0.4 0.55 0.55 0.6 0.8 5 -- -- -- -- 500 10 40 750 Unit Test Conditions V
2.3 to 2.7 1.7 2.7 to 3.6 2.0 2.3 to 2.7 -- 2.7 to 3.6 -- 2.3 2.3 3.0 2.7 3.0 1.9 1.7 2.4 2.0 2.0 -- -- -- -- -- -- 45 -45 75 -75 -- -- --
2.3 to 3.6 VCC-0.2 --
VOL
2.3 to 3.6 -- 2.3 2.3 3.0 2.7 3.0
Input current
IIN IIN (hold)
3.6 2.3 2.3 3.0 3.0 3.6
Off state output current Quiescent supply current
IOZ ICC ICC
3.6 3.6
3.0 to 3.6 --
Notes: 1. This is the bus hold maximum dynamic current required to switch the input from one state to another.
Rev.3.00, Oct.02.2003, page 6 of 9
HD74ALVCH162244
Switching Characteristics (cont)
(Ta = -40 to 85C)
Item Propagation delay time Symbol VCC (V) tPLH tPHL Output enable time tZH tZL Output disable time tHZ tLZ Input capacitance Output capacitance CIN CO Min Typ -- -- -- -- -- -- -- -- -- 3.0 6.0 7.0 Max 4.9 4.7 4.2 6.8 6.7 5.6 6.3 5.7 5.5 -- -- -- pF pF Control inputs Data inputs Outputs ns OE Y ns OE Y Unit ns FROM (Input) A TO (Output) Y
2.50.2 1.0 2.7 -- 3.30.3 1.0 2.50.2 1.0 2.7 -- 3.30.3 1.0 2.50.2 1.0 2.7 3.3 3.3 3.3 -- -- -- -- 3.30.3 1.0
Test Circuit
See under table 500 S1 OPEN
*1
GND 500
C L = 50 pF
Load Circuit for Outputs Symbol t PLH / t PHL t ZH/ t HZ t ZL / t LZ
Vcc=2.50.2V Vcc=2.7V, 3.30.3V
OPEN GND 2 x VCC
OPEN GND 6.0 V
Note:
1.
CLincludes probe and jig capacitance.
Rev.3.00, Oct.02.2003, page 7 of 9
HD74ALVCH162244 Waveforms - 1
tr 90 % Input 10 % t PLH Vref 90 % Vref 10 % t PHL tf VIH GND
VOH Output Vref Vref VOL
Waveforms - 2
tf Output Control 90 % Vref 10 % t ZL Vref t ZH Waveform - B Vref t HZ Vref2 10 % t LZ tr 90 % Vref GND VOH1 Waveform - A Vref1 VOL VOH VOL1 TEST VIH Vref Vref1 Vref2 VOH1 VOL1
Vcc=2.50.2V Vcc=2.7V, 3.30.3V
VIH
VCC
2.7 V
1/2 VCC 1.5 V VOL +0.15 V VOL +0.3 V VOH-0.15 V VOH-0.3 V VCC GND 3.0 V GND
Notes:
1.
2. 3. 4.
All input pulses are supplied by generators having the following characteristics : PRR 10 MHz, Zo = 50 , tr 2.0 ns, tf 2.0 ns. (VCC = 2.50.2 V) PRR 10 MHz, Zo = 50 , tr 2.5 ns, tf 2.5 ns. (VCC = 2.7 V, 3.30.3 V) Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. The output are measured one at a time with one transition per measurement.
Rev.3.00, Oct.02.2003, page 8 of 9
HD74ALVCH162244
Package Dimensions
As of January, 2003
12.5 12.7 Max 48 25
Unit: mm
1 *0.19 0.05
0.50
24
0.08 M 8.10 0.20 0 - 8
6.10
1.0
0.65 Max
*0.15 0.05
0.10
0.10 0.05
1.20 Max
0.50 0.1
*Ni/Pd/Au plating
Package Code JEDEC JEITA Mass (reference value)
TTP-48DBV -- -- 0.20 g
Rev.3.00, Oct.02.2003, page 9 of 9
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