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19-4030; Rev 1; 8/08 DisplayPort/PCIe Passive Switches General Description The MAX4928A/MAX4928B high-speed passive switches route PCI Express(R) (PCIe) data and/or DisplayPortTM signals between two possible destinations in desktop or laptop PCs. The MAX4928A is intended to be used with the ATX form factor desktop PCs, while the MAX4928B is expected to be used in the BTX form factor. The MAX4928A/MAX4928B are hex double-pole/double-throw (6 x DPDT) switches. The MAX4928A/ MAX4928B feature a single digital control input (SEL) to switch signal paths and a latch input (LE) that holds the switches in a given state. The MAX4928A/MAX4928B are fully specified to operate from a single +3.3V (typ) power supply. The MAX4928A/MAX4928B are available in an industry standard 5mm x 11mm, 56-pin TQFN package. Both devices operate over the -40C to +85C extended temperature range. Single +3.3V Power Supply Voltage Supports PCIe Gen I, Gen II, and DisplayPort Data Rates > 5Gbps Excellent Return Loss > 12dB at 2.5GHz Six Bidirectional Pairs of Switches All Switching in One Device Low 850A (max) Supply Current Small 5mm x 11mm, 56-Pin TQFN Package Industry-Standard Pinouts Features MAX4928A/MAX4928B Ordering Information PART MAX4928AETN+ MAX4928BETN+ TEMP RANGE -40C to +85F -40C to +85F PIN-PACKAGE 56 TQFN-EP 56 TQFN-EP Applications Desktop PCs Notebook PCs PCI Express is a registered trademark of PCI-SIG. DisplayPort is a trademark of Video Electronics Standards Association (VESA). +Denotes a lead-free package/RoHS-Compliant package. EP = Exposed paddle. Typical Operating Circuit appears at end of data sheet. Pin Configurations TX1+ TX0+ TX1GND TX0GND VDD VDD D1+ VDD D0+ 56 55 54 53 52 51 50 49 GND IN0+ IN0IN1+ IN1VDD IN2+ IN2IN3+ 1 2 3 4 5 6 7 8 9 48 GND 47 TX2+ 46 TX245 TX3+ 44 TX343 D0+ 42 D041 D1+ 40 D139 D2+ GND SEL LE IN0+ IN0VDD IN1+ IN1IN2+ 1 2 3 4 5 6 7 8 9 + 56 55 54 53 52 51 50 49 48 GND 47 D2+ 46 D245 D3+ 44 D343 TX0+ 42 TX041 TX1+ 40 TX139 TX2+ + D0VDD D1TOP VIEW GND GND 38 TX237 TX3+ 36 TX335 GND 34 VDD 33 AUX+ 32 AUX31 HPD1 *EP 21 22 23 24 25 26 27 28 VDD RX1RX0+ RX0RX1+ GND GND VDD 30 HPD2 29 GND IN3- 10 GND 11 OUT+ 12 OUT- 13 X+ 14 X- 15 GND 16 VDD 17 SEL 18 LE 19 GND 20 21 22 23 24 25 26 27 28 HPD2 VDD AUXHPD1 AUX+ GND GND VDD *EP IN2- 10 GND 11 IN3+ 12 IN3- 13 OUT+ 14 OUT- 15 GND 16 VDD 17 X+ 18 X- 19 GND 20 MAX4928A 38 D237 D3+ 36 D335 GND 34 VDD 33 RX0+ 32 RX031 RX1+ 30 RX129 GND MAX4928B *CONNECT EXPOSED PADDLE TO GND. TQFN TQFN ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VDD ...........................................................................-0.3V to +4V LE, SEL, IN_, X_, OUT_, D_, TX_, HPD_, RX_, AUX_ (Note 1) ...............................................-0.3V to + (VDD + 0.3V) |VIN_ - VTX_|, |VIN_ - VD_|, |VX_ - VHPD_|, |VX_ - VRX1_|, |VOUT_ - VAUX_|, |VOUT_ - VRX0_| (Note 1) ...................0 to +2V Continuous Current (IN_ to D_/TX_, X_ to HPD_/RX1_, OUT_ to AUX_/RX0_ .....................................................70mA Peak Current (IN_ to D_/TX_, X_ to HPD_/RX1_, OUT_ to AUX_/RX0_) (pulsed at 1ms, 10% duty cycle) .............70mA Continuous Current (LE, SEL)...........................................30mA Peak Current (LE, SEL) (pulsed at 1ms, 10% duty cycle)..................................70mA Continuous Power Dissipation (TA = +70C) for Multilayer Board 56-Pin TQFN (derate 41.0mW/C above +70C) .......3279mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Package Junction-to-Ambient Thermal Resistance (JA) (Note 2) .....................................................................24.4C/W Package Junction-to-Case Thermal Resistance (JC) (Note 2) .......................................................................1.5C/W Lead Temperature (soldering) .........................................+300C Note 1: Signals on IN_, X_, OUT_, D_, TX_, HPD_, RX_, or AUX_, LE, SEL exceeding VDD or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer board. For detailed information on package thermal considerations, see www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +3.3V 10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C, unless otherwise noted.) (Note 3) PARAMETER ANALOG SWITCH Analog Signal Range IN_, X_, OUT_, D_, TX_, HPD_, RX_, AUX_ |VIN_ - VTX_|, |VIN_ - VD_|, |VX_ - VHPD_|, |VX_ - VRX1_|, |VOUT_ VAUX_|, |VOUT_ - VRX0_| RON RON IIN_ = IX_ = IOUT_ = 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V, +1.2V VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V (Notes 4, 5) VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V (Notes 4, 5) VDD = +3.0V, IIN_ = IX_ = IOUT_= 15mA, VD_, VTX_, VHPD_, VAUX_, or VRX_ = 0V, +1.2V (Notes 5, 6) -0.1 (VDD 1.8) V SYMBOL CONDITIONS MIN TYP MAX UNITS Voltage Between IN and D/TX, X and HPD/RX1, and OUT and AUX/RX0 0 1.8 V On-Resistance On-Resistance Match Between Pairs of Same Channel On-Resistance Match Between Channels 8 0.1 2 RON 1.5 4 On-Resistance Flatness RFLAT(ON) 0.3 1.5 2 _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches ELECTRICAL CHARACTERISTICS (continued) (VDD = +3.3V 10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C, unless otherwise noted.) (Note 3) PARAMETER D_ or TX_/ HPD_ or RX1_/ AUX_ or RX0_ Off-Leakage Current SYMBOL ID_ (OFF) ITX_ (OFF) IHPD_ (OFF) IRX1_ (OFF) IAUX_ (OFF) IRX0_ (OFF) IIN_ (ON) IX_ (ON) IOUT_ (ON) CONDITIONS MIN TYP MAX UNITS MAX4928A/MAX4928B VDD = +3.6V , VIN_ = VX_ = VOUT_ = 0V, +1.2V; VD_ or VTX_, VHPD_ or VRX1_, VAUX_ or VRX0_ = +1.2V, 0V -1 +1 A VDD = +3.6V , VIN_ = VX_ = VOUT_ = 0V, +1.2V; VD_ or VTX_ = VIN_ or unconnected, VHPD_ or VRX1_ = VX_ or unconnected, VAUX_ or VRX0_ = VOUT_ or unconnected VD_ or VTX_ = +1.0V, RL = 50, VHPD_ or VRX1_ = +1.0V, RL = 50, VAUX_ or VRX0_ = +1.0V, RL = 50, LE = VDD, CL = 100pf (Figure 1) VD_ or VTX_ = +1.0V, RL = 50, VHPD_ or VRX1_ = +1.0V, RL = 50, VAUX_ or VRX0_ = +1.0V, RL = 50, LE = VDD, CL = 100pf (Figure 1) VD_ or VTX_ = +1.0V, RL = 50, VHPD_ or VRX1_ = +1.0V, RL = 50, VAUX_ or VRX0_ = +1.0V, RL = 50 (Figure 1) VD_ or VTX_ = +1.0V, RL = 50, VHPD_ or VRX1_ = +1.0V, RL = 50, VAUX_ or VRX0_ = +1.0V, RL = 50, (Figure 1) VD_ or VTX_ = +1.0V, RL = 50, VHPD_ or VRX1_ = +1.0V, RL = 50, VAUX_ or VRX0_ = +1.0V, RL = 50 (Figure 1) f = 2.5GHz f = 5.0GHz f = 7.5GHz f = 2.5GHz IN_/X_/OUT_ On-Leakage Current -1 +1 DIGITAL SIGNALS SEL to Switch Turn-On Time tON_SEL 55 120 ns SEL to Switch Turn-Off Time tOFF_SEL 8 50 ns LE Setup Time SEL to LE tSU 2 ns LE Hold Time SEL to LE tHOLD 2 ns LE Minimum Pulse-Width Low tW 40 ns -1.5 -3.3 -4.9 -40 -23 -28 -22 -21 -8 -7 dB dB dB dB Differential Insertion Loss (Figure 2) SDD21 Differential Crosstalk (Figure 2) Differential Off-Isolation Differential Return Loss (Figure 2) SDDCTK SDD21_OFF SDD11 f = 5.0GHz f = 7.5GHz f = 3.0GHz f = 2.8GHz f = 5.0GHz f = 7.5GHz _______________________________________________________________________________________ 3 DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B ELECTRICAL CHARACTERISTICS (continued) (VDD = +3.3V 10%, TA =TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +3.3V, TA = +25C, unless otherwise noted.) (Note 3) PARAMETER Signal Data Rate Differential -3dB Bandwidth LOGIC INPUT (LE, SEL) Input Logic-High Input Logic-Low Input Logic Hysteresis Input Leakage Current POWER SUPPLY Power Supply Range VDD Supply Current VDD IDD VIN = 0 or VDD 3.0 3.6 850 V A VIH VIL VHYST IIN VIN = 0 or VDD -1 100 +1 1.4 0.5 V V mV A SYMBOL BR DBW CONDITIONS RS = RL = 100 balanced RS = RL = 100 balanced MIN TYP 10 5 MAX UNITS Gbps GHz Note 3: All units are 100% production tested at TA = +85C. Limits over the operating temperature range are guaranteed by design and characterization and are not production tested. Note 4: RON = RON (MAX) - RON (MIN). Note 5: Guaranteed by design. Not production tested. Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. 4 _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches Typical Operating Characteristics (TA = +25C, unless otherwise noted.) MAX4928A/MAX4928B ON-RESISTANCE vs. VIN_, VX_, VOUT_ MAX4928A/B toc01 ON-RESISTANCE vs. VIN_, VX_, VOUT_ MAX4928A/B toc02 SUPPLY CURRENT vs. TEMPERATURE 900 800 SUPPLY CURRENT (A) 700 600 500 400 300 200 100 0 VDD = 3.3V MAX4928A/B toc03 10.0 9.5 9.0 ON-RESISTANCE () 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 VDD = 3.3V 10.0 9.5 9.0 ON-RESISTANCE () 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 VDD = 3.3V -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 TA = -40C TA = +25C TA = +85C 1000 1.5 1.5 -40 -15 10 35 60 85 VIN_, VX_, VOUT_ (V) VIN_, VX_, VOUT_ (V) TEMPERATURE (C) LOGIC THRESHOLD vs. SUPPLY VOLTAGE MAX4928A/B toc04 TURN-ON/OFF TIME vs. SUPPLY VOLTAGE MAX4928A/B toc05 DIFFERENTIAL INSERTION LOSS MAX4928A/B toc06 1.5 VDD = 3.3V 100 0 DIFFERENTIAL INSERTION LOSS (dB) -2 1.3 LOGIC THRESHOLD (V) VIH 1.1 80 TURN-ON/OFF TIME (ns) 60 tON_SEL -4 0.9 VIL 0. 7 40 tOFF_SEL -6 20 -8 0.5 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) 0 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) -10 10 100 1,000 10,000 FREQUENCY (MHz) DIFFERENTIAL OFF-ISOLATION MAX4928A/B toc07 DIFFERENTIAL CROSSTALK MAX4928A/B toc08 DIFFERENTIAL RETURN LOSS MAX4928A/B toc09 0 DIFFERENTIAL OFF-ISOLATION (dB) 0 -20 0 DIFFERENTIAL RETURN LOSS (dB) DIFFERENTIAL CROSSTALK (dB) -20 -10 -40 -40 -20 -600 -60 -80 -30 -80 10 100 1,000 10,000 FREQUENCY (MHz) -100 10 100 1,000 10,000 FREQUENCY (MHz) -40 10 100 1,000 10,000 FREQUENCY (MHz) _______________________________________________________________________________________ 5 DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Test Circuits/Timing Diagrams MAX4928A/MAX4928B +3.3V VDD D_ OR TX_, HPD_ OR RX1_, AUX_ OR RX0_ SEL LOGIC INPUT SEL GND LE LOGIC INPUT LE SWITCH OUTPUT TX_, RX1_, OR RX0_ 0V t ON_SEL t OFF_SEL SWITCH OUTPUT D_, HPD_, OR AUX 0.9 x VOUT 0V t ON_SEL 0.9 x VOUT IN_, X_, OR OUT_ VOUT RL CL VOUT 0.9 x VOUT LOGIC INPUT SEL LOGIC INPUT LE t r < 5ns t f < 5ns VIH 50% VIL VN_ t OFF_SEL 0.9 x VOUT CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL VOUT = VN_ RL + RON ( ) VN_ = VD_ OR VTX_, VHPD_ OR VRX1_, VAUX_, OR VRX0_ LOGIC INPUT LE LOGIC INPUT SEL VIH 50% VIL tW 50% t SU t HOLD 50% VIH 50% VIL Figure 1. Switching Time 6 _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches Test Circuits/Timing Diagrams (continued) +3.3V 0.1F NETWORK ANALYZER 50 VDD 0V 50 50 50 D_50 HPD_+ 50 HPD_50 AUX_+ 50 AUX_GND TX_RX1_RX0_TX_+ RX1_+ RX0_+ PORT 3 VOUT+ HPD_+ 50 50 HPD_50 PORT 4 VOUTAUX_+ 50 50 AUX_GND TX_RX1_RX0_TX_+ RX1_+ RX0_+ PORT 3 VOUT+ 50 D_+ MAX4928A MAX4928B IN_X_OUT_SEL LE +3.3V 0.1F NETWORK ANALYZER 50 MAX4928A/MAX4928B VDD VDD 0V 50 D_+ 50 D_50 MAX4928A MAX4928B IN_X_OUT_SEL LE IN_+ X_+ OUT_+ PORT 1 VIN+ VDD IN_+ X_+ OUT_+ PORT 1 VIN+ PORT 2 VIN- PORT 2 VIN- 50 PORT 4 VOUT- 50 DIFFERENTIAL INSERTION-LOSS/DIFFERENTIAL RETURN LOSS DIFFERENTIAL INSERTION-LOSS = 20log DIFFERENTIAL OFF-ISOLATION ( VOUT+ - VOUTVIN+ - VIN+3.3V ) 0.1F DIFFERENTIAL OFF-ISOLATION = 20log ( VOUT+ - VOUTVIN+ - VIN- ) VDD 0V OR VDD 0V 50 50 50 AUX_+/AUX_50 TX_+/TX_50 50 HP0_+/HP0_GND RX1_+/RX1_IN_X_OUT_IN_+ X_+ OUT_+ D_+/D_- MAX4928A MAX4928B HPD_+/HPD_IN_X_OUT_SEL LE IN_+ X_+ OUT_+ PORT 1 VIN+ NETWORK ANALYZER 50 PORT 2 VIN- 50 PORT 3 VOUT+ 50 PORT 4 VOUT- 50 DIFFERENTIAL CROSSTALK DIFFERENTIAL CROSSTALK = 20log ( VOUT+ - VOUTVIN+ - VIN- ) MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. DIFFERENTIAL OFF-ISOLATION IS MEASURED BETWEEN IN_ AND "OFF" D_ OR TX_, X_ AND "OFF" HPD_ OR RX1_, OUT_ AND "OFF" AUX_ OR RX0_ TERMINAL ON EACH SWITCH. DIFFERENTIAL ON-LOSS IS MEASURED BETWEEN IN_ AND "ON" D_ OR TX_, X_ AND "ON" HPD_ OR RX1_, OUT_ AND "ON" AUX_ OR RX0_ TERMINAL ON EACH SWITCH. DIFFERENTIAL CROSSTALK IS MEASURED BETWEEN ANY TWO PAIRS. Figure 2. Differential On-Loss, Differential Off-Isolation, and Differential Crosstalk _______________________________________________________________________________________ 7 DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Pin Description PIN MAX4928A MAX4928B GND IN0+ IN0IN1+ IN1VDD IN2+ IN2IN3+ IN3OUT+ OUTX+ XSEL LE HPD2 HPD1 AUXAUX+ RX1RX1+ RX0RX0+ D3D3+ D2D2+ D1D1+ D0D0+ TX3TX3+ TX2Ground Analog Switch 1--Common Positive Terminal Analog Switch 1--Common Negative Terminal Analog Switch 2--Common Positive Terminal Analog Switch 2--Common Negative Terminal Positive Supply Voltage Input. Connect VDD to a +3.0V to +3.6V supply voltage. Bypass VDD to GND with a 0.1F ceramic capacitor placed as close as possible to the device. See the Board Layout section. Analog Switch 3--Common Positive Terminal Analog Switch 3--Common Negative Terminal Analog Switch 4--Common Positive Terminal Analog Switch 4--Common Negative Terminal Analog Switch 5--Common Positive Terminal Analog Switch 5--Common Negative Terminal Analog Switch 6--Common Positive Terminal Analog Switch 6--Common Negative Terminal Control Signal Input Latch Enable Input Analog Switch 6--Normally Open Negative Terminal Analog Switch 6--Normally Open Positive Terminal Analog Switch 5--Normally Open Negative Terminal Analog Switch 5--Normally Open Positive Terminal Analog Switch 6--Normally Closed Negative Terminal Analog Switch 6--Normally Closed Positive Terminal Analog Switch 5--Normally Closed Negative Terminal Analog Switch 5--Normally Closed Positive Terminal Analog Switch 4--Normally Open Negative Terminal Analog Switch 4--Normally Open Positive Terminal Analog Switch 3--Normally Open Negative Terminal Analog Switch 3--Normally Open Positive Terminal Analog Switch 2--Normally Open Negative Terminal Analog Switch 2--Normally Open Positive Terminal Analog Switch 1--Normally Open Negative Terminal Analog Switch 1--Normally Open Positive Terminal Analog Switch 4--Normally Closed Negative Terminal Analog Switch 4--Normally Closed Positive Terminal Analog Switch 3--Normally Closed Negative Terminal NAME FUNCTION 1, 11, 16, 20, 21, 1, 11, 16, 20, 21, 28, 29, 35, 48, 28, 29, 35, 48, 49, 56 49, 56 2 3 4 5 4 5 7 8 6, 17, 22, 27, 34, 6, 17, 22, 27, 34, 50, 55 50, 55 7 8 9 10 12 13 14 15 18 19 23 24 25 26 30 31 32 33 36 37 38 39 40 41 42 43 44 45 46 9 10 12 13 14 15 18 19 2 3 30 31 32 33 23 24 25 26 44 45 46 47 51 52 53 54 36 37 38 8 _______________________________________________________________________________________ DisplayPort/PCIe Passive Switches Pin Description (continued) PIN MAX4928A 47 51 52 53 54 -- MAX4928B 39 40 41 42 43 -- NAME TX2+ TX1TX1+ TX0TX0+ EP FUNCTION Analog Switch 3--Normally Closed Positive Terminal Analog Switch 2--Normally Closed Negative Terminal Analog Switch 2--Normally Closed Positive Terminal Analog Switch 1--Normally Closed Negative Terminal Analog Switch 1--Normally Closed Positive Terminal Exposed Pad. Connect EP to GND. Exposed pad internally connected to GND. MAX4928A/MAX4928B Detailed Description The MAX4928A/MAX4928B high-speed passive switches route PCI Express (PCIe) data and/or DisplayPort signals between two possible destinations. The MAX4928A/ MAX4928B are ideal for routing signals between a graphics memory controller hub (GMCH) and either a DisplayPort or PCIe connector. The MAX4928A/MAX4928B feature a single digital control input (SEL) to switch signal paths and a latch input (LE) that holds the switches in a given state. IN_- channels are routed to either the D_- or TX_- channels, signals on the X- channel are routed to either HPD2 or RX1- channels, and signals on the OUT- channel are routed to either AUX- or RX0- channels. The MAX4928A/MAX4928B are bidirectional switches, allowing IN_, X_, OUT_, D_, TX_, HPD_, RX_, and AUX_ to be used as either inputs or outputs. Applications Information DisplayPort/PCIe Switching The MAX4928A/MAX4928B primary applications are aimed to switch between a GMCH and either a DisplayPort or PCIe connector. The MAX4928A/ MAX4928B contain n-channel switches to permit differential signals to be selected between a PCIe Gen II socket or to a DisplayPort connector. Each device handles up to six pairs of signals. The DisplayPort signal is an AC-coupled 8b/10b encoded differential signal ranging up to 2.7 Gbps. The PCIe Gen I and Gen II signals are AC-coupled, 8b/10b encoded differential signals ranging up to 5.0Gbps. Digital Control Input (SEL) The MAX4928A/MAX4928B provide a single digital control input (SEL) to select the signal path between the IN_ and D_/TX_, X_ and HPD_/RX1_, and OUT_ and AUX_/RX0_ channels. The truth tables for the MAX4928A/MAX4928B are depicted in the Functional Diagrams/Truth Table. Drive SEL rail-to-rail to minimize power consumption. Latch Control Input (LE) The MAX4928A/MAX4928B provide a single digital control input (LE) to latch the signal paths between the IN_ and D_/TX_, X_ and HPD_/RX1_, and OUT_ and AUX_/RX0_ channels. When LE is driven high, the switches are held in their previous state, regardless of the input signal to SEL. Drive LE rail-to-rail to minimize power consumption. Board Layout High-speed switches require proper layout and design procedures for optimum performance. Keep designcontrolled impedance PCB traces as short as possible or follow impedance layouts per the PCIe specification. Ensure that power-supply bypass capacitors are placed as close as possible to the device. Multiple bypass capacitors are recommended. Connect all grounds and the exposed pad to large ground planes. Analog Signal Levels The MAX4928A/MAX4928B accept standard PCIe signals to a maximum of (VDD - 1.8V). Signals on the IN_+ channels are routed to either the D_+ or TX_+ channels, signals on the X+ channel are routed to either HPD1 or RX1+ channels, and signals on the OUT+ channel are routed to either AUX+ or RX0+ channels. Signals on the Chip Information PROCESS: CMOS _______________________________________________________________________________________ 9 DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Functional Diagram/Truth Table VDD MAX4928A MAX4928B IN0+ IN0TX0+ TX0D0+ D0IN1+ IN1TX1+ TX1D1+ D1IN2+ IN2TX2+ TX2D2+ LE 1 0 0 SEL X 0 1 IN_ TO TX_, IN_ TO DO_, X_ TO RX1_, X_ TO HPD_, OUT_ TO RX0_ OUT_ TO AUX_ NO CHANGE ON OFF NO CHANGE OFF ON D2IN3+ IN3TX3+ TX3D3+ D3X+ XRX1+ RX1HPD1 HPD2 OUT+ OUTRX0+ RX0AUX+ AUX- X = DON'T CARE. CONTROL SEL LE LATCH GND 10 ______________________________________________________________________________________ DisplayPort/PCIe Passive Switches Typical Operating Circuit DP CONNECTOR MAX4928A/MAX4928B VDD VCC = 1V GRAPHICS AND MEMORY CONTROLLER HUB MAX4928A MAX4928B D0+ D0D1+ D1D2+ D2D3+ D3HPD1 HPD2 AUX+ AUX- VCC D0 D1 D2 D3 D4 D5 D6 D7 HPD AUX AUX 1.5k PCIe BUFF 1 PCIe BUFF 2 PCIe BUFF 3 PCIe BUFF 4 PCIe IN AUX IN0+ IN0IN1+ IN1IN2+ IN2IN3+ IN3X+ XOUT+ OUT- CHANNEL SELECT SEL LE TX0+ TX0TX1+ TX1TX2+ TX2TX3+ TX3RX1+ RX1RX0+ RX0- GND PCIe GRAPHICS CONNECTOR SUPPLY VOLTAGE VCC = 1V ______________________________________________________________________________________ N 100k 11 DisplayPort/PCIe Passive Switches MAX4928A/MAX4928B Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 56 TQFN-EP PACKAGE CODE T56511-1 DOCUMENT NO. 21-0187 12 ______________________________________________________________________________________ DisplayPort/PCIe Passive Switches Revision History REVISION NUMBER 0 1 REVISION DATE 2/08 8/08 Initial release Changed functional diagram and limits DESCRIPTION PAGES CHANGED -- 1, 2, 11 MAX4928A/MAX4928B Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. |
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