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| 0.5 CMOS 1.65 V to 3.6 V Dual SPDT/2:1 Mux in Mini LFCSP Package ADG824 FEATURES 0.5 typical on resistance 0.7 maximum on resistance at 85C 1.65 V to 3.6 V operation High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast switching times <20 ns Typical power consumption (<0.1 W) 1.3 mm x 1.6 mm mini LFCSP package FUNCTIONAL BLOCK DIAGRAM ADG824 S1A D1 S1B IN1 IN2 S2A D2 S2B 06693-001 APPLICATIONS Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. GENERAL DESCRIPTION The ADG824 is a low voltage CMOS device containing two independently selectable single-pole, double throw (SPDT) switches. This device offers ultralow on resistance of less than 0.7 over the full temperature range. The ADG824 is fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation. Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. The ADG824 exhibits break-before-make switching action. The low on resistance of the ADG824 makes this device ideal for audio switching. In addition, a data rate of 180 Mbps makes the device suitable for USB low speed (1.5 Mbps) and full speed (12 Mbps) data switching. The ADG824 is available in a 1.3 mm x 1.6 mm, 10-lead mini LFCSP package. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. <0.7 over the full temperature range of -40C to +85C. Single 1.65 V to 3.6 V operation. 1.8 V logic compatible. High current carrying capability (300 mA continuous current at 3.3 V). Low THD + N (0.06% typical). 1.3 mm x 1.6 mm mini LFCSP package. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved. ADG824 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 6 ESD Caution...................................................................................6 Pin Configuration and Function Descriptions..............................7 Typical Performance Characteristics ..............................................8 Test Circuits..................................................................................... 11 Terminology .................................................................................... 13 Outline Dimensions ....................................................................... 14 Ordering Guide .......................................................................... 14 REVISION HISTORY 4/08--Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADG824 SPECIFICATIONS VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection, QINJ Off Isolation Channel-to-Channel Crosstalk +25C -40C to +85C 0 to VDD 0.5 0.65 0.003 0.13 0.2 0.2 0.2 1.3 0.8 0.005 0.1 2.7 7 9.5 6 7.7 3.5 27 -71 -90 -67 Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD 1 Unit V typ max typ max typ max nA typ nA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 2.7 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 19 VDD = 2.7 V, VS = 0.65 V, IDS = 100 mA VDD = 2.7 V, VS = 0 V to VDD, IDS = 100 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 20 VS = VD = 0.6 V or 3.3 V; see Figure 21 0.7 0.01 VIN = VINL or VINH VIN = VINL or VINH 10.8 8.6 2 0.06 -0.05 90 25 58 0.003 1 RL = 50 , CL = 35 pF VS = 2 V/0 V; see Figure 22 RL = 50 , CL = 35 pF VS = 2 V; see Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 2 V; see Figure 23 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 25 S1A to S2A/S1B to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 26 S1A to S1B/S2A to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 27 RL = 33 , f = 20 Hz to 20 kHz, VS = 2 V p-p RL = 50 , CL = 5 pF; see Figure 28 RL = 50 , CL = 5 pF; see Figure 28 VDD = 3.6 V Digital inputs = 0 V or 3.6 V Guaranteed by design; not subject to production test. Rev. 0 | Page 3 of 16 ADG824 VDD = 2.5 V 0.2 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection, QINJ Off Isolation Channel-to-Channel Crosstalk +25C -40C to +85C 0 to VDD 0.65 0.78 0.005 0.2 0.3 0.2 0.2 1.3 0.7 0.005 0.1 2.7 9 11.5 6 7.4 5 21 -71 -90 -71 Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD 1 Unit V typ max typ max typ max nA typ nA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 2.3 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 19 VDD = 2.3 V, VS = 0.7 V, IDS = 100 mA VDD = 2.3 V, VS = 0 V to VDD, IDS = 100 mA VDD = 2.7 V VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; see Figure 20 VS = VD = 0.6 V or 2.4 V; see Figure 21 0.83 0.01 VIN = VINL or VINH VIN = VINL or VINH 12.4 8 3 0.1 -0.065 90 25 60 0.003 1 RL = 50 , CL = 35 pF VS = 1.5 V/0 V; see Figure 22 RL = 50 , CL = 35 pF VS = 1.5 V; see Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 23 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 25 S1A to S2A/S1B to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 26 S1A to S1B/S2A to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 27 RL = 33 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p RL = 50 , CL = 5 pF; see Figure 28 RL = 50 , CL = 5 pF; see Figure 28 VDD = 2.7 V Digital inputs = 0 V or 2.7 V Guaranteed by design; not subject to production test. Rev. 0 | Page 4 of 16 ADG824 VDD = 1.65 V to 1.95 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON +25C -40C to +85C 0 to VDD 1.3 1.7 2.5 0.01 2.1 3 Unit V typ max max typ Test Conditions/Comments VDD = 1.8 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 19 VDD = 1.65 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 19 VDD = 1.65 V, VS = 0.7 V, IDS = 100 mA VDD = 1.95 V VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; see Figure 20 VS = VD = 0.6 V or 1.65 V; see Figure 21 On Resistance Match Between Channels, RON LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection, QINJ Off Isolation Channel-to-Channel Crosstalk 0.2 0.2 0.65 VDD 0.35 VDD 0.005 0.1 2.7 13 18.6 7 9.8 7.5 15 -71 -90 -71 nA typ nA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max VIN = VINL or VINH VIN = VINL or VINH 19.3 10.2 5 Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD 1 0.4 -0.1 90 26 61 0.003 1 RL = 50 , CL = 35 pF VS = 1.2 V/0 V; see Figure 22 RL = 50 , CL = 35 pF VS = 1.2 V; see Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 1.2 V; see Figure 23 VS = 1 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 25 S1A to S2A/S1B to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 26 S1A to S1B/S2A to S2B, RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 27 RL = 33 , f = 20 Hz to 20 kHz, VS = 1.2 V p-p RL = 50 , CL = 5 pF; see Figure 28 RL = 50 , CL = 5 pF; see Figure 28 VDD = 1.95 V Digital inputs = 0 V or 1.95 V Guaranteed by design; not subject to production test. Rev. 0 | Page 5 of 16 ADG824 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 4. Parameter VDD to GND Analog Inputs 1 Digital Inputs1 Peak Current, Sx or Dx Pins 3.3 V Operation 2.5 V Operation 1.8 V Operation Continuous Current, Sx or Dx Pins 3.3 V Operation 2.5 V Operation 1.8 V Operation Operating Temperature Range Storage Temperature Range Junction Temperature Mini LFCSP Package JA Thermal Impedance (4-Layer Board) Reflow Soldering (Pb-Free) Peak Temperature Time at Peak Temperature 1 Rating -0.3 V to +4.6 V -0.3 V to VDD + 0.3 V -0.3 V to +4.6 V or 10 mA, whichever occurs first Pulsed at 1 ms, 10% duty cycle max 500 mA 460 mA 420 mA 300 mA 275 mA 250 mA -40C to +85C -65C to +150C 150C 131.6C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. ESD CAUTION 260C 10 sec to 40 sec Overvoltages at the INx, Sx, or Dx pins are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. 0 | Page 6 of 16 ADG824 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 10 GND 1 S1A PIN 1 INDICATOR D1 2 S1B 3 ADG824 TOP VIEW (Not to Scale) 9 S2A 8 D2 7 S2B Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic S1A D1 S1B IN1 IN2 VDD S2B D2 S2A GND Description Source Terminal. This pin can be an input or an output. Drain Terminal. This pin can be an input or an output. Source Terminal. This pin can be an input or an output. Logic Control Input. This pin controls Switch S1A and Switch S1B to D1. Logic Control Input. This pin controls Switch S2A and Switch S2B to D2. Most Positive Power Supply Potential. Source Terminal. This pin can be an input or an output. Drain Terminal. This pin can be an input or an output. Source Terminal. This pin can be an input or an output. Ground (0 V) Reference. Table 6. ADG824 Truth Table Logic (IN1/IN2) 0 1 Switch A (S1A or S2A) Off On Switch B (S1B or S2B) On Off Rev. 0 | Page 7 of 16 06693-012 IN1 4 IN2 5 VDD 6 ADG824 TYPICAL PERFORMANCE CHARACTERISTICS 0.6 TA = 25C 0.5 ON RESISTANCE () 0.6 VDD = 3.3V TA = +85C TA = +25C 0.4 ON RESISTANCE () VDD = 3V VDD = 3.3V VDD = 3.6V 0.5 0.4 0.3 0.3 TA = -40C 0.2 0.2 0.1 0.1 06693-020 0 0.5 1.0 1.5 2.0 VD, VS (V) 2.5 3.0 3.5 4.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VD, VS (V) Figure 3. On Resistance vs. VD (VS), VDD = 3.3 V 0.3 V 0.7 TA = 25C 0.6 0.5 0.4 0.3 0.2 0.1 0 VDD = 2.3V VDD = 2.5V VDD = 2.7V Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 VDD = 2.5V TA = +25C TA = +85C ON RESISTANCE () ON RESISTANCE () TA = -40C 06693-021 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 Figure 4. On Resistance vs. VD (VS), VDD = 2.5 V 0.2 V 1.8 TA = 25C 1.6 1.4 ON RESISTANCE () Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V 1.6 VDD = 1.8V VDD = 1.65V 1.4 1.2 TA = -40C TA = +25C 1.2 1.0 0.8 0.6 0.4 0.2 VDD = 1.8V VDD = 1.95V ON RESISTANCE () 1.0 TA = +85C 0.8 0.6 0.4 0.2 0 06693-022 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VD, VS (V) VD, VS (V) Figure 5. On Resistance vs. VD (VS), VDD = 1.8 V 0.15 V Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V Rev. 0 | Page 8 of 16 06693-025 0 06693-024 06693-023 0 0 ADG824 6 5 ID, IS (ON) + + 4 VDD = 3.3V 40 TA = 25C 35 30 ID, IS (OFF) + - VDD = 3.3V CURRENT (nA) QINJ (pC) 3 2 1 ID, IS (ON) - - 25 VDD = 2.5V 20 15 10 VDD = 1.8V 0 ID, IS (OFF) - + 0 10 20 30 40 50 60 TEMPERATURE (C) 70 80 90 06693-028 5 0 -1 0 1 VS (V) 2 3 Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V 4.5 VDD = 2.5V 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 06693-017 Figure 12. Charge Injection vs. Source Voltage 16 14 ID, IS (ON) + + tON (1.8V) tON (3.3V) tON (2.7V) tOFF (2.7V) tOFF (1.8V) 12 10 8 6 4 2 CURRENT (nA) ID, IS (ON) - - TIME (ns) ID, IS (OFF) + - tOFF (3.3V) 10 20 30 40 50 60 70 80 90 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) TEMPERATURE (C) Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V 4 VDD = 1.8V ID, IS (ON) + + 3 Figure 13. tON/tOFF Times vs. Temperature 2 0 -2 INSERTION LOSS (dB) CURRENT (nA) ID, IS (ON) - - 2 -4 -6 -8 -10 -12 1 06693-027 0 10 20 30 40 50 60 TEMPERATURE (C) 70 80 90 1 10 FREQUENCY (MHz) 100 1000 Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V Figure 14. Bandwidth Rev. 0 | Page 9 of 16 06693-016 0 ID, IS (OFF) + - ID, IS (OFF) - + -14 -16 0.1 TA = 25C VDD = 3.3V, 2.5V, 1.8V 06693-019 0 ID, IS (OFF) - + 0 -60 06693-014 ADG824 0 -10 -20 ATTENUATION (dB) 0.30 TA = 25C VDD = 3.3V, 2.5V, 1.8V 0.25 VDD = 1.8V VS = 1.2V p-p -40 -50 -60 -70 -80 0.1 THD + N (%) -30 0.20 0.15 VDD = 2.5V VDD = 3.3V 0.05 VS = 1.5V p-p VS = 2V p-p 0.10 06693-015 1 10 FREQUENCY (MHz) 100 1000 1k 10k FREQUENCY (Hz) 100k Figure 15. Off Isolation vs. Frequency 0 -10 -20 TA = 25C VDD = 3.3V, 2.5V, 1.8V S1A TO S1B Figure 17. Total Harmonic Distortion + Noise vs. Frequency 20 TA= 25C VDD = 3.3V 0 CROSSTALK (dB) -30 PSRR (dB) -40 -50 -60 -70 -80 -90 06693-018 -20 S1A TO S2A -40 -60 -80 06693-029 -100 0.1 1 10 FREQUENCY (MHz) 100 1000 -100 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 16. Crosstalk vs. Frequency Figure 18. PSRR vs. Frequency Rev. 0 | Page 10 of 16 06693-013 0 100 ADG824 TEST CIRCUITS IDS IS (OFF) A S D ID (OFF) A 06693-003 V1 VD VS VD S D 06693-002 VS RON = V1/IDS Figure 19. On Resistance Figure 20. Off Leakage Figure 21. On Leakage VDD 0.1F VDD VS S1B S1A D RL 50 GND VOUT CL 35pF VOUT VIN 50% 50% IN 90% 90% tON tOFF Figure 22. Switching Times, tON, tOFF 0.1F VDD VDD VS S1B S1A D RL 50 GND CL 35pF VOUT VIN VOUT 0V 50% 50% 80% 80% IN tBBM tBBM 06693-006 Figure 23. Break-Before-Make Time Delay, tBBM VDD SWITCH ON S1B S1A IN GND 1nF VOUT VOUT 06693-007 SWITCH OFF VIN NC VOUT VS D QINJ = CL x VOUT Figure 24. Charge Injection Rev. 0 | Page 11 of 16 06693-005 06693-004 NC S D ID (ON) A ADG824 VDD 0.1F NETWORK ANALYZER 50 VS VOUT NETWORK ANALYZER VOUT S1A RL 50 50 VS GND D 0.1F VDD VDD VDD NC S1B D S1A 50 S1B RL 50 GND RL 50 OFF ISOLATION = 20 log VS CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS Figure 25. Off Isolation Figure 27. Channel-to-Channel Crosstalk (S1A to S1B/S2A to S2B) NETWORK ANALYZER VOUT 50 S2A S2B S1A S1B D1 NC 50 D2 NC 0.1F VDD VDD NETWORK ANALYZER 50 VS VOUT 50 VS S1B S1A D 06693-011 CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS GND RL 50 INSERTION LOSS = 20 log VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 26. Channel-to-Channel Crosstalk (S1A to S2A/S1B to S2B) Figure 28. Bandwidth Rev. 0 | Page 12 of 16 06693-009 06693-010 VOUT 06693-008 ADG824 TERMINOLOGY IDD Positive supply current. VD (VS) Analog voltage on Terminal D and Terminal S. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch. RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection Measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation Measure of unwanted signal coupling through an off switch. Crosstalk Measure of unwanted signal that is coupled from one channel to another as a result of parasitic capacitance. -3 dB Bandwidth Frequency at which the output is attenuated by 3 dB. Insertion Loss The loss due to the on resistance of the switch. THD + N Ratio of the harmonics amplitude plus noise of a signal to the fundamental. Rev. 0 | Page 13 of 16 ADG824 OUTLINE DIMENSIONS 0.20 DIA TYP 1.30 0.55 0.40 0.30 1.60 0.40 BSC TOP VIEW 0.60 0.55 0.50 0.20 BSC 9 1 PIN 1 IDENTIFIER 6 4 0.35 0.30 0.25 BOTTOM VIEW 0.05 MAX 0.02 NOM 033007-A SEATING PLANE Figure 29. 10-Lead Lead Frame Chip Scale Package (LFCSP_UQ) 1.3 mm x 1.6 mm Body, Ultra Thin Quad (CP-10-10) Dimensions shown in millimeters ORDERING GUIDE Model ADG824BCPZ-REEL 1 ADG824BCPZ-REEL71 EVAL-ADG824EBZ1 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 10-Lead Mini Lead Frame Chip Scale Package (LFCSP_UQ) 10-Lead Mini Lead Frame Chip Scale Package (LFCSP_UQ) Evaluation Board Package Option CP-10-10 CP-10-10 Branding A A Z = RoHS Compliant Part. Rev. 0 | Page 14 of 16 ADG824 NOTES Rev. 0 | Page 15 of 16 ADG824 NOTES (c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06693-0-4/08(0) Rev. 0 | Page 16 of 16 |
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