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| STE110NS20FD N-channel 200V - 0.022 - 110A - ISOTOP MESH OVERLAYTM Power MOSFET General features Type STE110NS20FD VDSS 200V RDS(on) <0.024 ID 110A Extremely high dv/dt capability 100% avalanche tested Gate charge minimized 20V gate to source voltage rating Low intrinsic capacitance Fast body-drain diode:low trr, Qrr ISOTOP Description Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of Power MOSFETs with outstanding performances. The new patented STrip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(ON) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. Internal schematic diagram Applications Switching application Order codes Part number STE110NS20FD Marking E110NS20FD Package ISOTOP Packaging Tube May 2006 Rev 3 1/12 www.st.com 12 Contents STE110NS20FD Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 Test circuit ................................................ 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 STE110NS20FD Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VDGR VGS ID ID IDM (1) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20 k) Gate- source voltage Drain current (continuos) at TC = 25C Drain current (continuos) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 200 200 20 110 69 440 500 4 25 2500 -65 to 150 150 Unit V V V A A A W W/C V/ns V C C PTOT (2) dv/dt Peak diode recovery voltage slope Insulation winthstand voltage (AC-RMS) Storage temperature Max. operating junction temperature VISO Tstg Tj 1. Pulse width limited by safe operating area 2. ISD <110A, di/dt < 200A/s, VDD = 80% V(BR)DSS Table 2. Symbol Thermal resistance Parameter Value 0.25 30 300 Unit C/W C/W C Rthj-case Thermal resistance junction-case Max Rthj-amb Thermal resistance junction-ambient Max Tl Maximum lead temperature for soldering purpose Table 3. Symbol IAR EAS Avalanche data Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj = 25 C, ID = IAR, VDD = 50V) Value 110 750 Unit A mJ 3/12 Electrical characteristics STE110NS20FD 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test condictions ID = 250A, VGS = 0 VDS = Max rating VDS = Max rating, @125C VGS = 20V VDS = VGS, ID = 250A VGS = 10V, ID = 50A 2 3 0.022 Min. 200 10 100 100 4 0.024 Typ. Max. Unit V A A nA V Table 5. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test condictions VDS > ID(on) x RDS(on)max, ID = 50A Min. Typ. 30 7900 1500 460 360 35 135 504 Max. Unit S pF pF pF nC nC nC VDS =25V, f=1 MHz, VGS=0 VDD = 100V, ID = 100A, VGS = 10V (see Figure 13) 1. Pulsed: pulse duration=300s, duty cycle 1.5% 4/12 STE110NS20FD Table 6. Symbol td(on) tr tr(Voff) tf tc Electrical characteristics Switching times Parameter Turn-on delay time Rise time Off-voltage rise time Fall time Cross-over time Test condictions VDD = 100V, ID = 50A RG = 4.7 VGS = 10V (see Figure 12) VDD = 100V, ID = 100A, , RG = 4.7 VGS = 10V (see Figure 12) Min. Typ. 40 130 245 140 220 Max. Unit ns ns ns ns ns Table 7. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 100A, VGS = 0 ISD=100A, Tj=150C di/dt = 100A/s, VDD=160V, (see Figure 17) 225 1.35 12 Test condictions Min Typ. Max 110 440 1.6 Unit A A V ns C A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300s, duty cycle 1.5% 5/12 Electrical characteristics STE110NS20FD 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/12 STE110NS20FD Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics 7/12 Test circuit STE110NS20FD 3 Test circuit Figure 13. Gate charge test circuit Figure 12. Switching times test circuit for resistive load Figure 14. Test circuit for inductive load Figure 15. Unclamped inductive load test switching and diode recovery times circuit Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform 8/12 STE110NS20FD Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com 9/12 Package mechanical data STE110NS20FD ISOTOP MECHANICAL DATA DIM. MIN. A B C D E F G H J K L M N O 11.8 8.9 1.95 0.75 12.6 25.15 31.5 4 4.1 14.9 30.1 37.8 4 7.8 8.2 4.3 15.1 30.3 38.2 mm TYP. MAX. 12.2 9.1 2.05 0.85 12.8 25.5 31.7 MIN. 0.466 0.350 0.076 0.029 0.496 0.990 1.240 0.157 0.161 0.586 1.185 1.488 0.157 0.307 0.322 0.169 0.594 1.193 1.503 inch TYP. MAX. 0.480 0.358 0.080 0.033 0.503 1.003 1.248 G O B A N D E F J K L M H C 10/12 STE110NS20FD Revision history 5 Revision history Table 8. Date 12-May-2006 Revision history Revision 3 New template Changes 11/12 STE110NS20FD Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 12/12 |
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