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Dual, 16 MHz, Rail-to-Rail FET Input Amplifier AD823
FEATURES
Single-supply operation Output swings rail-to-rail Input voltage range extends below ground Single-supply capability from 3 V to 36 V High load drive Capacitive load drive of 500 pF, G = +1 Output current of 15 mA, 0.5 V from supplies Excellent ac performance on 2.6 mA/amplifier -3 dB bandwidth of 16 MHz, G = +1 350 ns settling time to 0.01% (2 V step) Slew rate of 22 V/s Good dc performance 800 V maximum input offset voltage 2 V/C offset voltage drift 25 pA maximum input bias current Low distortion: -108 dBc worst harmonic @ 20 kHz Low noise: 16 nV/Hz @ 10 kHz No phase inversion with inputs to the supply rails
CONNECTION DIAGRAM
OUT1 1 -IN1 2 +IN1 3 -VS 4
8 7 6
+VS OUT2 +IN2
00901-001
-IN2
AD823
5
Figure 1. 8-Lead PDIP and SOIC
3V
RL = 100k CL = 50pF +VS = +3V G = +1
GND 500mV 200s
00901-002
APPLICATIONS
Battery-powered precision instrumentation Photodiode preamps Active filters 12-bit to 16-bit data acquisition systems Medical instrumentation
OUTPUT (dB)
Figure 2. Output Swing, +VS = +3 V, G = +1
2 1 0 -1 +VS = +5V G = +1
GENERAL DESCRIPTION
The AD823 is a dual precision, 16 MHz, JFET input op amp that can operate from a single supply of 3.0 V to 36 V or from dual supplies of 1.5 V to 18 V. It has true single-supply capability with an input voltage range extending below ground in single-supply mode. Output voltage swing extends to within 50 mV of each rail for IOUT 100 A, providing outstanding output dynamic range. An offset voltage of 800 V maximum, an offset voltage drift of 2 V/C, input bias currents below 25 pA, and low input voltage noise provide dc precision with source impedances up to a Gigaohm. It provides 16 MHz, -3 dB bandwidth, -108 dB THD @ 20 kHz, and a 22 V/s slew rate with a low supply current of 2.6 mA per amplifier. The AD823 drives up to 500 pF of direct capacitive load as a follower and provides an output current of 15 mA, 0.5 V from the supply rails. This allows the amplifier to handle a wide range of load conditions.
-2 -3 -4 -5 -6 -7 10k 100k 1M FREQUENCY (Hz) 10M
00901-003
-8 1k
Figure 3. Small Signal Bandwidth, G = +1
This combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for applications such as A/D drivers, high speed active filters, and other low voltage, high dynamic range systems. The AD823 is available over the industrial temperature range of -40C to +85C and is offered in both 8-lead PDIP and 8-lead SOIC packages.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)1995-2007 Analog Devices, Inc. All rights reserved.
AD823 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Connection Diagram ....................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Typical Performance Characteristics ..............................................7 Theory of Operation ...................................................................... 13 Output Impedance ..................................................................... 14 Application Notes ........................................................................... 15 Input Characteristics.................................................................. 15 Output Characteristics............................................................... 15 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 19
REVISION HISTORY
2/07--Rev. A to Rev. B Updated Format..................................................................Universal Changes to DC Performance .......................................................... 5 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide ......................................................... 19 5/04--Rev. 0 to Rev. A Changes to Specifications ................................................................ 2 Changes to Ordering Guide ......................................................... 17 Updated Outline Dimensions ....................................................... 17 5/95--Revision 0: Initial Version
Rev. B | Page 2 of 20
AD823 SPECIFICATIONS
At TA = 25C, +VS = +5 V, RL = 2 k to 2.5 V, unless otherwise noted. Table 1.
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Maximum Offset Over temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short-Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Conditions G = +1 VO = 2 V p-p G = -1, VO = 4 V Step G = -1, VO = 2 V Step G = -1, VO = 2 V Step f = 10 kHz f = 1 kHz RL = 600 to 2.5 V, VO = 2 V p-p, f = 20 kHz RL = 5 k RL = 5 k Min 12 14 Typ 16 3.5 22 320 350 16 1 -108 -105 -63 0.2 0.3 2 3 0.5 2 0.5 45 0.8 2.0 25 5 20 Max Unit MHz MHz V/s ns ns nV/Hz fA/Hz dBc dB dB mV mV V/C pA nA pA nA V/mV V/mV V pF dB
VCM = 0 V to 4 V VCM = 0 V to 4 V
VO = 0.2 V to 4 V, RL = 2 k
20 20 -0.2 to +3
VCM = 0 V to 3 V
60
-0.2 to +3.8 1013 1.8 76
VOUT = 0.5 V to 4.5 V Sourcing to 2.5 V Sinking to 2.5 V G = +1 3 TMIN to TMAX, total VS = 5 V to 15 V, TMIN to TMAX 70
0.025 to 4.975 0.08 to 4.92 0.25 to 4.75 16 40 30 500 36 5.6
V V V mA mA mA pF V mA dB
5.2 80
Rev. B | Page 3 of 20
AD823
At TA = 25C, +VS = +3.3 V, RL = 2 k to 1.65 V, unless otherwise noted. Table 2.
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Maximum Offset Over temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short-Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Conditions G = +1 VO = 2 V p-p G = -1, VO = 2 V Step G = -1, VO = 2 V Step G = -1, VO = 2 V Step f = 10 kHz f = 1 kHz RL = 100 , VO = 2 V p-p, f = 20 kHz RL = 5 k RL = 5 k Min 12 13 Typ 15 3.2 20 250 300 16 1 -93 -105 -63 0.2 0.5 2 3 0.5 2 0.5 30 1.5 2.5 25 5 20 Max Unit MHz MHz V/s ns ns nV/Hz fA/Hz dBc dB dB mV mV V/C pA nA pA nA V/mV V/mV V pF dB
VCM = 0 V to 2 V VCM = 0 V to 2 V
VO = 0.2 V to 2 V, RL = 2 k
15 12 -0.2 to +1
VCM = 0 V to 1 V
54
-0.2 to +1.8 1013 1.8 70
VOUT = 0.5 V to 2.5 V Sourcing to 1.5 V Sinking to 1.5 V G = +1 3 TMIN to TMAX, total VS = 3.3 V to 15 V, TMIN to TMAX 70
0.025 to 3.275 0.08 to 3.22 0.25 to 3.05 15 40 30 500 36 5.7
V V V mA mA mA pF V mA dB
5.0 80
Rev. B | Page 4 of 20
AD823
At TA = 25C, VS = 15 V, RL = 2 k to 0 V, unless otherwise noted. Table 3.
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Maximum Offset Over temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short-Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Conditions G = +1 VO = 2 V p-p G = -1, VO = 10 V Step G = -1, VO = 10 V Step G = -1, VO = 10 V Step f = 10 kHz f = 1 kHz RL = 600 , VO = 10 V p-p, f = 20 kHz RL= 5 k RL= 5 k Min 12 17 Typ 16 4 25 550 650 16 1 -90 -105 -63 0.7 1.0 2 5 60 0.5 2 0.5 60 3.5 7 30 5 20 Max Unit MHz MHz V/s ns ns nV/Hz fA/Hz dBc dB dB mV mV V/C pA pA nA pA nA V/mV V/mV V pF dB
VCM = 0 V VCM = -10 V VCM = 0 V
VO = +10 V to -10 V, RL = 2 k
30 30 -15.2 to +13
VCM = -15 V to +13 V
66
-15.2 to +13.8 1013 1.8 82
VOUT = -14.5 V to +14.5 V Sourcing to 0 V Sinking to 0 V G = +1 3 TMIN to TMAX, total VS = 5 V to 15 V, TMIN to TMAX 70
-14.95 to +14.95 -14.92 to +14.92 -14.75 to +14.75 17 80 60 500 36 8.4
V V V mA mA mA pF V mA dB
7.0 80
Rev. B | Page 5 of 20
AD823 ABSOLUTE MAXIMUM RATINGS
Table 4
Parameter Supply Voltage Internal Power Dissipation PDIP (N) SOIC (R) Input Voltage (Common Mode) Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range N, R Operating Temperature Range Lead Temperature Range (Soldering, 10 sec)
MAXIMUM POWER DISSIPATION (W)
Rating 36 V 1.3 W 0.9 W VS 1.2 V See Figure 4 -65C to +125C -40C to +85C 300C
2.0 8-LEAD PDIP
TJ = 150C
1.5
1.0
8-LEAD SOIC 0.5
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
70
80 90
Figure 4. Maximum Power Dissipation vs. Temperature
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Specification is for device in free air. Table 5. Thermal Resistance
Package Type 8-Lead PDIP 8-Lead SOIC JA 90 160 Unit C/W C/W
ESD CAUTION
Rev. B | Page 6 of 20
00901-004
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE (C)
AD823 TYPICAL PERFORMANCE CHARACTERISTICS
80 70 60 50
UNITS
+VS = +5V 314 UNITS = 40V
100 90 80 70 60
UNITS
+VS = +5V 317 UNITS = 0.4pA
40 30 20 10
00901-005
50 40 30 20 10
-150
-100 -50 0 50 100 INPUT OFFSET VOLTAGE (V)
150
200
0
1
2
3 4 5 6 7 INPUT BIAS CURRENT (pA)
8
9
10
Figure 5. Typical Distribution of Input Offset Voltage
Figure 8. Typical Distribution of Input Bias Current
22 20 18 16 14
UNITS
+VS = +5V -55C TO +125C 103 UNITS
10000
+VS = +5V VCM = 0V
INPUT BIAS CURRENT (pA)
1000
100
12 10 8 6 4 2
00901-006
10
1
-5
-4
-3 -2 -1 0 3 4 5 1 2 INPUT OFFSET VOLTAGE DRIFT (V/C)
6
7
25
50 75 TEMPERATURE (C)
100
125
Figure 6. Typical Distribution of Input Offset Voltage Drift
Figure 9. Input Bias Current vs. Temperature
3 2
+VS = +5V
1000
VS = 15V
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
1 0 -1 -2 -3 -4 -5
100
10
1
00901-007
-4
-3
-2 -1 0 1 2 3 COMMON-MODE VOLTAGE (V)
4
5
-12
-8 -4 0 4 8 COMMON-MODE VOLTAGE (V)
12
16
Figure 7. Input Bias Current vs. Common-Mode Voltage
Figure 10. Input Bias Current vs. Common-Mode Voltage
Rev. B | Page 7 of 20
00901-010
0.1 -16
00901-009
0 -6
0.1 0
00901-008
0 -200
0
AD823
110 VS = 2.5V 95 94 100 93 RL = 2k +VS = +5V
OPEN-LOOP GAIN (dB)
OPEN-LOOP GAIN (dB)
00901-011
92 91 90 89 88 87
90
80
70
1k
10k LOAD RESISTANCE ()
100k
500k
-25
5 35 65 TEMPERATURE (C)
95
125
Figure 11. Open-Loop Gain vs. Load Resistance
1000 RL = 10k
OPEN-LOOP GAIN (k V ) V
Figure 14. Open-Loop Gain vs. Temperature
100 100
RL = 2k CL = 20pF
100
OPEN-LOOP GAIN (dB)
RL = 1k 10 RL = 100 1
60
PHASE
60
40 GAIN 20
40
20
0
00901-012
0
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 12. Open-Loop Gain vs. Output Voltage, VS = 2.5 V
-40 -50 -60
THD (dB)
Figure 15. Open-Loop Gain and Phase Margin vs. Frequency
100
+VS = +5V
-70 -80 -90 -100 -110 100
+VS = +3V VOUT = 2V p-p RL = 100 VS = 2.5V VOUT = 2V p-p VS = 15V RL = 1k VOUT = 10V p-p RL = 600
INPUT VOLTAGE NOISE (nV/Hz)
30
ALL OTHERS
+VS = +3V VOUT = 2V p-p RL = 5k +VS = +5V VOUT = 2V p-p RL = 5k
00901-013
10
1k
10k FREQUENCY (Hz)
100k
1M
10
100
1k 10k FREQUENCY (Hz)
100k
1M
Figure 13. Total Harmonic Distortion vs. Frequency
Figure 16. Input Voltage Noise vs. Frequency
Rev. B | Page 8 of 20
00901-016
3
00901-015
0.1 0.5 1.0 -2.5 -2.0 -1.5 -1.0 -0.5 0 OUTPUT VOLTAGE (V)
1.5
2.0
2.5
-20 100
-20 100M
PHASE MARGIN (Degrees)
80
80
00901-014
60 100
86 -55
AD823
5 4 CL = 20pF RL = 2k G = +1
90 80 70
CMRR (dB)
VS = 15V +VS = +5V
CLOSED-LOOP GAIN (dB)
3 2 1 0 -1 -2 -3 -4
00901-017
60 50 40 30 20 10
+27C +125C
-55C
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 17. Closed-Loop Gain vs. Frequency
100
Figure 20. Common-Mode Rejection Ratio vs. Frequency
10
+VS = +5V GAIN = +1
+VS = +5V
10
OUTPUT SATURATION VOLTAGE (V)
OUTPUT RESISTANCE ()
1 VS - VOH 25C
1
0.1
0.1
VOL 25C
00901-018
1k
10k 100k FREQUENCY (Hz)
1M
10M
1 10 LOAD CURRENT (mA)
100
Figure 18. Output Resistance vs. Frequency, +VS = +5 V, Gain = +1
10 8 6 4 2 0 -2 -4 -6 -8
00901-019
Figure 21. Output Saturation Voltage vs. Load Current
10
OUTPUT STEP SIZE FROM 0V TO VSHOWN (V)
VS = 15V CL = 20pF
1%
0.1%
0.01%
QUIESCENT CURRENT (mA)
8
+125C +25C
6
-55C
4
1%
0.1%
0.01%
2
200
300
400
500
600
700
0
5
SETTLING TIME (ns)
10 15 SUPPLY VOLTAGE (V)
20
Figure 19. Output Step Size vs. Settling Time (Inverter)
Figure 22. Quiescent Current vs. Supply Voltage
Rev. B | Page 9 of 20
00901-022
-10 100
0
00901-021
0.01 100
0.01 0.1
00901-020
-5 0.30 3.27 6.24 9.21 12.18 15.15 18.12 21.09 24.06 27.03 30.00 FREQUENCY (MHz)
AD823
100 90 +VS = +5V
21 18
SERIES RESISTANCE ()
+VS = +5V VIN
RS CL
POWER SUPPLY REJECTION (dB)
80 70 60 50 40 30 20 10
00901-023
15 12 9 M = 45 6 M = 20 3
00901-026
+PSRR
-PSRR
0 100
1k
10k 100k FREQUENCY (Hz)
1M
10M
0
0
1
2
3 4 5 6 7 CAPACITOR (pF x 1000)
8
9
10
Figure 23. Power Supply Rejection vs. Frequency
30
Figure 26. Series Resistance vs. Capacitive Load
-30 -40 -50
CROSSTALK (dB)
RL = 2k G = +1
+VS = +5V
OUTPUT VOLTAGE (V p-p)
20 VS = 15V
-60 -70 -80 -90 -100 -110 -120
10 +VS = +5V +VS = +3V
00901-024
100k 1M FREQUENCY (Hz)
10M
10k
100k FREQUENCY (Hz)
1M
10M
Figure 24. Large Signal Frequency Response
VIN = 2.9V p-p +VS = +3V G = -1
Figure 27. Crosstalk vs. Frequency
VIN = 20V p-p VS = 15V G = +1
500mV 100k 100k VIN = 2.9V p-p 50 100k 3V
10s
5V +15V
20s
VOUT
00901-025
20kHz, 20V p-p
00901-028
50pF
-15V
604
50pF
Figure 25. Output Swing, +VS = +3 V, G = -1
Figure 28. Output Swing, VS = 15 V, G = +1
Rev. B | Page 10 of 20
00901-027
0 10k
-130 1k
AD823
5V RL = 300 CL = 50pF RF = RG = 2k +VS = +5V G = -1
RL = 100k CL = 50pF +VS = +3V G = +1
3V
GND
00901-029
500mV GND
200s
500mV
200s
Figure 29. Output Swing, +VS = +5 V, G = -1
Figure 32. Output Swing, +VS = +3 V, G = +1
VIN = 100mV STEP +VS = +3V G = +1
5V
RL = 2k CL = 50pF +VS = +5V G = +1
1.55V
1.45V
00901-030
25mV
50ns
500mV GND
100ns
Figure 30. Pulse Response, +VS = +3 V, G = +1
Figure 33. Pulse Response, +VS = +5 V, G = +1
5V
RL = 2k CL = 50pF +VS = +5V G = +2
RL = 2k CL = 470pF +VS = +5V G = +1
00901-031
500mV GND
100ns
500mV
200ns
Figure 31. Pulse Response, +VS = +5 V, G = +2
Figure 34. Pulse Response, +VS = +5 V, G = +1, CL = 470 pF
Rev. B | Page 11 of 20
00901-034
00901-033
00901-032
AD823
RL = 100k CL = 50pF VS = 15V G = +1 +10V
-10V
5V
500ns
Figure 35. Pulse Response, VS = 15 V, G = +1
00901-035
Rev. B | Page 12 of 20
AD823 THEORY OF OPERATION
The AD823 is fabricated on the Analog Devices, Inc. proprietary complementary bipolar (CB) process that enables the construction of PNP and NPN transistors with similar fT's in the 600 MHz to 800 MHz region. In addition, the process also features N-Channel JFETs that are used in the input stage of the AD823. These process features allow the construction of high frequency, low distortion op amps with picoamp input currents. This design uses a differential output input stage to maximize bandwidth and headroom (see Figure 36). The smaller signal swings required on the S1P/S1N outputs reduce the effect of the nonlinear currents due to junction capacitances and improve the distortion performance. With this design, harmonic distortion of better than -91 dB @ 20 kHz into 600 with VOUT = 4 V p-p on a single 5 V supply is achieved. The complementary common emitter design of the output stage provides excellent load drive without the need for emitter followers, thereby improving the output range of the device considerably with respect to conventional op amps. The AD823 can drive 20 mA with the outputs within 0.6 V of the supply rails. The AD823 also offers outstanding precision for a high speed op amp. Input offset voltages of 1 mV maximum and offset drift of 2 V/C are achieved through the use of the Analog Devices advanced thin film trimming techniques.
VCC R42 R37 VBE + 0.3V V1 I5 Q43 Q55 I6
A nested integrator topology is used in the AD823 (see Figure 37). The output stage can be modeled as an ideal op amp with a single-pole response and a unity-gain frequency set by transconductance gm2 and Capacitor C2. R1 is the output impedance of the input stage; gm is the input transconductance. C1 and C5 provide Miller compensation for the overall op amp. The unity-gain frequency occurs at gm/C5. Solving the node equations for this circuit yields
V OUT Vi
where:
=
A0
(sR1[C1( A2 + 1)] + 1) x s
g m2 + 1 C2
A0 = gmgm2 R2R1 (open-loop gain of op amp) A2 = gm2 R2 (open-loop gain of output stage). The first pole in the denominator is the dominant pole of the amplifier and occurs at ~18 Hz. This equals the input stage output impedance R1 multiplied by the Miller-multiplied value of C1. The second pole occurs at the unity-gain bandwidth of the output stage, which is 23 MHz. This type of architecture allows more open-loop gain and output drive to be obtained than a standard 2-stage architecture would allow.
Q44 A=1 Q57 A = 19
Q72 VINP J1 J6
Q61 Q46
Q58
Q49 Q18 C2
R44 Q21
R28 Q54 VOUT
VINN
S1P
S1N
Q62
Q60 C1 VB
VCC Q48 Q53 Q35
I1
C6
R33
I2
R43 I3 Q56 Q52 I4
Q17 A = 19 Q59 A=1
VEE
Figure 36. Simplified Schematic
Rev. B | Page 13 of 20
00901-036
AD823
OUTPUT IMPEDANCE
The low frequency open-loop output impedance of the commonemitter output stage used in this design is approximately 30 k. Although this is significantly higher than a typical emitter follower output stage, when it is connected with feedback, the output impedance is reduced by the open-loop gain of the op amp. With 109 dB of open-loop gain, the output impedance is reduced to <0.2 . At higher frequencies, the output impedance rises as the open-loop gain of the op amp drops; however, the output also becomes capacitive due to the integrator capacitors C1 and C2. This prevents the output impedance from ever becoming excessively high (see Figure 18), which can cause stability problems when driving capacitive loads. In fact, the AD823 has excellent cap-load drive capability for a high frequency op amp. Figure 34 shows the AD823 connected as a follower while driving 470 pF direct capacitive load. Under these conditions, the phase margin is approximately 20. If greater phase margin is desired, a small resistor can be used in series with the output to decouple the effect of the load capacitance from the op amp (see Figure 26). In addition, running the part at higher gains also improves the capacitive load drive capability of the op amp.
S1N gmVI R1 S1P gmVI R1 C5 gm2 R2 C1
VOUT C2
Figure 37. Small Signal Schematic
Rev. B | Page 14 of 20
00901-037
AD823 APPLICATION NOTES
INPUT CHARACTERISTICS
In the AD823, N-Channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input commonmode voltage extends from 0.2 V below -VS to 1 V < +VS. Driving the input voltage closer to the positive rail causes a loss of amplifier bandwidth and increased common-mode voltage error. The AD823 does not exhibit phase reversal for input voltages up to and including +VS. Figure 38 shows the response of an AD823 voltage follower to a 0 V to 5 V (+VS) square wave input. The input and output are superimposed. The output polarity tracks the input polarity up to +VS, with no phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output wave form. For input voltages greater than +VS, a resistor in series with the AD823's noninverting input prevents phase reversal, at the expense of greater input voltage noise. This is illustrated in Figure 39.
1V
100 90
Because the input stage uses N-Channel JFETs, input current during normal operation is negative; the current flows out from the input terminals. If the input voltage is driven more positive than +VS - 0.4 V, the input current reverses direction as internal device junctions become forward biased. This is illustrated in Figure 7. A current limiting resistor should be used in series with the input of the AD823 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage is applied to the AD823 when VS = 0. The amplifier becomes damaged if left in that condition for more than 10 seconds. A 1 k resistor allows the amplifier to withstand up to 10 V of continuous overvoltage and increases the input voltage noise by a negligible amount. Input voltages less than -VS are a completely different story. The amplifier can safely withstand input voltages 20 V below -VS as long as the total voltage from the positive supply to the input terminal is less than 36 V. In addition, the input stage typically maintains picoamp level input currents across that input voltage range. The AD823 is designed for 16 nV/Hz wideband input voltage noise and maintains low noise performance to low frequencies (see Figure 16). This noise performance, along with the AD823's low input current and current noise, means that the AD823 contributes negligible noise for applications with source resistances greater than 10 k and signal bandwidths greater than 1 kHz.
2s
10
GND 0%
1V
00901-038
OUTPUT CHARACTERISTICS
The AD823's unique bipolar rail-to-rail output stage swings within 25 mV of the supplies with no external resistive load. The AD823's approximate output saturation resistance is 25 sourcing and sinking. This can be used to estimate the output saturation voltage when driving heavier current loads. For instance, when driving 5 mA, the saturation voltage to the rails is approximately 125 mV. If the AD823's output is driven hard against the output saturation voltage, it recovers within 250 ns of the input returning to the amplifier's linear operating region.
Figure 38. AD823 Input Response: RP = 0, VIN = 0 to +VS
1V
100
10 s
+VS
90
GND
10 0%
A/D Driver
1V
RP VIN
5V
AD823
Figure 39. AD823 Input Response: VIN = 0 to +VS + 200 mV, VOUT = 0 to +VS, RP = 49.9 k
00901-039
VOUT
The rail-to-rail output of the AD823 makes it useful as an A/D driver in a single-supply system. Because it is a dual op amp, it can be used to drive both the analog input of the A/D as well as its reference input. The high impedance FET input of the AD823 is well suited for minimal loading of high output impedance devices.
Rev. B | Page 15 of 20
AD823
Figure 40 shows a schematic of an AD823 being used to drive both the input and reference input of an AD1672, a 12-bit, 3-MSPS, single-supply ADC. One amplifier is configured as a unity-gain follower to drive the analog input of the AD1672, which is configured to accept an input voltage that ranges from 0 V to 2.5 V. The other amplifier is configured as a gain of 2 to drive the reference input from a 1.25 V reference. Although the AD1672 has its own internal reference, there are systems that require greater accuracy than the internal reference provides. On the other hand, if the AD1672 internal reference is used, the second AD823 amplifier can be used to buffer the reference voltage for driving other circuitry while minimally loading the reference source.
+5VA 10F +5VA 28 19
+VCC
The distortion analysis is important for systems requiring good frequency domain performance. Other systems may require good time domain performance. The noise and settling time performance of the AD823 provides the necessary information for its applicability for these systems.
1 VIN = 2.15V p-p G = +1 FI = 490kHz
15dB/DIV
2 4 5 6 9 7 3 8
+5VD 0.1F 10F +5VD 0.1F 15 13 14 12 11 10 9 8 7 6 5 4 3 2 1 OTR BIT1 (MSB) BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 BIT10 BIT11 BIT12 (LSB)
00901-041
0.1F
10F
+VDD
0.1F 2 VIN 3 8 1 49.9
20 REFOUT 21 AIN1 22 AIN2
Figure 41. FFT of AD1672 Output Driven by AD823
3 V, Single-Supply Stereo Headphone Driver
The AD823 exhibits good current drive and total harmonic distortion plus noise (THD+N) performance, even at 3 V single supplies. At 20 kHz, THD+N equals -62 dB (0.079%) for a 300 mV p-p output signal. This is comparable to other singlesupply op amps that consume more power and cannot run on 3 V power supplies. In Figure 42, each channel's input signal is coupled via a 1 F Mylar capacitor. Resistor dividers set the dc voltage at the noninverting inputs so that the output voltage is midway between the power supplies (+1.5 V). The gain is 1.5. Each half of the AD823 can then be used to drive a headphone channel. A 5 Hz high-pass filter is realized by the 500 F capacitors and the headphones that can be modeled as 32 load resistors to ground. This ensures that all signals in the audio frequency range (20 Hz to 20 kHz) are delivered to the headphones.
3V +
AD823
VREF (1.25V) 5 6 4 1k 1k 7
AD1672
23 REFIN 24 REFCOM 25 NCOMP2 26 NCOMP1
27 16
ACOM REF
DCOM COM
CLOCK
19
18
Figure 40. AD823 Driving Input and Reference of the AD1672, a 12-Bit, 3-MSPS ADC
The circuit was tested with a 500 kHz sine wave input that was heavily low-pass filtered (60 dB) to minimize the harmonic content at the input to the AD823. The digital output of the AD1672 was analyzed by performing a fast Fourier transform (FFT). During the testing, it was observed that at 500 kHz, the output of the AD823 cannot go below ~350 mV (operating with negative supply at ground) without seriously degrading the second harmonic distortion. Another test was performed with a 200 pull-down resistor to ground that allowed the output to go as low as 200 mV without seriously affecting the second harmonic distortion. There was, however, a slight increase in the third harmonic term with the resistor added, but it was still less than the second harmonic. Figure 41 is an FFT plot of the results of driving the AD1672 with the AD823 with no pull-down resistor. The input amplitude was 2.15 V p-p and the lower voltage excursion was 350 mV. The input frequency was 490 kHz, which was chosen to spread the location of the harmonics.
00901-040
95.3k CHANNEL 1 1F MYLAR
95.3k 3 47.5k 2 1/2 8 1
0.1F + 500F
0.1F
AD823
95.3k
10k
4.99k HEADPHONES 32 IMPEDANCE
L
10k
R 4.99k 6 1F CHANNEL 2 MYLAR 47.5k 5 500F 7 +
00901-042
AD823
4
1/2
Figure 42. 3 V Single-Supply Stereo Headphone Driver
Rev. B | Page 16 of 20
AD823
Second-Order Low-Pass Filter
Figure 43 depicts the AD823 configured as a second-order Butterworth low-pass filter. With the values as shown, the corner frequency equals 200 kHz. Component selection is shown in the following equations: R1 = R2 = User Selected (Typical Values: 10 k to 100 k)
C1( farads ) = C2 = 1.414 2f cutoff x R1
Single-Supply Half-Wave and Full-Wave Rectifiers
An AD823 configured as a unity-gain follower and operated with a single supply can be used as a simple half-wave rectifier. The AD823 inputs maintain picoamp level input currents even when driven well below the minus supply. The rectifier puts that behavior to good use, maintaining an input impedance of over 1011 for input voltages from within 1 V of the positive supply to 20 V below the negative supply. The full-wave and half-wave rectifier shown in Figure 45 operates as follows: when VIN is above ground, R1 is bootstrapped through the unity-gain follower A1 and the loop of Amplifier A2. This forces the inputs of A2 to be equal, thus no current flows through R1 or R2, and the circuit output tracks the input. When VIN is below ground, the output of A1 is forced to ground. The noninverting input of Amplifier A2 sees the ground level output of A1; therefore, A2 operates as a unitygain inverter. The output at Node C is then a full-wave rectified version of the input. Node B is a buffered half-wave rectified version of the input. Input voltage supply to 18 V can be rectified, depending on the voltage supply used.
00901-043
0.707 2f cutoff x R1
C2 56pF R1 20k VIN C1 28pF R2 20k
+5V C3 0.1F 1/2
AD823
50pF
VOUT
C4 0.1F -5V
R1 100k
R2 100k
Figure 43. Second-Order Low-Pass Filter
A
+VS 3 VIN 2 8 A1 4
0.01F 6 1 5 A2 A2 7 C FULL-WAVE RECTIFIED OUTPUT
A plot of the filter is shown in Figure 44; better than 50 dB of high frequency rejection is provided.
0
HIGH FREQUENCY REJECTION (dB)
AD823
1/2
AD823
1/2
B
-10 VDB - VOUT
-20
-30
Figure 45. Full-Wave and Half-Wave Rectifier
-40
2V 200s
-50
100
A 90
10k
100k 1M FREQUENCY (Hz)
10M
100M
Figure 44. Frequency Response of Filter
B
00901-044
-60 1k
10
2V
Figure 46. Single-Supply Half-Wave and Full-Wave Rectifier
Rev. B | Page 17 of 20
00901-046
C 0%
00901-044
HALF-WAVE RECTIFIED OUTPUT
AD823 OUTLINE DIMENSIONS
0.375 (9.53) 0.365 (9.27) 0.355 (9.02)
8 5
1
4
0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14)
0.100 (2.54) BSC 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36)
0.150 (3.81) 0.135 (3.43) 0.120 (3.05)
0.015 (0.38) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 47. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters)
5.00 (0.1968) 4.80 (0.1890)
8 5
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440)
4 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 48. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
Rev. B | Page 18 of 20
AD823
ORDERING GUIDE
Models AD823AN AD823ANZ 1 AD823AR AD823AR-REEL AD823AR-REEL7 AD823ARZ1 AD823ARZ-RL1 AD823ARZ-R71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N, 13" Reel 8-Lead SOIC_N, 7" Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Reel 8-Lead SOIC_N, 7" Reel
Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8
Z = RoHS Compliant Part.
Rev. B | Page 19 of 20
AD823 NOTES
(c)1995-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00901-0-2/07(B)
Rev. B | Page 20 of 20

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