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Low Cost, Low Power Video Op Amp AD818
FEATURES Low Cost Excellent Video Performance 55 MHz 0.1 dB Bandwidth (Gain = +2) 0.01% and 0.05 Differential Gain and Phase Errors High Speed 130 MHz Bandwidth (3 dB, G = +2) 100 MHz Bandwidth (3 dB, G+ = -1) 500 V/ s Slew Rate 80 ns Settling Time to 0.01% (VO = 10 V Step) High Output Drive Capability 50 mA Minimum Output Current Ideal for Driving Back Terminated Cables Flexible Power Supply Specified for Single (+5 V) and Dual ( 5 V to 15 V) Power Supplies Low Power: 7.5 mA Max Supply Current Available in 8-Lead SOIC and 8-Lead PDIP GENERAL DESCRIPTION CONNECTION DIAGRAM 8-Lead Plastic Mini-DIP (N) and SOIC (R) Packages
NULL -IN +IN -VS
1 2 3 4
AD818
8 7 6 5
NULL +VS OUTPUT NC
TOP VIEW NC = NO CONNECT
any video application. The 130 MHz 3 dB bandwidth (G = +2) and 500 V/ms slew rate make the AD818 useful in many high speed applications including video monitors, CATV, color copiers, image scanners, and fax machines. The AD818 is fully specified for operation with a single +5 V power supply and with dual supplies from 5 V to 15 V. This power supply flexibility, coupled with a very low supply current of 7.5 mA and excellent ac characteristics under all power supply conditions, make the AD818 the ideal choice for many demanding yet power sensitive applications. The AD818 is a voltage feedback op amp and excels as a gain stage in high speed and video systems (gain 2, or gain -1). It achieves a settling time of 45 ns to 0.1%, with a low input offset voltage of 2 mV max. The AD818 is available in low cost, small 8-lead PDIP and SOIC packages.
The AD818 is a low cost video op amp optimized for use in video applications that require gains equal to or greater than +2 or -1. The AD818's low differential gain and phase errors, single supply functionality, low power, and high output drive make it ideal for cable driving applications such as video cameras and professional video equipment. With video specs like 0.1 dB flatness to 55 MHz and low differential gain and phase errors of 0.01% and 0.05, along with 50 mA of output current, the AD818 is an excellent choice for
+15V
0.01 F
2.2 F
DIFF GAIN
0.02
0.01
VIN
DIFFERENTIAL PHASE (Degrees)
AD818
RBT 75
75
0.06 0.00
RT 75
0.05
DIFF PHASE
0.1 F
2.2 F
0.04
-15V 1k 1k
0.03 5 10 SUPPLY VOLTAGE ( V) 15
Figure 1. Video Line Driver
Figure 2. Differential Gain and Phase vs. Supply
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
DIFFERENTIAL GAIN (%)
AD818-SPECIFICATIONS
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Conditions Gain = +2
(@ TA = 25 C, unless otherwise noted.)
AD818A Typ 95 130 55 70 100 50 43 55 18 34 72 19 25.5 8.0 400 500 300 45 45 80 80 63 0.005 0.01 0.08 0.045 0.06 0.1 10 0.5 10
VS 5 V 15 V 0 V, +5 V 5 V 15 V 0 V, +5 V 5 V 15 V 0 V, +5 V 5 V 15 V 0 V, +5 V 5 V 15 V 5 V 15 V 0 V, +5 V 5 V 15 V 5 V 15 V 15 V 15 V 5 V 0 V, +5 V 15 V 5 V 0 V, +5 V 5 V to 15 V
Min 70 100 40 50 70 30 20 40 10 18 40 10
Max
Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz V/ms V/ms V/ms ns ns ns ns dB % % % Degrees Degrees Degrees pF mV mV mV/C mA mA mA nA nA nA/C V/mV V/mV V/mV V/mV V/mV
Gain = -1
Bandwidth for 0.1 dB Flatness
Gain = +2 CC = 2 pF Gain = -1 CC = 2 pF
Full Power Bandwidth*
Slew Rate
VOUT = 5 V p-p RLOAD = 500 W VOUT = 20 V p-p RLOAD = 1 kW RLOAD = 1 kW Gain = -1 -2.5 V to +2.5 V 0 V-10 V Step, AV = -1 -2.5 V to +2.5 V 0 V-10 V Step, AV = -1 FC = 1 MHz NTSC Gain = +2 NTSC Gain = +2
350 450 250
Settling Time to 0.1% Settling Time to 0.01% Total Harmonic Distortion Differential Gain Error (RL = 150 W) Differential Phase Error (RL = 150 W) Cap Load Drive INPUT OFFSET VOLTAGE
0.01 0.02 0.09 0.09
TMIN to TMAX Offset Drift INPUT BIAS CURRENT TMIN TMAX INPUT OFFSET CURRENT TMIN to TMAX Offset Current Drift OPEN-LOOP GAIN VOUT = 2.5 V RLOAD = 500 W TMIN to TMAX RLOAD = 150 W VOUT = 10 V RLOAD = 1 kW TMIN to TMAX VOUT = 7.5 V RLOAD = 150 W (50 mA Output) VCM = 2.5 V VCM = 12 V TMIN to TMAX
2 3 6.6 10 4.4 300 500
5 V, 15 V
3.3
5 V, 15 V
25 0.3
5 V
15 V 15 V
3 2 2 6 3
5 4 9
3 5 V 15 V 15 V 82 86 84
5 100 120 100
V/mV dB dB dB
COMMON-MODE REJECTION
-2-
REV. C
AD818
Parameter POWER SUPPLY REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE Conditions VS = 5 V to 15 V TMIN to TMAX f = 10 kHz f = 10 kHz 5 V, 15 V 5 V, 15 V 5 V 15 V 0 V, +5 V OUTPUT VOLTAGE SWING RLOAD = 500 W RLOAD = 150 W RLOAD = 1 kW RLOAD = 500 W RLOAD = 500 W 5 V 5 V 15 V 15 V 0 V, +5 V 15 V 5 V 0 V, +5 V 15 V +3.8 -2.7 +13 -12 +3.8 +1.2 3.3 3.2 13.3 12.8 1.5, 3.5 50 50 30 VS Min 80 80 AD818A Typ 90 10 1.5 +4.3 -3.4 +14.3 -13.4 +4.3 +0.9 3.8 3.6 13.7 13.4 Max Unit dB dB nV//Hz pA//Hz V V V V V V V V V V V mA mA mA mA kW pF W 18 +36 7.5 7.5 7.5 7.5 V V mA mA mA mA
Output Current
Short-Circuit Current INPUT RESISTANCE INPUT CAPACITANCE OUTPUT RESISTANCE POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX TMIN to TMAX
*Full power bandwidth = slew rate/(2p VPEAK). Specifications subject to change without notice.
90 300 1.5
Open Loop Dual Supply Single Supply 2.5 +5
8
5 V 5 V 15 V 15 V
7.0
7.0
REV. C
-3-
AD818
MAXIMUM POWER DISSIPATION (W)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V Output Short-Circuit Duration . . . . . . . . See Derating Curves Storage Temperature Range (N, R) . . . . . . . . -65C to +125C Operating Temperature Range . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-lead plastic package, JA = 90C/W; 8-lead SOIC package, JA = 155C/W.
ABSOLUTE MAXIMUM RATINGS 1
2.0 TJ = 150 C 8-LEAD MINI-DIP PACKAGE 1.5
1.0
0.5 8-LEAD SOIC PACKAGE
0 -50 -40 -30 -20 -10
0
10
20
30
40
50 60 70
80
90
AMBIENT TEMPERATURE ( C)
Figure 3. Maximum Power Dissipation vs. Temperature for Different Package Types
ORDERING GUIDE
Model AD818AN AD818AR AD818AR-REEL AD818AR-REEL7
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead Plastic PDIP 8-Lead Plastic SOIC 13" Tape and Reel 7" Tape and Reel
Package Option N-8 R-8 R-8 R-8
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD818 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
METALLIZATION PHOTOGRAPH
Dimensions shown in inches and (mm)
OFFSET OFFSET NULL NULL 1 8
+VS 7
-INPUT 2
0.0523 (1.33)
6 OUTPUT +INPUT 3
4 -VS 0.0559 (1.42)
-4-
REV. C
Typical Performance Characteristics-AD818
20
20
INPUT COMMON-MODE RANGE ( V)
OUTPUT VOLTAGE SWING ( V)
15 +VCM 10 -VCM 5
15 RL = 500
10
RL = 150 5
0 0 5 10 SUPPLY VOLTAGE ( V) 15 20
0 0 5 10 SUPPLY VOLTAGE ( V) 15 20
TPC 1. Common-Mode Voltage Range vs. Supply
TPC 4. Output Voltage Swing vs. Supply
30
8.0
OUTPUT VOLTAGE SWING (V p-p)
25 VS = 20 15V
QUIESCENT SUPPLY CURRENT (mA)
7.5 +85 C 7.0 -40 C
+25 C
15
10 VS = 5 5V
6.5
0 10
6.0
100 1k LOAD RESISTANCE ( )
10k
0
5
10 SUPPLY VOLTAGE ( V)
15
20
TPC 2. Output Voltage Swing vs. Load Resistance
TPC 5. Quiescent Supply Current vs. Supply Voltage
600
CLOSED-LOOP OUTPUT IMPEDANCE ( )
100
500
SLEW RATE (V/ s)
10
400
1
300
0.1
200 0 5 10 SUPPLY VOLTAGE ( V) 15 20
0.01 1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
TPC 3. Slew Rate vs. Supply Voltage
TPC 6. Closed-Loop Output Impedance vs. Frequency
REV. C
-5-
AD818
7
130
SHORT CIRCUIT CURRENT (mA)
6
INPUT BIAS CURRENT ( A)
110 SOURCE CURRENT 90 SINK CURRENT 70
5
4
3
2
50
1 -60
-40
-20
0
20 40 60 TEMPERATURE ( C)
80
100
120
140
30 -60
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE ( C)
TPC 7. Input Bias Current vs. Temperature
TPC 10. Short-Circuit Current vs. Temperature
70
95
100 PHASE 5V OR 15V SUPPLIES
100
PHASE MARGIN PHASE MARGIN PHASE MARGIN (Degrees) -3dB BANDWIDTH (MHz)
OPEN-LOOP GAIN (dB)
80 85 15V SUPPLIES RL = 1k
80
PHASE MARGIN (Degrees)
60
60
60
50
75
40 5V SUPPLIES RL = 1k 20
40
GAIN/BANDWIDTH 40 65
20
0
0
30 -60
-40
-20
0
20 40 60 80 TEMPERATURE ( C)
100
120
55 140
-20 1k 10k 100k 1M 10M FREQUENCY (Hz) 100M 1G
TPC 8. -3 dB Bandwidth and Phase Margin vs. Temperature, Gain = +2
TPC 11. Open-Loop Gain and Phase Margin vs. Frequency
9 15V
100 90 80 +SUPPLY
8
OPEN-LOOP GAIN (V/mV)
7 5V
PSR (dB)
70 60 -SUPPLY 50 40 30
6
5
4 20 3 100 10 100
1k LOAD RESISTANCE ( )
10k
1k
10k 100k 1M FREQUENCY (Hz)
10M
100M
TPC 9. Open-Loop Gain vs. Load Resistance
TPC 12. Power Supply Rejection vs. Frequency
-6-
REV. C
AD818
120 30 RL = 1k 100
OUTPUT VOLTAGE (V p-p)
20
CMR (dB)
80
RL = 150
10
60
40 1k 10k 100k FREQUENCY (Hz) 1M 10M
0 100k
1M
10M FREQUENCY (Hz)
100M
TPC 13. Common-Mode Rejection vs. Frequency
TPC 16. Output Voltage vs. Frequency
10 8 V (V) HARMONIC DISTORTION (dB) 6 4 1% 2 0 -2 -4 -6 -8 -10 0 20 40 60 80 100 SETTLING TIME (ns) 120 140 160 1% 0.1% 0.01% 0.1% 0.01%
-40 RL = 150 2V p-p -50
OUTPUT SWING FROM 0 TO
-60
-70 SECOND HARMONIC -80 THIRD HARMONIC -90
-100 100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
TPC 14. Output Swing and Error vs. Settling Time
TPC 17. Harmonic Distortion vs. Frequency
50
650
INPUT VOLTAGE NOISE (nV/ Hz)
40
550
30
SLEW RATE (V/ s)
1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 10M
450
20
10
350
0
250 -60
-40
-20
0
20 40 60 80 TEMPERATURE ( C)
100
120
140
TPC 15. Input Voltage Noise Spectral Density vs. Frequency
TPC 18. Slew Rate vs. Temperature
REV. C
-7-
AD818
CF
0.02
1k
DIFF GAIN
DIFFERENTIAL PHASE (Degrees)
0.01
+VS 3.3 F
0.06
0.00
DIFFERENTIAL GAIN (%)
0.01 F HP VIN 1k PULSE (LS) OR FUNCTION (SS) GENERATOR 50
0.05 DIFF PHASE 0.04
AD818
VOUT 0.01 F
TEKTRONIX P6201 FET PROBE
TEKTRONIX 7A24 PREAMP
0.03 5 10 SUPPLY VOLTAGE ( V) 15
-VS 3.3 F
RL
TPC 19. Differential Gain and Phase vs. Supply Voltage
TPC 22. Inverting Amplifier Connection
10 9 8
VS
CC
0.1dB FLATNESS 1k VIN
CC
2V
1k AD818 150 VOUT
100 90
50ns
15V 2pF 55MHz 5V 1pF 43MHz +5V 1pF 18MHz
GAIN (dB)
7 6 5
5V 15V
10
4 3 +5V 2
0%
2V
1 1M 10M 100M FREQUENCY (Hz) 1G
TPC 20. Closed-Loop Gain vs. Frequency (G = +2)
TPC 23. Inverter Large Signal Pulse Response; VS = 5 V, CF = 1 pF, RL = 1 kW
10 8 6 4 VS
15V 5V +5V
0.1dB FLATNESS
72MHz 34MHz 19MHz
2pF
200mV
1k VIN 1k AD818 150 VOUT
100 90
10ns
GAIN (dB)
2 0 -2
+5V
15V
10
-4 -6
5V
0%
-8 -10 1M 10M 100M FREQUENCY (Hz) 1G
200mV
TPC 21. Closed-Loop Gain vs. Frequency (G = -1)
TPC 24. Inverter Small Signal Pulse Response; VS = 5 V, CF = 1 pF, RL = 150 W
-8-
REV. C
AD818
CF 1k 1k +VS 3.3 F
5V
100 90
50ns
0.01 F
10 0%
HP VIN 100 PULSE (LS) OR FUNCTION (SS) GENERATOR 50
AD818
VOUT 0.01 F
TEKTRONIX P6201 FET PROBE
TEKTRONIX 7A24 PREAMP
5V
3.3 F -VS
RL
TPC 25. Inverter Large Signal Pulse Response; VS = 15 V, CF = 1 pF, RL = 1 kW
TPC 28. Noninverting Amplifier Connection
200mV
100 90
10ns
100 90
1V
50ns
10 0%
10 0%
200mV
2V
TPC 26. Inverter Small Signal Pulse Response; VS = 15 V, CF = 1 pF, RL = 150 W
TPC 29. Noninverting Large Signal Pulse Response; VS = 5 V, CF = 1 pF, RL = 1 kW
200mV
100 90
10ns
100 90
100mV
10ns
10 0%
10 0%
200mV
200mV
TPC 27. Inverter Small Signal Pulse Response; VS = 5 V, CF = 0 pF, RL = 150 W
TPC 30. Noninverting Small Signal Pulse Response; VS = 5 V, CF = 1 pF, RL = 150 W
REV. C
-9-
AD818
5V
100
50ns
100
100mV
10ns
90
90
10
0%
10
0%
5V
200mV
TPC 31. Noninverting Large Signal Pulse Response; VS = 15 V, CF = 1 pF, RL = 1 kW
TPC 33. Noninverting Small Signal Pulse Response; VS = 5 V, CF = 0 pF, RL = 150 W
100mV
100
10ns
90
10
0%
200mV
TPC 32. Noninverting Small Signal Pulse Response; VS = 15 V, CF = 1 pF, RL = 150 W
-10-
REV. C
AD818
+VS
may result in peaking. A small capacitance (1 pF-5 pF) may be used in parallel with the feedback resistor to neutralize this effect. Power supply leads should be bypassed to ground as close as possible to the amplifier pins. Ceramic disc capacitors of 0.1 mF are recommended.
OUTPUT -IN
+VS
AD818
+IN
10k
-VS NULL 1 NULL 8
-VS
VOS ADJUST
Figure 5. Offset Null Configuration
OFFSET NULLING
Figure 4. AD818 Simplified Schematic
THEORY OF OPERATION
The AD818 is a low cost video operational amplifier designed to excel in high performance, high output current video applications. The AD818 (Figure 4) consists of a degenerated NPN differential pair driving matched PNPs in a folded-cascode gain stage. The output buffer stage employs emitter followers in a class AB amplifier that delivers the necessary current to the load, while maintaining low levels of distortion. The AD818 will drive terminated cables and capacitive loads of 10 pF or less. As the closed-loop gain is increased, the AD818 will drive heavier capacitive loads without oscillating.
INPUT CONSIDERATIONS
The input offset voltage of the AD818 is inherently very low. However, if additional nulling is required, the circuit shown in Figure 5 can be used. The null range of the AD818 in this configuration is 10 mV.
SINGLE SUPPLY OPERATION
Another exciting feature of the AD818 is its ability to perform well in a single supply configuration. The AD818 is ideally suited for applications that require low power dissipation and high output current. Referring to Figure 6, careful consideration should be given to the proper selection of component values. The choices for this particular circuit are: R1 + R3 R2 combine with C1 to form a low frequency corner of approximately 10 kHz. C4 was inserted in series with R4 to maintain amplifier stability at high frequency. Combining R3 with C2 forms a low-pass filter with a corner frequency of approximately 500 Hz. This is needed to maintain amplifier PSRR, since the supply is connected to VIN through the input divider. The values for R2 and C2 were chosen to demonstrate the AD818's exceptional output drive capability. In this configuration, the output is centered around 2.5 V. In order to eliminate the static dc current associated with this level, C3 was inserted in series with R L.
VS
An input protection resistor (RIN in TPC 28) is required in circuits where the input to the AD818 will be subjected to transients of continuous overload voltages exceeding the 6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current. For high performance circuits, it is recommended that a "balancing" resistor be used to reduce the offset errors caused by bias current flowing through the input and feedback resistors. The balancing resistor equals the parallel combination of RIN and RF and thus provides a matched impedance at each input terminal. The offset voltage error will then be reduced by more than an order of magnitude.
GROUNDING AND BYPASSING
R3 100 C2 3.3 F
When designing high frequency circuits, some special precautions are in order. Circuits must be built with short interconnect leads. When wiring components, care should be taken to provide a low resistance, low inductance path to ground. Sockets should be avoided, since their increased interlead capacitance can degrade circuit bandwidth. Feedback resistors should be of low enough value (1 kW) to ensure that the time constant formed with the inherent stray capacitance at the amplifier's summing junction will not limit performance. This parasitic capacitance, along with the parallel resistance of RF RIN, forms a pole in the loop transmission, which
R4 1k C4 0.001 F
1k 3.3 F
SELECT C1, R1, R2 FOR DESIRED LOW FREQUENCY CORNER.
0.01 F R1 3.3k C1 0.01 F VIN R2 3.3k VOUT C3 0.1 F RL 150
AD818
Figure 6. Single-Supply Amplifier Configuration
REV. C
-11-
AD818
ERROR AMPLIFIER VERROR OUTPUT 10 ERROR SIGNAL OUTPUT 2 HP2835 2 HP2835 1M 15pF 100 SHORT, DIRECT CONNECTION TO TEKTRONIX TYPE 11402 OSCILLOSCOPE PREAMP INPUT SECTION
AD829
0.47 F 0.01 F -VS +VS 1.9k
0 TO 10V POWER SUPPLY
EI&S DL1A05GM MERCURY RELAY 7, 8
0.01 F NULL ADJUST 1k 100 FALSE SUMMING NODE 500
0.47 F
1k 100 NOTE USE CIRCUIT BOARD WITH GROUND PLANE
TTL LEVEL SIGNAL GENERATOR 50Hz OUTPUT
1, 14
50 COAX CABLE
5pF-18pF 500 50
DEVICE UNDER TEST 10pF SCOPE PROBE CAPACITANCE
AD818
2.2 F 0.01 F
DIGITAL GROUND ANALOG GROUND 2.2 F 0.01 F +VS
TEKTRONIX P6201 FET PROBE TO TEKTRONIX TYPE 11402 OSCILLOSCOPE PREAMP INPUT SECTION
-VS
Figure 7. Settling Time Test Circuit
AD818 SETTLING TIME
A High Performance Video Line Driver
Settling time primarily comprises two regions. The first is the slew time in which the amplifier is overdriven, where the output voltage rate of change is at its maximum. The second is the linear time period required for the amplifier to settle to within a specified percentage of the final value. Measuring the rapid settling time of the AD818 (45 ns to 0.1% and 80 ns to 0.01%--10 V step) requires applying an input pulse with a very fast edge and an extremely flat top. With the AD818 configured in a gain of -1, a clamped false summing junction responds when the output error is within the sum of two diode voltages (approximately 1 V). The signal is then amplified 20 times by a clamped amplifier whose output is connected directly to a sampling oscilloscope.
The buffer circuit shown in Figure 8 will drive a back-terminated 75 W video line to standard video levels (1 V p-p) with 0.1 dB gain flatness to 55 MHz with only 0.05 and 0.01% differential phase and gain at the 3.58 MHz NTSC subcarrier frequency. This level of performance, which meets the requirements for high definition video displays and test equipment, is achieved using only 7 mA quiescent current.
+15V
0.01 F
2.2 F
VIN
RT 75
AD818
RBT 75
75 RT 75
0.01 F
2.2 F
-15V
1k
1k
Figure 8. Video Line Driver
-12-
REV. C
AD818
DIFFERENTIAL LINE RECEIVER A HIGH SPEED, 3-OP AMP IN AMP
The differential receiver circuit of Figure 9 is useful for many applications--from audio to video. It allows extraction of a low level signal in the presence of common-mode noise, as shown in Figure 10.
2pF 1k +5V 0.01 F 2.2 F 1k
The circuit of Figure 11 uses three high speed op amps: two AD818s and an AD817. This high speed circuit lends itself well to CCD imaging and other video speed applications. It has the optional flexibility of both dc and ac trims for common-mode rejection, plus the ability to adjust for minimum settling time.
EACH AMPLIFIER PIN 7 EACH AMPLIFIER 1F 0.1 F
VB
+15V 10 F COMMON
+VS 0.1 F
DIFFERENTIAL INPUT
AD818
10 F
VOUT 2.2 F
OUTPUT
-15V
0.1 F -VS
1F
0.1 F PIN 4 EACH AMPLIFIER
0.01 F -5V 1k VA 2pF 1k
-VIN
A1
AD818
1k
2pF-8pF
SETTLING TIME AC CMR ADJUST
Figure 9. Differential Line Receiver
5pF 2pF RG 5pF
1k 1k
A3
1k
VOUT
AD818
RL 2k
200 V
100 90
10n s
1k
3pF 970
1V
20ns
A2
VA
+VIN
AD818
50 DC CMR ADJUST
BANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN
10 0%
2V
GAIN RG 1k 222 20 CADJ (pF) 2-8 2-8 2-8 SMALL SIGNAL BANDWIDTH 14.7MHz 4.5MHz 960kHz SETTLING TIME TO 0.1% 200ns 370ns 2.5 s THD + NOISE BELOW INPUT LEVEL @ 10kHz 82dB 81dB 71dB
OUTPUT 200m V
3 10 100
Figure 10. Performance of Line Receiver, RL = 150 W, G = +2
Figure 11. High Speed 3-Op Amp In Amp
REV. C
-13-
AD818
OUTLINE DIMENSIONS 8-Lead Plastic Dual In-Line Package [PDIP] (N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53) 0.365 (9.27) 0.355 (9.02)
8 5
1
4
0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14)
0.100 (2.54) BSC 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36)
0.150 (3.81) 0.135 (3.43) 0.120 (3.05)
0.015 (0.38) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC] (R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968) 4.80 (0.1890)
8 5 4
4.00 (0.1574) 3.80 (0.1497)
1
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE
1.75 (0.0688) 1.35 (0.0532) 8 0.25 (0.0098) 0 0.17 (0.0067)
0.50 (0.0196) 0.25 (0.0099)
45
0.51 (0.0201) 0.31 (0.0122)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
-14-
REV. C
AD818 Revision History
Location 5/03--Data Sheet changed from REV. B to REV. C. Page
Renumbered Figures and TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to Figures 9 and 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
REV. C
-15-
-16-
C00872-0-5/03(C)

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