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TB6575FNG
TOSHIBA CMOS Integrated Circuit Silicon Monolithic
TB6575FNG
PWM Sensorless Controller for 3-Phase Full-Wave BLDC Motors
The TB6575FNG provides sensorless commutation and PWM current control for 3-phase full-wave BLDC motors. It controls rotation speed by changing a PWM duty cycle by analog voltage.
Features
* * * * * * * * * * * * * 3-phase full-wave sensorless drive PWM chopper drive PWM duty cycle control by analog input 20-mA current sink capability on PWM output pins Overcurrent protection Forward/reverse rotation Lead angle control (7.5 and 15) Overlap commutation Rotation speed sensing signal DC excitation mode to improve startup characteristic DC excitation time and forced commutation time for startup operation can be changed. Forced commutation frequency can be selected. (fXT/(6 x 216), fXT/(6 x 217), fXT/(6 x 218) ) Output polarity switching (P-channel + N-channel, N-channel + N-channel) Weight: 0.14 g (typ.)
The following conditions apply to solderability: *Solderability 1. Use of Sn-37Pb solder bath *solder bath temperature = 230C *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature = 245C *dipping time = 5 seconds *number of times = once *use of R-type flux
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TB6575FNG
Block Diagram
Duty 19 VDD 21 OS FG_OUT 3 7
VSP 5
Startup time setting
6-bit AD converter
PWM control
13 OUT_UP 15 OUT_VP
SC 2 START 8 IP 9 FST 24 DC excitation control circuit Forced commutation frequency setting Maximum commutation frequency setting Lead angle setting Overcurrent protection 22 OC PWM generator 17 OUT_WP 14 OUT_UN 16 OUT_VN Timing control 18 OUT_WN
FMAX 4
LA 12 CW_CCW 6 SEL_LAP 20
Clock generation 10 XTout 11 XTin 1 GND
Position recognition
23 WAVE
Pin Assignment
GND SC OS FMAX VSP CW_CCW FG_OUT START IP XTout XTin LA
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
FST WAVE OC VDD SEL_LAP Duty OUT_WN OUT_WP OUT_VN OUT_VP OUT_UN OUT_UP
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Pin Description
Pin No. 1 2 Symbol GND SC I/O I Ground pin Connection pin for a capacitor to set a startup commutation time and duty cycle ramp-up time Select the polarity of transistors. High or open : High-side transistor = P-channel (active low) Low-side transistor = N-channel (active low) Low : High-side transistor = N-channel (active low) Low-side transistor = N-channel (active low) The pin has a pull-up resistor. Set an upper limit of the maximum commutation frequency. FMAX =High or Open , Maximum commutation frequency fMX = fXT/ (6 12 FMAX =Low , Maximum commutation frequency fMX = fXT/(6 x 2 ) FMAX =High or Open , Maximum commutation frequency fMX = fXT/ (6 9 FMAX =Low , Maximum commutation frequency fMX = fXT/(6 x 2 ) The pin has a pull-up resistor. 2)
8
Description
3
OS
I
2)
11
4
FMAX
I
5
VSP
I
Duty cycle control input 0 VSP VAD (L): Output off VAD (L) VSP VAD (H): Set the PWM duty cycle according to the analog input. VAD (H) VSP VDD: Duty cycle = 100% (31/32) The pin has a pull-down resistor. Rotation direction input High : Reverse rotation (U W V) Low or open : Forward rotation (U V W) The pin has a pull-down resistor. Rotation speed sensing output The pin is low at startup or upon a detection of a fault. This pin drives three pulses per rotation (3 ppr) based on the back-EMF (electromotive force) sensing. (In the case of 4 pole motor, 6 pulse output per rotation.) DC excitation time setting pins When VSP 1 V (typ.), the START pin goes low to start DC excitation. After the IP pin reaches VDD/2, the TB6575FNG moves from DC excitation to forced commutation mode. Connection pins for a crystal oscillator These pins have a feedback resistor. Lead angle control input LA = Low or open : Lead angle of 7.5 LA = high : Lead angle of 15 The pin has a pull-down resistor. PWM output signal for the high-side (positive-side) transistor driving motor phase U The PWM polarity can be specified by pin 3. PWM output signal for the low-side (negative-side) transistor driving motor phase U This signal is active high. PWM output signal for the high-side (positive-side) transistor driving motor phase V The PWM polarity can be specified by pin 3. PWM output signal for the low-side (negative-side) transistor driving motor phase V This signal is active high. PWM output signal for the high-side (positive-side) transistor driving motor phase W The PWM polarity can be specified by pin 3. PWM output signal for the low-side (negative-side) transistor driving motor phase W This signal is active high. PWM output monitor pin This pin drives PWM output whose duty cycle corresponds to the VSP input. It also reflects the information at the OC pin. Overlap commutation select pin Low: Overlap commutation The pin has a pull-up resistor. High: 120 commutation
6
CW_CCW
I
7
FG_OUT
O
8 9 10 11
START IP XT XTin
O I
12
LA
I
13 14 15 16 17 18
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN
O O O O O O
19
Duty
O
20
SEL_LAP
I
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TB6575FNG
Pin No. 21 22 Symbol VDD OC I/O I 5-V power supply pin Overcurrent detection input The all PWM output signals are stopped when OC 0.5 (V). The pin has a pull-up resistor. Position sensing input 3-phase voltage is applied to this pin. The pin has a pull-up resistor. Forced commutation frequency select pin 16 High or open : Forced commutation frequency fST = fXT/(6 x 2 ) 17 Middle : Forced commutation frequency fST = fXT/(6 x 2 ) 18 Low : Forced commutation frequency fST = fXT/(6 x 2 ) The pin has a pull-up resistor. Description
23
WAVE
I
24
FST
I
Functional Description
1. Sensorless drive
On receiving an analog voltage command input, the rotor is aligned to a known position in DC excitation mode, and then the rotation is started in forced commutation mode by applying a PWM signal to the motor. As the rotor moves, back-EMF is acquired. When a signal indicating the polarity of each of the phase voltages including back-EMF is applied to the position signal input pin, automatic switching occurs from the forced commutation PWM signal to the natural commutation PWM signal (which is generated based on the back-EMF sensing) to drive a BLDC motor in sensorless mode.
2. Startup operation
When the motor is stationary, there is no back-EMF and the motor position is unknown. For this reason, the rotor is aligned to a known position in DC excitation mode and then the rotation is started in forced commutation mode. An external capacitor sets the times that the TB6575FNG stays in DC excitation and forced commutation modes. Those times vary depending on the motor type and motor loading. Thus, they must be adjusted experimentally.
VSP 1.0 (V) VSP (5 pin) VSP
VAD (L) SC (2 pin) START_SP (8 pin) TUP VDD
TUP (typ.) = C1 x VSP/3.8 A (s)
IP (9 pin)
VDD 2
(a) (b)
GND VSP 5 TB6575FNG
(a): DC excitation period : TFIX (typ.) = 0.69 x C1 x R1 (s) (b): Forced commutation period
2 C1 9 R1 C2 8
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The rotor is aligned to a known position in DC excitation mode for period (a), during which the IP pin voltage decreases to half VDD level. The time constant for the period is determined by C and R1. After that, switching
occurs to forced commutation mode represented by (b). The duty cycles for DC excitation and forced commutation modes are determined according to the SC pin voltage. The duty cycle for sensorless mode is determined by the VSP value.
3. Forced commutation frequency
The forced commutation frequency for startup operation is set as follows. The optimal frequency varies depending on the motor type and motor loading. Thus, It must be adjusted experimentally. FST = High or Open : Forced commutation frequency fST = fXT/(6 x 216) FST = Middle : Forced commutation frequency fST = fXT/(6 x 217) FST = Low : Forced commutation frequency fST = fXT/(6 x 218) TFIX * fXT: Crystal oscillator frequency
4. PWM frequency
The PWM frequency is determined by an external oscillator. PWM frequency (fPWM) = fXT/256 * fXT: Crystal oscillator frequency The PWM frequency must be sufficiently high, compared with the electrical frequency of the motor and within the switching performance of the transistors.
OS = High or Open PWM signal driving high-side transistors
PWM signal driving low-side transistors
Motor pin voltage
5. Speed control VSP pin
An analog voltage applied to the VSP pin is converted by the 6-bit AD converter to control the duty cycle Duty cycle of the PWM. 0 VDUTY VAD (L) Duty cycle = 0% VAD (L) VDUTY VAD (H) Figure at the right (1/64 to 63/64) VAD (H) VDUTY VDD Duty cycle = 100% (63/64)
100%
0% VAD (L) 1 V (typ.) VAD (H) 4 V (typ.)
VSP
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TB6575FNG
6. Fault protection
When a signal indicating the following faults is applied to the WAVE pin, the output transistors are disabled. After about one second, the motor is restarted. This operation is repeated as long as a fault is detected. * The maximum commutation frequency is exceeded. * The rotation speed falls below the forced commutation frequency.
VSP = 1 V or higher VSP (Pin5) Output pin ON OFF ON
When the SC pin capacitor = 0.47 F and VSP = 4 V (a): TOFF =
START (Pin8)
=
CSC x (VSP - 1) i
0.47 F x ( 4 - 1) 1.5 A
IP (Pin9) (a) SC (Pin9) 1V Fault detected VSP
= 940 ms (typ.)
7. Motor position detection error
A position detection is synchronized with the PWM signal generated in the IC. Thus, a position detection error relative to the PWM signal frequency may occur. Keep this in mind especially when the TB6575FNG is used for a high-speed motor. A detection is performed on the falling edge of the PWM signal. An error is recognized when the pin voltage exceeds the reference voltage. Detection error time < 1/fp fp: PWM frequency = fXT/256
Output ON Internal PWM signal
fXT: Crystal oscillator frequency
Pin voltage Reference voltage
Pin voltage
Position sensing input
Ideal detection timing
Actual detection timing
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8. Lead angle control
The motor runs with a lead angle of 0 in forced commutation mode at startup. After switching to natural commutation, the lead angle automatically changes to the value set by the LA pin.
Back-EMF PWM signal (1) Lead angle of 0
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN U V W
30
(2) Lead angle of 7.5
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN
22.5
(3) Lead angle of 15
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN
15
*OS = High
9. Overlap commutation
When SEL_LAP = high, the TB6575FNG is configured to allow for 120 commutation. When SEL_LAP = low, it is configured to allow for overlap commutation. In overlap commutation, there is an overlap period during which both the outgoing transistor and incoming transistor are conducting (as shown in the shaded areas). This period varies according to the lead angle.
Back-EMF PWM signal (1) Lead angle of 7.5
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN U V W
(2) Lead angle of 15
OUT_UP OUT_UN OUT_VP OUT_VN OUT_WP OUT_WN
*OS = High
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TB6575FNG
Absolute Maximum Ratings (Ta = 25C)
Characteristics Power supply voltage Input voltage Turn-on signal output current Power dissipation Operating temperature Storage temperature Symbol VDD Vin IOUT PD Topr Tstg Rating 5.5 -0.3~VDD + 0.3 20 780 (Note) -30~105 -55~150 Unit V V mA mW C C
Note: Without a PCB, stand-alone operation
Recommended Operating Conditions (Ta = -30 to 105C)
Characteristics Power supply voltage Input voltage Oscillation frequency Symbol VDD Vin fXT Test Condition Min 4.5 -0.3 2.0 Typ. 5.0 4.0 Max 5.5 VDD + 0.3 8.0 Unit V V MHz
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TB6575FNG
Electrical Characteristics (Ta = 25C, VDD = 5 V)
Characteristics Static power supply current Dynamic power supply current Symbol IDD IDD (opr) IIN-1 (H) Input current IIN-1 (L) IIN-2 (H) IIN-2 (L) VIN-1 (H) VIN-1 (L) Input voltage VIN-2 (H) VIN-2 (M) VIN-2 (L) Input hysteresis voltage VH VO-1 (H) VO-1 (L) VO-2 (H) Output voltage VO-2 (L) VO-3 (H) VO-3 (L) Test Circuit Test Condition VSP = 0 V, XTin = H VSP = 2.5 V, XTin = 4 MHz, Output open VIN = 5 V, OC, WAVE, SEL_LAP FMAX, FST, OS VIN = 0 V, OC, WAVE, SEL_LAP, FMAX, FST, OS VIN = 5 V, CW_CCW, LA, VSP VIN = 0 V, CW_CCW, LA, VSP OC, SEL_LAP, CW_CCW WAVE, LA, FMAX, OS OC, SEL_LAP, CW_CCW WAVE, LA, FMAX, OS FST FST FST WAVE, IOH = -2 mA OUT_UP, OUT_VP, OUT_WP IOL = 20 mA OUT_UP, OUT_VP, OUT_WP IOH = -20 mA OUT_UN, OUT_VN, OUT_WN IOL = 2 mA OUT_UN, OUT_VN, OUT_WN IOH = -0.5 mA FG_OUT IOL = 0.5 mA FG_ OUT VDD = 5.5 V, VOUT = 0 V OUT_UP, OUT_VP, OUT_WP, OUT_UN, OUT_VN, OUT_WN, FG_OUT VDD = 5.5 V, VOUT = 5.5 V OUT_UP, OUT_VP, OUT_WP OUT_UN, OUT_VN, OUT_WN, FG_OUT VSP SC VSP = 4 V, SC pin = 0.47 F OC Min -75 -1 3.5 GND 4 2 GND 4.5 GND 4.5 GND 4.5 GND Typ. 0.7 2 0 -50 50 0 0.45 6 1 75 5 1.5 V 5 3 1 VDD 0.5 VDD V 0.5 VDD 0.5 V A Max Unit mA mA
IL (H) Output leak current IL (L)
0
10 A
0
10
PWM input voltage CSC charge current Fault retry time Overcurrent detection voltage
VAD (L) VAD (H) ISC TOFF VOC

0.8 3.8 2.6 0.46
1.0 4.0 3.8 940 0.5
1.2 V 4.2 5.0 0.54 A ms V
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TB6575FNG
Input Equivalent Circuit
1. VSP pin
VDD
2. SEL_LAP, FMAX, FST, WAVE and OS pins
VDD VDD
100 k
1 k
100 k
Input pin
Startup time setting block
Input pin 1 k
Internal logic
Hysteresis width WAVE : 450 mV (typ.)
3. LA and CW_CCW pins
4. OUT_UP, OUT_UN, OUT_VP, OUT_VN, OUT_WP, OUT_WN and FG_OUT pins
VDD
VDD
1 k Input pin
100 k
Internal logic Internal logic Output pin
5. XTin and XTout pins
VDD VDD
6. OC pin
VDD VDD
100 k
150 XTin pin
150 XTout pin OC pin
5 pF
200 k
Internal logic
0.5 V
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TB6575FNG
Application Circuit Example
Duty 19 Speed command (analog voltage) VSP 5 SC 2 START 8 IP 9 FST 24 FMAX 4 VDD LA 12 CW_CCW 6 SEL_LAP 20 TA75393P Clock generation XTout 10 XTin 11 GND 1 Position recognition WAVE 23 5V 21 VDD 24 OS 7 FG_OUT OUT_UP 13 OUT_VP 15 OUT_WP 17 OUT_UN 14 OUT_VN 16 OUT_WN 18
1
MCU VM
Startup time setting
6-bit AD converter
PWM control
M
VDD 2
Startup commutation frequency setting Maximum commutation frequency setting
Timing setting
Lead angle setting
(*1)
10 k
100 k
Overcurrent protection
OC 22
1 k
22 pF
4-MHz crystal oscillator
Note 1: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins. Note 2: The above application circuit including component values is reference only. Because the values may vary depending on the motor type, the optimal values must be determined experimentally. *1: Connect a resistor, if necessary, to prevent malfunction due to noise.
100 k
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100 k x 3
1-phase excitation control circuit
PWM generator
TB6575FNG
Package Dimensions
Weight: 0.14 g (typ.)
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TB6575FNG
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Timing charts may be simplified for explanatory purposes. The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
2. Equivalent Circuits
3. Timing Charts
4. Application Circuits
5. Test Circuits
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
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