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| TH7110 315/433MHz FSK/FM/ASK Receiver Features ! ! ! ! ! ! ! ! Double superhet architecture for high degree of image rejection FSK for digital data and FM reception for analog signal transmission FM/FSK demodulation either with phase-coincidence or PLL demodulator Low current consumption in active mode and very low standby current Switchable LNA gain for improved dynamic range AFC feature allows wide carrier frequency acceptance range RSSI allows signal strength indication and ASK detection Surface mount package LQFP44 Ordering Information Part No. TH7110 Temperature Range -40 C to 85 C Package LQFP44 Application Examples ! ! ! ! ! General digital and analog 315 MHz or 433 MHz ISM band usage Low-power telemetry Alarm and security systems Keyless car and central locking Pagers Technical Data Overview ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! Input frequency range: 300 MHz to 450 MHz Power supply range: 2.5 V to 5.5 V for double conversion and 2.7 V to 5.5 V for single conversion Temperature range: -40 C to +85 C Operating current: 6.5 mA at low gain and 8.2 mA at high gain mode Standby current: < 100 nA 1) with 40 kHz second IF filter BW (incl. SAW front-end filter loss) Sensitivity: -111 dBm 2) Sensitivity: -104 dBm with 150 kHz second IF filter BW (incl. SAW front-end filter loss) Range of first IF: 10 MHz to 80 MHz Range of second IF: 455 kHz to 21.4 MHz Maximum input level: -10 dBm at ASK and 0 dBm at FSK nd Image rejection: > 65 dB (e.g. with SAW front-end filter and at 10.7 MHz 2 IF) Spurious emission: < -70 dBm Input frequency acceptance: 50 kHz (with AFC option) RSSI range: 70 dB Frequency deviation range: 5 kHz to 120 kHz Maximum data rate: 80 kbit/s NRZ Maximum analog modulation frequency: 15 kHz 1) 2) at 8 kHz FSK deviation, BER = 310 and phase-coincidence demodulation -3 at 50 kHz FSK deviation, BER = 310 and phase-coincidence demodulation -3 TH7110 Data Sheet 3901007110 Page 1 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver General Description The TH7110 receiver IC consists of the following building blocks: " " " " " " " " " PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2 Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2, a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO) Low-noise amplifier (LNA) for high-sensitivity RF signal reception First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1) second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2) IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal Operational amplifier (OA) for data slicing, filtering, ASK detection and automatic-frequency control (AFC) Bias circuitry for bandgap biasing and circuit shutdown With the TH7110 receiver chip, various circuit configurations can be arranged in order to meet a number of different customer requirements. For FM/FSK reception the IF tank used in the phase coincidence demodulator can be constituted either by a ceramic resonator or an LC tank (optionally with varactor to create an AFC circuit). In PLL demodulator configuration, the multiplier MIX3 forms a phase comparator. In ASK configuration, the RSSI signal is feed to an ASK detector, which is constituted by the operational amplifier. The second VCO (VCO2) can be used either as the VCO of a PLL demodulator or as the LO2 source of a second external PLL in a multi-channel system. The following table briefly summarizes the various configurations. Single-conversion configuration FM/FSK FM/FSK FM/FSK FM/FSK ASK ASK RX with RSSI-based demodulation narrow-band RX with ceramic demodulation tank wide-band RX with LC demod. tank and AFC Double-conversion configuration narrow-band RX with ceramic demodulation tank wide-band RX with LC demod. tank and AFC multi-channel RX with ceramic demodulation tank and external channel synthesizer RX with RSSI-based demodulation RX with RSSI-based demodulation and external channel synthesizer extended sensitivity RX with PLL demodulator extended sensitivity RX with PLL demodulator The preferred superheterodyne configuration is double conversion where MIX1 and MIX2 are driven by the internal local oscillator signals LO1 and LO2, respectively. This allows a high degree of image rejection, achieved in conjunction with an RF front-end filter. Efficient RF front-end filtering is realized by using a SAW, ceramic or helix filter in front of the LNA and by adding a LC filter at the LNA output. It is also possible to use the TH7110 in single-conversion configuration. This can be achieved by switching the LO2 input of MIX2 from the on-chip PLL synthesizer to the pin IN_MIX2 by means of an internal switch (done via pin SW_MIX2). Now MIX2 operates as an amplifier for the IF1 signal if an external pull-down resistor at pin IN_MIX2 is added. The same setting of MIX2 can be used for multi-channel applications. In this situation IN_MIX2 must be driven by an external LO2 signal. This signal can be generated by the VCO2, which is mainly a bipolar transistor that can be configured as a varactor-tuned VCO. Furthermore, a second external PLL for channel selection via LO2 tuning is required. This may be arranged by using a PLL synthesizer chip that can be controlled through a 3-wire bus serial interface. The reference signal for the external PLL synthesizer can be directly taken from the crystal-based reference oscillator RO. TH7110 Data Sheet 3901007110 Page 2 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Block Diagram OUTP OUTN OAN OA OUT_OA VCO2 VCO2_B VCC_BIAS VEE_BIAS VREF 30 25 MIX3 IN_DEM 20 VCO2_E OAP 32 27 24 28 26 23 39 31 19 ENRX VCC_PLL VEE_RO 36 21 22 38 35 33 34 18 RSSI 29 IFA VEE_PLL RO 16 17 FBC1 VEE_IF 14 13 IF1N 10 IF1P 9 IF1 VEE_MIX1 8 switch MIX1 LO1 IN_MIX1 6 VCO1 VEE_LNA 5 DIV_8 CAP_MIX1 7 OUT_LNA 4 GAIN_LNA 3 LNA VCC_LNA VEE_LNA IN_LNA VEE_LNAC 2 VEE_VCO1 43 Fig. 1: TH7110 block diagram TH7110 Data Sheet 3901007110 42 Page 3 of 20 40 41 LF2 SW_MIX2 IN_MIX2 VCC_MIX1 11 MIX2 12 LO2 VCC_MIX2 DIV_2 CP OUT_MIX2 IF2 PFD IN_IFA 15 LF1 RO 37 44 OUT_IFA BIAS ENRO 1 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Frequency Planning Frequency planning is straightforward for single-conversion applications because there is only one IF that might be chosen, and then the only possible choice is low-side or high-side injection of the LO1 signal (which is now the one and only LO signal in the receiver). The receiver's double-conversion architecture requires careful frequency planning. Besides the desired RF input signal, there are a number of spurious signals that may cause an undesired response at the output. Among them are the image of the RF signal (that must be suppressed by the RF front-end filter), spurious signals injected to the first IF (IF1) and their images which could be mixed down to the same second IF (IF2) as the desired RF signal (they must be suppressed by the LC filter at IF1 and/or by low-crosstalk design). By configuring the TH7110 for double conversion and using its internal PLL synthesizer with fixed feedback divider ratios of N1 = 8 (DIV_8) and N2 = 2 (DIV_2), four types of down-conversion are possible: low-side injection of LO1 and LO2 (low-low), LO1 low-side and LO2 high-side (low-high), LO1 high-side and LO2 low-side (high-low) or LO1 and LO2 high-side (high-high). The following table summarizes some equations that are useful to calculate the crystal reference frequency (REF), the first IF (IF1) and the VCO1 or first LO frequency (LO1), respectively, for a given RF and second IF (IF2). Injection type REF LO1 IF1 LO2 IF2 high-high (RF - IF2)/14 16*REF LO1 - RF 2*REF LO2 - IF1 low-low (RF - IF2)/18 16*REF RF - LO1 2*REF IF1 - LO2 high-low (RF + IF2)/14 16*REF LO1 - RF 2*REF IF1 - LO2 low-high (RF + IF2)/18 16*REF RF - LO1 2*REF LO2 - IF1 The following table depicts generated, desired, possible images and some undesired signals considering the examples of 315 MHz and 433.6 MHz RF reception at IF2 = 10.7 MHz. Signal type Injection type REF / MHz LO1 / MHz IF1 / MHz LO2 / MHz RF = 315 MHz high-high 21.73571 RF = 315 MHz low-low 16.90556 RF = 315 MHz high-low 23.26429 RF = 315 MHz low-high 18.09444 RF = RF = RF = RF = 433.6 MHz 433.6 MHz 433.6 MHz 433.6 MHz high-high 30.20714 low-low 23.49444 high-low 31.73571 low-high 24.68333 347.77143 270.48889 372.22857 32.77143 43.47143 44.51111 33.81111 57.22857 46.52857 289.51111 483.31429 375.91111 507.77143 394.93333 25.48889 36.18889 49.71429 60.41429 57.68889 46.98889 74.17143 63.47143 38.66667 49.36667 RF image/MHz 380.54286 225.97778 429.45714 IF1 image/MHz 54.17143 23.11111 35.82857 264.02222 533.02857 318.22222 581.94286 356.26667 46.88889 71.11429 36.28889 52.77143 60.06667 The selection of the reference crystal frequency is based on some assumptions. As for example: the first IF and the image frequencies should not be in a radio band where strong interfering signals might occur (because they could represent parasitic receiving signals), the LO1 signal should be in the range of 300 MHz to 430 MHz (because this is the optimum frequency range of the VCO1). Furthermore the first IF should be as high as possible to achieve highest RF image rejection. The columns in bold depict the selected frequency plans to receive at 315 MHz and 433.6 MHz, respectively. TH7110 Data Sheet 3901007110 Page 4 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Pin Definition and Description Pin No. 1 Name VREF I/O Type analog output VREF 1 60k Functional Schematic Description reference voltage output, approx. 1.23V 4 OUT_LNA analog output analog input ground 5k OUT_LNA 4 LNA open-collector output, to be connected to external LC tank that resonates at RF LNA input, approx. 26 single-ended 42 2 IN_LNA VEE_LNAC IN_LNA 42 VEE_LNAC 2 ground of LNA core (cascode) LNA gain control (CMOS input with hysteresis) 3 GAIN_LNA analog input GAIN_LNA 3 400 5 6 VEE_LNA IN_MIX1 ground analog input IN_MIX1 6 13 500A LNA biasing ground MIX1 input, approx. 33 single-ended 13 7 CAP_MIX1 analog I/O CAP_MIX1 7 330 40A connection for MIX1 blocking capacitor 8 9 VEE_MIX1 IF1P ground analog I/O IF1P 9 20p VCC 20p MIX1 ground open-collector output, to be connected to external LC tank that resonates at first IF open-collector output, to be connected to external LC tank that resonates at first IF VEE IF1N 10 10 IF1N analog I/O 2x500A VEE TH7110 Data Sheet 3901007110 Page 5 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Pin No. 11 12 13 Name VCC_MIX1 VCC_MIX2 OUT_MIX2 I/O Type supply supply analog output Functional Schematic Description MIX1 positive supply MIX2 positive supply MIX2 output, approx. 330 output impedance 6.8k OUT_MIX2 13 130 230A 14 15 VEE_IF IN_IFA ground analog input IN_IFA 15 VEE VCC 2.2k 2.2k 200A VEE VCC VCC ground of MIX2, IFA and DEMOD IFA input, approx. 2.2k input impedance FBC1 16 16 FBC1 analog I/O to be connected to external IFA feedback capacitor FBC2 17 FBC2 analog I/O 17 VEE VEE to be connected to external IFA feedback capacitor 18 19 VCC_IF OUT_IFA supply analog I/O OUT_IFA 19 40A positive supply for IFA, DEMOD and VCO2 IFA output and MIX3 input (of DEMOD) 20 IN_DEM analog input IN_DEM 20 DEMOD input, to MIX3 core 47k 21 SW_MIX2 digital input SW_MIX2 21 400 input selection for LO2 input port of MIX2 TH7110 Data Sheet 3901007110 Page 6 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Pin No. 22 Name IN_MIX2 I/O Type analog input Functional Schematic 840 Description external LO2 input port of MIX2, approx. 1k singleended IN_MIX2 22 840 20A 24 VCO2_B analog input VCO2_B 24 VEE VCC VCC VCC 47k VCO2 input, base of a bipolar transistor 23 VCO2_E analog output VCO2 output, emitter of a bipolar transistor VCO2_E 23 VEE 25 26 VCC_BIAS OUT_OA supply analog output OUT_OA 26 50 positive supply of general bias system and OA OA output, 40uA current drive capability 27 OAN analog input 20A OAN 50 50 OAP 28 negative OA input, input voltage limited to approx. 0.7 Vpp between pins OAP and OAN positive OA input, input voltage limited to approx. 0.7 Vpp between pins OAP and OAN RSSI output, for RSSI and ASK detection, approx. 36k output impedance 28 OAP analog input 27 29 RSSI analog output RSSI 29 50 I (Pi) 36k 30 VEE_BIAS ground ground for general bias system and OA TH7110 Data Sheet 3901007110 Page 7 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Pin No. 31 Name OUTP I/O Type analog output analog output ground ground analog input OUTP OUTN 31 32 Functional Schematic Description FSK/FM positive output, output impedance of 100k to 300k 50 32 OUTN 20A 20A FSK/FM negative output, output impedance of 100k to 300k ground of dividers and PFD RO ground RO input, Colpitts type oscillator with internal feedback capacitors 33 34 35 VEE_PLL VEE_RO RO 50k RO 35 30p 30p 36 37 VCC_PLL ENRX supply digital input digital input analog output LF1 38 200 positive supply of RO, DIV, PFD and charge pump ENRX ENRO 37 44 mode control input (CMOS input) 1.5k 44 ENRO mode control input (CMOS input) charge pump output 38 LF1 39 LF2 analog input LF2 39 4p 400 VCO1 control input 40 41 43 VEE_VCO1 VEE_LNA VCC_LNA ground ground supply ground of VCO1 and charge pump ground of LNA biasing positive supply of LNA biasing TH7110 Data Sheet 3901007110 Page 8 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Technical Data Mode Configurations ENRX ENRO Mode 0 0 SBY 0 1 RO only 1 0 ON 1 1 ON Note: ENRX and ENRO are pulled down internally Second Mixer Input IN_MIX2 External LO2 Ext. pull-down res. (15 k) N/C LNA Gain Control VGAIN_LNA < 0.8 V > 1.4 V Mode HIGH GAIN LOW GAIN Description LNA set to high gain by voltage at GAIN_LNA LNA set to low gain by voltage at GAIN_LNA SW_MIX2 0 0 1 Mode double conversion with external LO2 single conversion double conversion with internal LO2 Description standby mode only reference oscillator active entire chip active entire chip active Note: hysteresis between gain modes to ensure stability Absolute Maximum Ratings Parameter Supply voltage Input voltage Input RF level Storage temperature Electrostatic discharge Symbol Vcc VIN Pimax TSTG ESD Condition / Note Min 0 - 0.3 no damage -40 human body model, MIL STD 833D method 3015.7, all pins except OUT_IFA pin OUT_IFA Max 7.0 VCC+0.3 10 +125 Unit V V dBm C -500 -500 +500 +250 V V Normal Operating Conditions Parameter Supply voltage for double conv. Supply voltage for single conv. Operating temperature Input frequency Frequency deviation FSK data rate FM bandwidth ASK data rate Symbol Vcc, DC Vcc, SC Ta fi f RFSK fm RASK Condition Min 2.5 2.7 -40 300 5 Max 5.5 5.5 +85 450 120 40 15 80 Unit V V C MHz kHz kbit/s kHz kbit/s at FM or FSK NRZ NRZ TH7110 Data Sheet 3901007110 Page 9 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver DC Characteristics all parameters under normal operating conditions, unless otherwise stated; typical values at Ta = 23 C and Vcc = 3 V Parameter Standby current Total supply current at low gain Total supply current at high gain Opamp input offset voltage Opamp input offset current Opamp input bias current RSSI voltage at low input level RSSI voltage at high input level Symbol ISBY Icc, low Icc, high Voffs Ioffs Ibias VRSSI, low VRSSI, high Condition ENRX=0 ENRX=1, LNA at LOW GAIN ENRX=1, LNA at HIGH GAIN IOAP - IOAN 0.5 * (IOAP + IOAN) Pi = -65 dBm, LNA at LOW GAIN Pi = -35 dBm, LNA at LOW GAIN Min 5.0 6.5 -20 -50 -100 0.5 1.25 Typ 6.5 8.2 Max 100 8.0 10.0 20 50 100 1.5 2.45 Unit nA mA mA mV nA nA V V 1.0 1.9 AC System Characteristics all parameters under normal operating conditions, unless otherwise stated; all parameters based on test circuits for FSK (Fig. 2), FM (Fig. 4) and ASK (Fig. 5), respectively; typical values at Ta = 23 C and Vcc = 3 V, RF at 433.6 MHz, second IF at 10.7 MHz Parameter Start-up time - fast mode FSK/FM Start-up time - slow mode FSK/FM Start-up time - ASK Symbol Tfast Tslow TASK Condition ENRX from 0 to 1, ENRO = 1, valid data at output ENRX from 0 to 1, ENRO = 0, valid data at output depends on ASK detector time constant and start-up mode, valid data at output BIF2 = 40kHz f = 15kHz (FSK/FM) -3 BER 310 BIF2 = 150kHz f = 50kHz (FSK/FM) -3 BER 310 BIF2 = 40kHz -3 BER 310 BIF2 = 150kHz -3 BER 310 -3 BER 310 LNA at LOW GAIN -3 BER 310 LNA at LOW GAIN Min Typ Max 0.4 Unit ms 0.9 ms R3*C13 + Tfast (or Tslow) -111 ms Input sensitivity - FSK (narrow band) Input sensitivity - FSK (wide band) Pmin, n dBm Pmin, w -104 dBm Input sensitivity - ASK PminA, n (narrow band) Input sensitivity - ASK PminA, w (wide band) Maximum input signal - FSK/FM Pmax, FM Maximum input signal - ASK Spurious emission Image rejection Blocking immunity VCO gain Charge pump current Pmax, ASK Pspur Pimag Pblock KVCO ICP -109 -106 0 -10 -70 dBm dBm dBm dBm dBm dB dB MHz/V A fblock > 2MHz, note 1 65 57 250 60 Notes: 1. desired signal with FSK/FM or ASK modulation, CW blocking signal TH7110 Data Sheet 3901007110 Page 10 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Test Circuits FSK Reception C15 C16 C17 VCC VEE OUT_OA VCO2_B VCO2_E OUTN RSSI OUTP OAN OAP VEE VCC IN_MIX2 VCC XTAL VEE C1 RO CP SW_MIX2 IN_DEM OUT_IFA VCC FBC2 C14 VCC VCC ENRX LF1 C13 VCC CERRES R1 C3 LF2 VEE VEE C12 C10 FBC1 LQFP44 GAIN_LNA CAP_MIX1 C11 IN_IFA VEE C5 L2 SAWFIL IN_LNA VCC OUT_LNA IN_MIX1 VCC VEE ENRO VREF OUT_MIX2 IF1P VEE IF1N VCC VCC CERFIL VEE C8 L3 C7 C6 L4 C9 LCFIL L5 L1 C4 VCC CB* VCC Fig. 2: Test circuit for FSK reception TH7110 Data Sheet 3901007110 Page 11 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver FSK test circuit component list to Fig. 2 Part C1 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 CP C15 C16 C17 R1 L1 L2 L3 L4 L5 XTAL Size 0805 0805 0603 0603 0603 0603 0603 0603 0805 0603 0603 0603 0603 0805 0805 0805 0603 0805 0603 0603 0603 0805 0805 HC49SMD QCC8C Value / Type 15 pF 1 nF 3.3 pF 3.3 pF 4.7 pF 2.2 pF 330 pF 27 pF 33 nF 1 nF 1 nF 1.5 pF 680 pF 10 -12 pF 10 - 47 pF 10 - 47 pF 330 pF 10 k 33 nH 33 nH 15 nH 100 nH 100 nH 23.49444 MHz @ RF = 433.6 MHz B3555 @ RF = 433.6 MHz SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz CDACV10.7MG18-A Tolerance 10% 10% 5% 5% 5% 5% 10% 5% 10% 10% 10% 5% 10% 5% 5% 5% 10% 10% 5% 5% 5% 5% 5% Description crystal series capacitor loop filter capacitor capacitor to match to SAW filter input capacitor to match to SAW filter output LNA output tank capacitor MIX1 input matching capacitor MIX1 blocking capacitor IF1 tank capacitor IFA feedback capacitor IFA feedback capacitor IFA feedback capacitor DEMOD phase-shift capacitor DEMOD coupling capacitor CERRES parallel capacitor demodulator output low-pass capacitor, depending on data rate demodulator output low-pass capacitor, depending on data rate RSSI output low-pass capacitor loop filter resistor inductor to match SAW filter inductor to match SAW filter LNA output tank inductor IF1 tank inductor IF1 tank inductor fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 SAWFIL CERFIL leaded type SMD type 25ppm calibration 30ppm temp. B3dB = 860 kHz low-loss SAW filter from EPCOS 100 kHz (f0 = 433.92 MHz) TBD ceramic filter from Murata 40 kHz CERRES SMD type ceramic demodulator tank from Murata NIP - not in place, may be used optionally TH7110 Data Sheet 3901007110 Page 12 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver FSK Circuit with AFC and Ceramic Resonator Tolerance Compensation C15 C16 R4 R5 VEE C17 C18 C19 VCC R3 OUT_OA VCO2_B VCO2_E RSSI OUTN OAN VEE OUTP VCC OAP IN_MIX2 VCC XTAL VEE C1 RO CP VD SW_MIX2 IN_DEM OUT_IFA VCC FBC2 C14 VCC VCC ENRX LF1 C13 VCC CERRES R1 C3 LF2 VEE VEE C12 C10 FBC1 LQFP44 GAIN_LNA CAP_MIX1 C11 IN_IFA VEE C5 L2 SAWFIL IN_LNA VCC OUT_LNA IN_MIX1 VCC VEE ENRO VREF OUT_MIX2 IF1P VEE IF1N VCC VCC CERFIL VEE C8 L3 C7 C6 L4 C9 LCFIL L5 L1 C4 VCC CB* VCC Fig. 3: Test circuit for FSK with AFC and resonator compensation Circuit Feature ! ! ! ! Improves input frequency acceptance range up to RFnom 50 kHz Eliminates calibration tolerances of ceramic resonator Eliminates temperature tolerances of ceramic resonator Non-inverted and inverted CMOS-compatible outputs TH7110 Data Sheet 3901007110 Page 13 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver FSK test circuit with AFC component list to Fig. 3 Part C1 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 CP C15 C16 C17 C18 C19 0805 Size 0805 0805 0603 0603 0603 0603 0603 0603 0805 0603 0603 0603 0603 0805 0805 0805 0603 Value / Type 15 pF 1 nF 3.3 pF 3.3 pF 4.7 pF 2.2 pF 330 pF 27 pF 33 nF 1 nF 1 nF 1.5 pF 680 pF 27 pF 10 - 47 pF 10 - 47 pF 330 pF 33 nF 33 nF 10 nF 1 nF 10 k 100 k 680 k 680 k 33 nH 33 nH 15 nH 100 nH 100 nH BB535 23.49444 MHz @ RF = 433.6 MHz Tolerance 10% 10% 5% 5% 5% 5% 10% 5% 10% 10% 10% 5% 10% 5% 5% 5% 10% 10% 10% Description crystal series capacitor loop filter capacitor capacitor to match to SAW filter input capacitor to match to SAW filter output LNA output tank capacitor MIX1 input matching capacitor MIX1 blocking capacitor IF1 tank capacitor IFA feedback capacitor IFA feedback capacitor IFA feedback capacitor DEMOD phase-shift capacitor DEMOD coupling capacitor ceramic resonator loading capacitor demodulator output low-pass capacitor, depending on data rate demodulator output low-pass capacitor, depending on data rate RSSI output low-pass capacitor integrator capacitor, fixed integrator capacitor, @ 0.5 to 2 kbit/s NRZ integrator capacitor, @ 2 to 20 kbit/s NRZ integrator capacitor, @ 20 to 40 kbit/s NRZ loop filter resistor varactor diode biasing resistor integrator resistor integrator resistor inductor to match SAW filter inductor to match SAW filter LNA output tank inductor IF1 tank inductor IF1 tank inductor varactor diode from Infineon fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 R1 R3 R4 R5 L1 L2 L3 L4 L5 VD XTAL 0805 0805 0805 0805 0603 0603 0603 0805 0805 SOD-323 HC49SMD 10% 10% 10% 10% 5% 5% 5% 5% 5% 25ppm calibration 30ppm temp. SAWFIL QCC8C B3555 @ RF = 433.6 MHz B3dB = 860 kHz low-loss SAW filter from EPCOS 100 kHz (f0 = 433.92 MHz) TBD 40 kHz CERFIL leaded type SMD type SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz CDACV10.7MG18-A ceramic filter from Murata CERRES SMD type ceramic demodulator tank from Murata NIP - not in place, may be used optionally TH7110 Data Sheet 3901007110 Page 14 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver FM Reception R6 R5 C17 VEE C15 R4 C16 R3 VCC OUT_OA VCO2_B VCO2_E OUTN RSSI OUTP OAN OAP VEE VCC IN_MIX2 VCC XTAL VEE C1 RO CP SW_MIX2 IN_DEM OUT_IFA VCC FBC2 C14 VCC VCC ENRX LF1 C13 VCC CERRES R1 C3 LF2 VEE VEE C12 C10 FBC1 LQFP44 GAIN_LNA CAP_MIX1 C11 IN_IFA VEE C5 L2 SAWFIL IN_LNA VCC OUT_LNA IN_MIX1 VCC VEE ENRO VREF OUT_MIX2 VEE IF1P IF1N VCC VCC CERFIL VEE C8 L3 C7 C6 L4 C9 LCFIL L5 L1 C4 VCC CB* VCC Fig. 4: Test circuit for FM reception TH7110 Data Sheet 3901007110 Page 15 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver FM test circuit component list to Fig. 4 Part C1 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 CP C15 C16 C17 R1 R3 R4 R5 R6 L1 L2 L3 L4 L5 XTAL Size 0805 0805 0603 0603 0603 0603 0603 0603 0805 0603 0603 0603 0603 0805 0805 0805 0603 0805 0805 0805 0805 0805 0603 0603 0603 0603 0603 HC49SMD QCC8C Value / Type 15 pF 1 nF 3.3 pF 3.3 pF 4.7 pF 2.2 pF 330 pF 27 pF 33 nF 1 nF 1 nF 1.5 pF 680 pF 10 - 12 pF 100 pF 100 pF 330 pF 10 k 12 k 6.8 k 33 k 33 k 33 nH 33 nH 15 nH 100 nH 100 nH 23.49444 MHz @ RF = 433.6 MHz B3555 @ RF = 433.6 MHz SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz CDACV10.7MG18-A Tolerance 10% 10% 5% 5% 5% 5% 10% 5% 10% 10% 10% 5% 10% 5% 5% 5% 10% 10% 5% 5% 5% 5% 5% 5% 5% 5% 5% Description crystal series capacitor loop filter capacitor capacitor to match to SAW filter input capacitor to match to SAW filter output LNA output tank capacitor MIX1 input matching capacitor MIX1 blocking capacitor IF1 tank capacitor IFA feedback capacitor IFA feedback capacitor IFA feedback capacitor DEMOD phase-shift capacitor DEMOD coupling capacitor CERRES parallel capacitor sallen-Key low-pass filter capacitor, to set cut-off frequency sallen-Key low-pass filter capacitor, to set cut-off frequency RSSI output low-pass capacitor loop filter resistor sallen-key filter resistor, to set desired filter characteristic sallen-key filter resistor, to set desired filter characteristic sallen-key filter resistor, to set cut-off frequency sallen-key filter resistor, to set cut-off frequency inductor to match SAW filter inductor to match SAW filter LNA output tank inductor IF1 tank inductor IF1 tank inductor fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 SAWFIL CERFIL leaded type SMD type 25ppm calibration 30ppm temp. B3dB = 860 kHz low-loss SAW filter from EPCOS 100 kHz (f0 = 433.92 MHz) TBD ceramic filter from Murata 40 kHz CERRES SMD type ceramic demodulator tank from Murata NIP - not in place, may be used optionally TH7110 Data Sheet 3901007110 Page 16 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver ASK Reception R3 C14 VEE C13 VCC OUT_OA VCO2_B VCO2_E OUTN RSSI OAN VEE OUTP VCC OAP IN_MIX2 VCC XTAL VEE C1 RO SW_MIX2 IN_DEM OUT_IFA VCC FBC2 VCC VCC ENRX LF1 VCC R1 C3 LF2 VEE VEE C12 C10 FBC1 LQFP44 GAIN_LNA CAP_MIX1 C11 IN_IFA VEE C5 L2 SAWFIL IN_LNA VCC OUT_LNA IN_MIX1 VCC VREF VEE OUT_MIX2 IF1P VEE IF1N VCC VCC CERFIL ENRO VEE R4 C4 L3 C7 C6 C8 L4 C9 LCFIL L5 L1 VCC CB* VCC Fig. 5: Test circuit for ASK reception TH7110 Data Sheet 3901007110 Page 17 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver ASK test circuit component list to Fig. 5 Part C1 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 R1 R3 L1 L2 L3 L4 L5 XTAL Size 0805 0805 0603 0603 0603 0603 0603 0805 0805 0603 0603 0805 0603 0805 0603 0603 0603 0603 0603 0603 HC49SMD QCC8C Value / Type 15 pF 1 nF 3.3 pF 3.3 pF 4.7 pF 2.2 pF 330 pF 27 pF 33 nF 1 nF 1 nF 1 nF to 10 nF 330 pF 10 k 100 k 33 nH 33 nH 15 nH 100 nH 100 nH 23.49444 MHz @ RF = 433.6 MHz B3555 @ RF = 433.6 MHz SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz Tolerance 10% 10% 5% 5% 5% 5% 10% 5% 10% 10% 10% 10% 10% 10% 5% 5% 5% 5% 5% 5% Description crystal series capacitor loop filter capacitor capacitor to match to SAW filter input capacitor to match to SAW filter output LNA output tank capacitor MIX1 input matching capacitor MIX1 blocking capacitor IF1 tank capacitor IFA feedback capacitor IFA feedback capacitor IFA feedback capacitor ASK data slicer capacitor, depending on data rate RSSI output low-pass capacitor loop filter resistor ASK data slicer resistor, depending on data rate inductor to match SAW filter inductor to match SAW filter LNA output tank inductor IF1 tank inductor IF1 tank inductor fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 SAWFIL CERFIL leaded type SMD type 25ppm calibration 30ppm temp. B3dB = 860 kHz low-loss SAW filter from EPCOS 100 kHz (f0 = 433.92 MHz) TBD ceramic filter from Murata 40 kHz NIP - not in place, may be used optionally TH7110 Data Sheet 3901007110 Page 18 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Package Dimensions D D1 33 23 34 22 b E E1 e 44 12 1 11 A A2 A1 L Fig. 6: LQFP44 (Low Quad Flat Package) All Dimension in mm, coplanarity < 0.1mm E1, D1 A A1 A2 e b min 0.05 1.35 0.30 10.00 0.8 max 1.60 0.15 1.45 0.45 All Dimension in inch, coplanarity < 0.004" min 0.002 0.053 0.012 0.394 0.031 max 0.630 0.006 0.057 0.018 L 0.45 0.75 0.018 E, D 12.00 0 7 0 0.472 0.030 7 TH7110 Data Sheet 3901007110 Page 19 of 20 Nov. 2001 Rev. 005 TH7110 315/433MHz FSK/FM/ASK Receiver Your Notes Important Notice Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis' rendering of technical or other services. (c) 2000 Melexis GmbH. All rights reserved. For the latest version of this document. Go to our website at www.melexis.com Or for additional information contact Melexis Direct: Europe and Japan: Phone: +32 1361 1631 E-mail: sales_europe@melexis.com All other locations: Phone: +1 603 223 2362 E-mail: sales_usa@melexis.com QS9000, VDA6.1 and ISO14001 Certified TH7110 Data Sheet 3901007110 Page 20 of 20 Nov. 2001 Rev. 005 |
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