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PD - 95954
IRL3202SPbF
Advanced Process Technology Surface Mount l Optimized for 4.5V-7.0V Gate Drive l Ideal for CPU Core DC-DC Converters l Fast Switching l Lead-Free Description
l l
HEXFET(R) Power MOSFET
D
VDSS = 20V RDS(on) = 0.016
G S
These HEXFET Power MOSFETs were designed specifically to meet the demands of CPU core DC-DC converters in the PC environment. Advanced processing techniques combined with an optimized gate oxide design results in a die sized specifically to offer maximum efficiency at minimum cost. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.
ID = 48A
D 2 Pak
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C V GS VGSM EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Gate-to-Source Voltage (Start Up Transient, tp = 100s) Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
48 30 190 69 0.56 10 14 270 29 6.9 5.0 -55 to + 150 300 (1.6mm from case )
Units
A W W/C V V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.

Max.
1.8 40
Units
C/W
12/21/04
IRL3202SPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 20 0.70 28 Max. Units Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA 0.019 VGS = 4.5V, ID = 29A 0.016 VGS = 7.0V, ID = 29A V VDS = VGS , ID = 250A S VDS = 16V, ID = 29A 25 VDS = 20V, VGS = 0V A 250 VDS = 10V, V GS = 0V, TJ = 150C 100 VGS = 10V nA -100 VGS = -10V 43 ID = 29A 12 nC VDS = 16V 13 VGS = 4.5V, See Fig. 6 VDD = 10V ID = 29A ns RG = 9.5, VGS = 4.5V RD = 0.3, Between lead, nH 7.5 and center of die contact 2000 VGS = 0V 800 pF VDS = 15V 290 = 1.0MHz, See Fig. 5 Typ. 0.029 9.8 100 63 82
Source-Drain Ratings and Characteristics
IS
I SM
V SD t rr Q rr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 48 showing the A G integral reverse 190 S p-n junction diode. 1.3 V TJ = 25C, IS = 29A, VGS = 0V 68 100 ns TJ = 25C, IF = 29A 130 190 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature.
ISD 29A, di/dt 63A/s, VDD V(BR)DSS,
TJ 150C
Starting TJ = 25C, L = 0.64mH
R G = 25, IAS = 29A.
Pulse width 300s; duty cycle 2%.
Uses IRL3202 data and test conditions
** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994.
IRL3202SPbF
1000
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V BOTTOM 2.00V BOTTOM 1.75V TOP
1000
I D , Drain-to-Source Current (A)
100
10
I D , Drain-to-Source Current (A)
100
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V BOTTOM 2.00V BOTTOM 1.75V TOP
10
2.0V
2.0V
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
TJ = 25 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 48A
I D , Drain-to-Source Current (A)
1.5
100
TJ = 150 C
1.0
10
0.5
1
V DS = 15V 20s PULSE WIDTH 2 3 4 5
0.0 -60 -40 -20
VGS = 4.5V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRL3202SPbF
3500 3000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = 29A VDS = 16V
12
C, Capacitance (pF)
2500
Ciss
2000 1500
9
Coss
1000 500 0
6
Crss
1 10 100
3
0
0
10
20
30
40
50
60
70
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
100
I D , Drain Current (A)
TJ = 150 C
100
100us
10
TJ = 25 C
1ms 10 10ms
1 0.2
V GS = 0 V
0.8 1.4 2.0 2.6
1
TC = 25 C TJ = 150 C Single Pulse
1 10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRL3202SPbF
50
600
EAS , Single Pulse Avalanche Energy (mJ)
TOP
500
40
BOTTOM
ID 13A 18A 29A
ID , Drain Current (A)
400
30
300
20
200
10
100
0
25
50
75
100
125
150
0
TC , Case Temperature ( C)
25
Starting TJ , Junction Temperature ( C)
50
75
100
125
150
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Maximum Avalanche Energy Vs. Drain Current
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRL3202SPbF
R DS (on), Drain-to-Source On Resistance( )
RDS(on), Drain-to-Source On Resistance ( )
0.018
0.025
0.016
VGS = 4.5V
0.020
0.014
VGS = 7.0V
0.012
0.015
ID = 48A
0.010
0
10
20
30
40
50
60
0.010 0.0 2.0 4.0 6.0 8.0
A
I D , Drain Current (A)
V GS , Gate-to-Source Voltage (V)
Fig 12. On-Resistance Vs. Drain Current
Fig 13. On-Resistance Vs. Gate Voltage
IRL3202SPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T H IS IS AN IR F 530S WIT H LOT CODE 8024 AS S E MB L E D ON WW 02, 2000 IN T H E AS S E MB L Y L INE "L " Note: "P" in as s embly line pos ition indicates "Lead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB LY LOT CODE P AR T NU MB E R F 530S DAT E CODE YE AR 0 = 2000 WE E K 02 L INE L
OR
INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R F 530S DAT E CODE P = DE S IGNAT E S L E AD-F R E E PR ODU CT (OPT IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E CODE
IRL3202SPbF
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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