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| a FEATURES Superior Performance High Unity Gain BW: 50 MHz Low Supply Current: 5.3 mA High Slew Rate: 300 V/ s Excellent Video Specifications 0.04% Differential Gain (NTSC and PAL) 0.19 Differential Phase (NTSC and PAL) Drives Any Capacitive Load Fast Settling Time to 0.1% (10 V Step): 65 ns Excellent DC Performance High Open-Loop Gain 5.5 V/mV (RLOAD = 1 k ) Low Input Offset Voltage: 0.5 mV Specified for 5 V and 15 V Operation Available in a Wide Variety of Options Plastic DIP and SOIC Packages Cerdip Package Die Form MIL-STD-883B Processing Tape & Reel (EIA-481A Standard) Dual Version Available: AD827 (8 Lead) Enhanced Replacement for LM6361 Replacement for HA2544, HA2520/2/5 and EL2020 APPLICATIONS Video Instrumentation Imaging Equipment Copiers, Fax, Scanners, Cameras High Speed Cable Driver High Speed DAC and Flash ADC Buffers High Speed, Low Power Monolithic Op Amp AD847 CONNECTION DIAGRAM Plastic DIP (N), Small Outline (R) and Cerdip (Q) Packages specifications which include an open-loop gain of 3500 V/V (500 load) and low input offset voltage of 0.5 mV. Commonmode rejection is a minimum of 78 dB. Output voltage swing is 3 V into loads as low as 150 . Analog Devices also offers over 30 other high speed amplifiers from the low noise AD829 (1.7 nV/Hz) to the ultimate video amplifier, the AD811, which features 0.01% differential gain and 0.01 differential phase. APPLICATION HIGHLIGHTS 1. As a buffer the AD847 offers a full-power bandwidth of 12.7 MHz (5 V p-p with 5 V supplies) making it outstanding as an input buffer for flash A/D converters. 2. The low power and small outline package of the AD847 make it very well suited for high density applications such as multiple pole active filters. 3. The AD847 is internally compensated for unity gain operation and remains stable when driving any capacitive load. PRODUCT DESCRIPTION The AD847 represents a breakthrough in high speed amplifiers offering superior ac & dc performance and low power, all at low cost. The excellent dc performance is demonstrated by its 5 V 6 QUIESCENT CURRENT - mA 5.5 5 4.5 4 0 5 10 15 SUPPLY VOLTAGE - Volts 20 Quiescent Current vs. Supply Voltage AD847 Driving Capacitive Loads REV. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 AD847-SPECIFICATIONS (@ T = +25 C, unless otherwise noted) A Model Conditions INPUT OFFSET VOLTAGE1 TMIN to TMAX Offset Drift INPUT BIAS CURRENT TMIN to TMAX INPUT OFFSET CURRENT TMIN to TMAX Offset Current Drift OPEN-LOOP GAIN VOUT = 2.5 V RLOAD = 500 TMIN to TMAX RLOAD = 150 VOUT = 10 V RLOAD = 1 k TMIN to TMAX 5 V 2 1 15 V 3 1.5 5 V 15 V VOUT = 5 V p-p RLOAD = 500 , VOUT = 20 V p-p, RLOAD = 1 k RLOAD = 1 k -2.5 V to +2.5 V 10 V Step, AV = -1 -2.5 V to +2.5 V 10 V Step, AV = -1 CLOAD = 10 pF RLOAD= 1 k f 4.4 MHz, RLOAD = 1 k f 4.4 MHz, RLOAD = 1 k VCM = 2.5 V VCM = 12 V TMIN to TMAX VS = 5 V to 15 V TMIN to TMAX f = 10 kHz f = 10 kHz 15 V 15 V 5 V 15 V OUTPUT VOLTAGE SWING RLOAD = 500 RLOAD = 150 RLOAD = 1 k RLOAD = 500 5 V 5 V 15 V 15 V 15 V 3.0 2.5 12 10 5 V 15 V 5 V 15 V 5 V 15 V 5 V 15 V 15 V 15 V 15 V 5 V 15 V 78 78 75 75 72 5 V, 15 V 5 V, 15 V VS 5 V Min AD847J Typ 0.5 15 3.3 50 0.3 3.5 1.6 5.5 Max 1 3.5 6.6 7.2 300 400 Min AD847AR Typ Max 0.5 1 4 15 3.3 50 0.3 6.6 10 300 500 Units mV mV V/C A A nA nA nA/C V/mV V/mV V/mV V/mV V/mV MHz MHz MHz MHz V/s V/s ns ns ns ns Degree % Degree dB dB dB dB dB nV/Hz pA/Hz V V V V V V V V mA k pF 2 1 3.5 1.6 3 1.5 5.5 DYNAMIC PERFORMANCE Unity Gain Bandwidth Full Power Bandwidth 2 35 50 12.7 4.7 200 300 65 65 140 120 50 0.04 0.19 95 95 86 15 1.5 +4.3 -3.4 +14.3 -13.4 3.6 3 3.0 2.5 12 10 78 78 75 75 72 35 50 12.7 4.7 200 300 65 65 140 120 50 0.04 0.19 95 95 86 15 1.5 +4.3 -3.4 +14.3 -13.4 3.6 3 Slew Rate3 Settling Time to 0.1%, RLOAD = 250 to 0.01%, RLOAD = 250 Phase Margin Differential Gain Differential Phase COMMON-MODE REJECTION 225 225 POWER SUPPLY REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE Short-Circuit Current INPUT RESISTANCE INPUT CAPACITANCE OUTPUT RESISTANCE POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX TMIN to TMAX NOTES l 32 300 1.5 32 300 1.5 15 18 6.0 7.3 6.3 7.6 4.5 4.8 5.3 18 6.0 7.3 6.3 7.6 Open Loop 4.5 15 5 V 15 V 4.8 5.3 V mA mA mA mA Input Offset Voltage Specifications are guaranteed after 5 minutes at T A = +25C. Full Power Bandwidth = Slew Rate/2 VPEAK. 3 Slew Rate is measured on rising edge. All min and max specifications are guaranteed. Specifications in boldface are 100% tested at final electrical test. Specifications subject to change without notice. 2 -2- REV. F AD847 Model Conditions INPUT OFFSET VOLTAGE1 TMIN to TMAX Offset Drift INPUT BIAS CURRENT TMIN to TMAX INPUT OFFSET CURRENT TMIN to TMAX Offset Current Drift OPEN-LOOP GAIN VOUT = 2.5 V RLOAD = 500 TMIN to TMAX RLOAD = 150 VOUT = = 10 V RLOAD = 1 k TMIN to TMAX 5 V 2 1 15 V 3 1.5 5 V 15 V VOUT = 5 V p-p RLOAD = 500 , VOUT = 20 V p-p, RLOAD = 1 k RLOAD = 1 k -2.5 V to +2.5 V 10 V Step, AV = -1 -2.5 V to +2.5 V 10 V Step, AV = -1 CLOAD = 10 pF RLOAD= 1 k f 4.4 MHz, RLOAD = 1 k f 4.4 MHz, RLOAD = 1 k VCM = 2.5 V VCM = 12 V TMIN to TMAX VS = 5 V to 15 V TMIN to TMAX f = 10 kHz f = 10 kHz 15 V 15 V 5 V 15 V OUTPUT VOLTAGE SWING RLOAD = 500 RLOAD = 150 RLOAD = 1 k RLOAD = 500 5 V 5 V 15 V 15 V 15 V 3.0 2.5 12 10 5 V 15 V 5 V 15 V 5 V 15 V 5 V 15 V 15 V 15 V 15 V 5 V 15 V 80 80 75 75 72 3.5 1.6 5.5 3 1.5 2 1 3.5 1.6 5.5 V/mV V/mV V/mV V/mV V/mV MHz MHz MHz MHz V/s V/s ns ns ns ns Degree % Degree dB dB dB dB dB nV/Hz pA/Hz V V V V V V V V mA k pF 18 5.7 7.8 6.3 8.4 V mA mA mA mA 0.3 5 V, 15 V 50 5 V, 15 V VS 5 V Min AD847AQ Typ Max 0.5 1 4 15 3.3 5 7.5 300 400 Min AD847S Typ 0.5 15 3.3 50 0.3 5 7.5 300 400 Max 1 4 Units mV mV V/C A A nA nA nA/C DYNAMIC PERFORMANCE Unity Gain Bandwidth Full Power Bandwidth2 35 50 12.7 4.7 200 300 65 65 140 120 50 0.04 0.19 95 95 86 15 1.5 +4.3 -3.4 +14.3 -13.4 3.6 3 3.0 2.5 12 10 80 80 75 75 72 35 50 12.7 4.7 200 300 65 65 140 120 50 0.04 0.19 95 95 86 15 1.5 +4.3 -3.4 +14.3 -13.4 3.6 3 Slew Rate3 Settling Time to 0.1%, RLOAD = 250 to 0.01%, RLOAD = 250 Phase Margin Differential Gain Differential Phase COMMON-MODE REJECTION 225 225 POWER SUPPLY REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE Short-Circuit Current INPUT RESISTANCE INPUT CAPACITANCE OUTPUT RESISTANCE POWER SUPPLY Operating Range Quiescent Current TMIN to TMAX TMIN to TMAX Open Loop 32 300 1.5 15 4.5 4.8 5.3 18 5.7 7.0 6.3 7.6 4.5 32 300 1.5 15 5 V 15 V 4.8 5.3 REV. F -3- AD847 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Watts Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 Watts Cerdip (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Watts Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V Storage Temperature Range (Q) . . . . . . . . . -65C to +150C (N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 175C Lead Temperature Range (Soldering 60 sec) . . . . . . . +300C NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Mini-DIP Package: JA = 100C/Watt; JC = 33C/Watt Cerdip Package: JA = 110C/Watt; JC = 30C/Watt Small Outline Package: JA = 155C/Watt; JC = 33C/Watt ABSOLUTE MAXIMUM RATINGS 1 ESD SUSCEPTIBILITY ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD847 features proprietary ESD protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality. METALIZATION PHOTOGRAPH Contact factory for latest dimensions. Dimensions shown in inches and (mm). ORDERING GUIDE Models* AD847JN AD847JR AD847AQ AD847AR AD847SQ AD847SQ/883B 5962-8964701PA Temperature Range - C 0 to +70 0 to +70 -40 to +85 -40 to +85 -55 to +125 -55 to +125 -55 to +125 Package Description Plastic SOIC Cerdip SOIC Cerdip Cerdip Cerdip Package Option N-8 R-8 Q-8 R-8 Q-8 Q-8 Q-8 *AD847 also available in J and S grade chips, and AD847JR and AD847AR are available *in tape and reel. -4- REV. F AD847 Typical Characteristics (@ +25 C and V = S 20 15 V, unless otherwise noted) 20 INPUT COMMON-MODE RANGE - Volts OUTPUT VOLTAGE SWING - Volts 15 +VIN 10 -VIN 5 15 +VOUT 10 -VOUT 5 R LOAD = 500 0 0 5 10 SUPPLY VOLTAGE - Volts 15 20 0 0 5 10 SUPPLY VOLTAGE - Volts 15 20 Figure 1. Input Common-Mode Range vs. Supply Voltage Figure 2. Output Voltage Swing vs. Supply Voltage 30 OUTPUT VOLTAGE SWING - Volts p-p 6 25 QUIESCENT CURRENT - mA 10k 5.5 20 15 V SUPPLIES 15 5 10 5V SUPPLIES 4.5 5 0 10 100 1k LOAD RESISTANCE - 4 0 5 10 SUPPLY VOLTAGE - Volts 15 20 Figure 3. Output Voltage Swing vs. Load Resistance Figure 4. Quiescent Current vs. Supply Voltage 5 100 INPUT BIAS CURRENT - A 4 VS = 5V OUTPUT IMPEDANCE - 10 1 3 0.1 2 -60 0.01 -40 -20 0 20 40 60 80 100 120 140 10k 100k 1M FREQUENCY - Hz 10M 100M TEMPERATURE - C Figure 5. Input Bias Current vs. Temperature Figure 6. Output Impedance vs. Frequency REV. F -5- AD847-Typical Characteristics (@ +25 C and V = S 7 15 V, unless otherwise noted) 35 SHORT CIRCUIT CURRENT LIMIT - mA QUIESCENT CURRENT - mA 6 30 5 25 4 VS = 5V 20 3 -60 -40 -20 0 20 40 60 80 100 120 140 15 -60 -40 -20 TEMPERATURE - C 0 20 40 60 80 100 AMBIENT TEMPERATURE - C 120 140 Figure 7. Quiescent Current vs. Temperature Figure 8. Short-Circuit Current Limit vs. Temperature 52 100 +100 UNITY - GAIN BANDWIDTH - MHz 80 51 OPEN -LOOP GAIN - dB 60 5V SUPPLIES 500 LOAD 15V SUPPLIES 1k LOAD +80 PHASE MARGIN - DEGREES +60 50 40 +40 20 +20 49 0 0 48 -60 -20 -40 -20 0 20 40 60 80 100 120 140 100 1k TEMPERATURE - C 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 9. Gain Bandwidth Product vs. Temperature Figure 10. Open-Loop Gain and Phase Margin vs. Frequency 80 VS = 15V 100 POWER SUPPLY REJECTION - dB 75 +SUPPLY 80 OPEN-LOOP GAIN - dB 70 VS = 5V 65 60 -SUPPLY 40 60 55 20 50 10 100 1k 10k LOAD RESISTANCE - 0 1k 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 11. Open-Loop Gain vs. Load Resistance Figure 12. Power Supply Rejection vs. Frequency -6- REV. F AD847 100 30 80 VCM = 1V p-p OUTPUT VOLTAGE - Volts p-p 25 20 RL = 1k 15 CMR - dB 60 40 10 20 5 0 1k 10k 100k 1M 10M 100M FREQUENCY - Hz 0 1M 10M INPUT FREQUENCY - Hz 100M Figure 13. Common-Mode Rejection vs. Frequency Figure 14. Large Signal Frequency Response 10 8 OUTPUT SWING FROM 0 TO V -70 6 4 2 0 -2 -4 -6 -8 -10 0 20 40 60 80 100 120 140 160 SETTLING TIME - ns 1% 0.1% 1% 0.1% HARMONIC DISTORTION - dB -80 3V RMS R L=1k -90 2ND HARMONIC -100 -110 3RD HARMONIC -120 -130 100 1k 10k FREQUENCY - Hz 100k Figure 15. Output Swing and Error vs. Settling Time Figure 16. Harmonic Distortion vs. Frequency 50 450 Hz 40 400 INPUT VOLTAGE NOISE - nV/ SLEW RATE - V/s 350 30 300 20 250 10 200 0 10 100 1k 10k 100k 1M 10M FREQUENCY - Hz 150 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE - C Figure 17. Input Voltage Noise Spectral Density Figure 18. Slew Rate vs. Temperature REV. F -7- AD847 Figure 19. Inverting Amplifier Configuration Figure 19a. Inverter Large Signal Pulse Response Figure 19b. Inverter Small Signal Pulse Response Figure 20. Noninverting Amplifier Configuration Figure 20a. Noninverting Large Signal Pulse Response Figure 20b. Noninverting Small Signal Pulse Response -8- REV. F AD847 OFFSET NULLING +VS The input offset voltage of the AD847 is very low for a high speed op amp, but if additional nulling is required, the circuit shown in Figure 21 can be used. CF OUTPUT -IN +IN Figure 21. Offset Nulling NULL 1 NULL 8 -VS INPUT CONSIDERATIONS An input resistor (RIN in Figure 20) is required in circuits where the input to the AD847 will be subjected to transient or continuous overload voltages exceeding the 6 V maximum differential limit. This resistor provides protection for the input transistors by limiting the maximum current that can be forced into their bases. For high performance circuits it is recommended that a resistor (RB in Figures 19 and 20) be used to reduce bias current errors by matching the impedance at each input. The offset voltage error will be reduced by more than an order of magnitude. THEORY OF OPERATION Figure 22. AD847 Simplified Schematic GROUNDING AND BYPASSING In designing practical circuits with the AD847, the user must remember that whenever high frequencies are involved, some special precautions are in order. Circuits must be built with short interconnect leads. A large ground plane should be used whenever possible to provide a low resistance, low inductance circuit path, as well as minimizing the effects of high frequency coupling. Sockets should be avoided because the increased interlead capacitance can degrade bandwidth. Feedback resistors should be of low enough value to assure that the time constant formed with the capacitance at the amplifier summing junction will not limit the amplifier performance. Resistor values of less than 5 k are recommended. If a larger resistor must be used, a small (<10 pF) feedback capacitor in parallel with the feedback resistor, RF, may be used to compensate for the input capacitances and optimize the dynamic performance of the amplifier. Power supply leads should be bypassed to ground as close as possible to the amplifier pins. Ceramic disc capacitors of 0.1 F are recommended. The AD847 is fabricated on Analog Devices' proprietary complementary bipolar (CB) process which enables the construction of pnp and npn transistors with similar fTs in the 600 MHz to 800 MHz region. The AD847 circuit (Figure 22) includes an npn input stage followed by fast pnps in the folded cascode intermediate gain stage. The CB pnps are also used in the current amplifying output stage. The internal compensation capacitance that makes the AD847 unity gain stable is provided by the junction capacitances of transistors in the gain stage. The capacitor, CF, in the output stage mitigates the effect of capacitive loads. At low frequencies and with low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case CF is bootstrapped and does not contribute to the compensation capacitance of the part. As the capacitive load is increased, a pole is formed with the output impedance of the output stage. This reduces the gain, and therefore, CF is incompletely bootstrapped. Some fraction of CF contributes to the compensation capacitance, and the unity gain bandwidth falls. As the load capacitance is increased, the bandwidth continues to fall, and the amplifier remains stable. REV. F -9- AD847 VIDEO LINE DRIVER The AD847 functions very well as a low cost, high speed line driver for either terminated or unterminated cables. Figure 23 shows the AD847 driving a doubly terminated cable in a follower configuration. The termination resistor, RT, (when equal to the cable's characteristic impedance) minimizes reflections from the far end of the cable. While operating from 5 V supplies, the AD847 maintains a typical slew rate of 200 V/s, which means it can drive a 1 V, 30 MHz signal into a terminated cable. +VS 75 COAX VIN 75 AD847 R BT 75 0.1 F -VS 500 RT 75 R IN 100 0.1 F Figure 24 shows the AD847 driving 100 pF and 1000 pF loads. 75 COAX VOUT Figure 24. AD847 Driving Capacitive Loads FLASH ADC INPUT BUFFER The 35 MHz unity gain bandwidth of the AD847 makes it an excellent choice for buffering the input of high speed flash A/D converters, such as the AD9048. Figure 25 shows the AD847 as a unity inverter for the input to the AD9048. C C 500 0.1 SEE TABLE I AD589 10k -5.2V 2k Figure 23. Video Line Driver Table I. Video Line Driver Performance Chart 100 0.1 27 2N3906 VIN* 0 dB or 500 mV Step 0 dB or 500 mV Step 0 dB or 500 mV Step 0 dB or 500 mV Step 0 dB or 500 mV Step 0 dB or 500 mV Step VSUPPLY 15 15 15 5 5 5 CC 20 pF 15 pF 0 pF 20 pF 15 pF 0 pF Over-3 dB BW shoot 23 MHz 21 MHz 13 MHz 18 MHz 16 MHz 11 MHz 4% 0% 0% 2% 0% 0% ANALOG INPUT (0V TO +2V) 1.5k AD741 1k 1.5k 1k 5 0.1F RB RT D1 (MSB) 43 50 AD847 VIN AD9048 TTL CONVERT SIGNAL CONVERT VEE 0.1F VCC 0.1F D8 (LSB) *-3 dB bandwidth numbers are for the 0 dBm signal input. Overshoot numbers are the percent overshoot of the 1 volt step input. A back-termination resistor (RBT, also equal to the characteristic impedance of the cable) may be placed between the AD847 output and the cable input, in order to damp any reflected signals caused by a mismatch between RT and the cable's characteristic impedance. This will result in a flatter frequency response, although this requires that the op amp supply 2 V to the output in order to achieve a 1 V swing at resistor RT. -5.2V +5.0V Figure 25. Flash ADC Input Buffer -10- REV. F AD847 A High Speed, Three Op-Amp In-Amp The circuit of Figure 26 lends itself well to CCD imaging and other video speed applications. It uses two high speed CB process op-amps: Amplifier A3, the output amplifier, is an AD847. The input amplifier (A1 and A2) is an AD827, which is a dual version of the AD847. This circuit has the optional flexibility of both dc and ac trims for common-mode rejection, plus the ability to adjust for minimum settling time. EACH AMPLIFIER +15V 10F COMM 10F -15V 0.1F 0.1F +VS 1F 0.1F PIN 7 AD847, PIN 8 AD827 1F -VS 0.1F PIN 4 AD847 & AD827 1/2 AD827 -VIN 3 2-8pF SETTLING TIME AC CMR ADJUST A1 2 1k 1 2k 2k 2 VOUT INPUT FREQUENCY 100Hz 1kHz 10kHz 100kHz 1MHz RL 2k CMRR 88.3dB 87.4dB 86.2dB 67.4dB 47.1dB RG 1k 2k A3 3 6 AD847 5pF 1.87k 6 A2 +VIN 5 7 1/2 AD827 DC CMR ADJUST 200 CIRCUIT GAIN = 2000 +1 RG BANDWIDTH, SETTLING TIME AND TOTAL HARMONIC DISTORTION VS. GAIN SMALL CADJ SIGNAL (pF) BANDWIDTH 2-8 2-8 2-8 2-8 16.1MHz 14.7MHz 4.5MHz 660kHz GAIN R G 1 2 10 100 OPEN 2k 226 20 SETTLING TIME TO 0.1% 200ns 200ns 370ns 2.5s THD + NOISE BELOW INPUT LEVEL @ 10kHz 82dB 82dB 81dB 71dB Figure 26. A High Speed In-Amp Circuit for Data Acquisition REV. F -11- AD847 HIGH SPEED DAC BUFFER The wide bandwidth and fast settling time of the AD847 makes it a very good output buffer for high speed current-output D/A converters like the AD668. As shown in Figure 27, the op amp establishes a summing node at ground for the DAC output. The output voltage is determined by the amplifier's feedback resistor +15V (10.24 V for a 1 k resistor). Note that since the DAC generates a positive current to ground, the voltage at the amplifier output will be negative. A 100 series resistor between the noninverting amplifier input and ground minimizes the offset effects of op amp input bias currents. C1191f-10-9/92 ANALOG OUTPUT ANALOG SUPPLY GROUND 0.1F 10F -15V 100pF +5V 1k 10F TO ANALOG GROUND PLANE 0.1F 1 2 3 4 5 DIGITAL INPUTS MSB VCC 24 REFCOM 23 REFIN1 22 REFIN2 21 - 1V NOMINAL + REFERENCE INPUT 10k 1k AD668 6 7 8 9 10 11 12 LSB I OUT 20 R LOAD 19 ACOM 18 LCOM 17 IBPO 16 VEE 15 100 AD847 ANALOG GROUND PLANE THCOM 14 VTH 13 Figure 27. High Speed DAC Buffer OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Mini-DIP (N-8) Package Cerdip (Q-8) Package 0.005 (0.13) MIN 0.055 (1.40) MAX Small Outline (R-8) Package 0.150 (3.81) 8 PIN 1 1 0.39 (9.91) MAX 5 0.25 (6.35) 4 0.31 (7.87) PIN 1 1 4 8 5 0.310 (7.87) 0.220 (5.59) 8 0.244 (6.20) 0.228 (5.79) PIN 1 1 5 0.157 (3.99) 0.150 (3.81) 4 0.1650.01 (4.190.25) 0.125 (3.18) MIN 0.0180.003 (0.460.08) 0.10 (2.54) BSC 0.30 (7.62) REF 0.033 (0.84) NOM 0.0350.01 (0.890.25) 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.405 (10.29) MAX 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.010 (0.25) 0.004 (0.10) 0.050 (1.27) BSC SEATING PLANE 0.023 (0.58) 0.014 (0.36) 0.100 0.070 (1.78) (2.54) 0.030 (0.76) BSC SEATING PLANE 0.019 (0.48) 0.014 (0.36) 0.320 (8.13) 0.290 (7.37) 0.020 (0.051) x 45 CHAMF 0.190 (4.82) 0.170 (4.32) 8 0 10 0 0.098 (0.2482) 0.075 (0.1905) 0.090 (2.29) 0.0110.003 (0.280.08) 15 0 0.015 (0.38) 0.008 (0.20) 15 0 0.030 (0.76) 0.018 (0.46) All brand or product names mentioned are trademarks or registered trademarks of their respective holders. -12- REV. F PRINTED IN U.S.A. 0.180.03 (4.570.76) 0.197 (5.01) 0.189 (4.80) 0.102 (2.59) 0.094 (2.39) |
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