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| STW45NM50 N-CHANNEL 550V @ Tjmax - 0.08 - 45A TO-247 MDmeshTM MOSFET Table 1: General Features TYPE STW45NM50 s s s s Figure 1: Package RDS(on) < 0.1 ID 45 A VDSS (@Tjmax) 550V s s TYPICAL RDS(on) = 0.08 HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS 3 2 1 TO-247 DESCRIPTION The MDmeshTM is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company's PowerMESHTM horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company's proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition's products. Figure 2: Internal Schematic Diagram APPLICATIONS The MDmeshTM family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. Table 2: Order Codes SALES TYPE STW45NM50 MARKING W45NM50 PACKAGE TO-247 PACKAGING TUBE Rev. 2 March 2005 1/9 STW45NM50 Table 3: Absolute Maximum ratings Symbol VGS ID ID IDM (*) PTOT dv/dt (1) Tstg Tj Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Parameter Value 30 45 28.4 180 417 2.08 15 -65 to 150 150 Unit V A A A W W/C V/ns C C (*)Pulse width limited by safe operating area (1)ISD 45A, di/dt 400A/s, VDD V(BR)DSS, T j T JMAX. Table 4: Thermal Data Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 0.3 30 300 C/W C/W C Maximum Lead Temperature For Soldering Purpose Table 5: Avalanche Characteristics Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 35 V) Max Value 20 810 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 6: On/Off Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 30 V VDS = VGS, ID = 250 A VGS = 10 V, ID = 22.5 A 3 4 0.08 Min. 500 10 100 100 5 0.1 Typ. Max. Unit V A A nA V 2/9 STW45NM50 ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Dynamic Symbol gfs (2) Ciss Coss Crss Coss eq. (3) RG Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Gate Input Resistance Test Conditions VDS > ID(on) x RDS(on)max,ID = 22.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 20 3700 610 80 325 1.7 Max. Unit S pF pF pF pF VGS = 0V, VDS = 0V to 400V f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain VDD = 250V, ID = 24 A RG = 4.7 VGS = 10 V (see Figure 14) VDD = 400 V, ID = 45 A, RG = 4.7, VGS = 10 V (see Figure 14) VDD = 400V, ID = 45 A, VGS = 10V (see Figure 18) td(on) tr td(off) tf tc Qg Qgs Qgd Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Cross-over Time Total Gate Charge Gate-Source Charge Gate-Drain Charge 40 35 18 23 44 87 23 42 117 ns ns ns ns ns nC nC nC Table 8: Source Drain Diode Symbol ISD ISDM (3) VSD (2) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 45 A, VGS = 0 ISD = 40 A, di/dt = 100A/s, VDD = 100 V, Tj = 25C (see Figure 16) ISD = 40 A, di/dt = 100A/s, VDD = 100 V, Tj = 150C (see Figure 16) 520 7.8 30 680 11.2 33 Test Conditions Min. Typ. Max. 45 180 1.5 Unit A A V ns C A ns C A (2)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (3)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 3/9 STW45NM50 Figure 3: Safe Operating Area Figure 6: Thermal Impedance Figure 4: Output Characteristics Figure 7: Transfer Characteristics Figure 5: Transconductance Figure 8: Static Drain-source On Resistance 4/9 STW45NM50 Figure 9: Gate Charge vs Gate-source Voltage Figure 12: Capacitance Variations Figure 10: Normalized Gate Thereshold Voltage vs Temperature Figure 13: Normalized On Resistance vs Temperature Figure 11: Source-Drain Diode Forward Characteristics 5/9 STW45NM50 Figure 14: Unclamped Inductive Load Test Circuit Figure 17: Unclamped Inductive Wafeform Figure 15: Switching Times Test Circuit For Resistive Load Figure 18: Gate Charge Test Circuit Figure 16: Test Circuit For Inductive Load Switching and Diode Recovery Times 6/9 STW45NM50 TO-247 MECHANICAL DATA mm. MIN. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 0.140 0.177 0.216 14.80 4.30 0.560 0.14 0.728 0.143 0.216 TYP MAX. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 MIN. 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inch TYP. MAX. 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620 DIM. A A1 b b1 b2 c D E e L L1 L2 oP oR S 7/9 STW45NM50 Table 9: Revision History Date 30/Mar/2005 Revision 2 Modified value in table 7 Description of Changes 8/9 STW45NM50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 9/9 |
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