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| SPCR02A SP Sound Controller with 40KB MROM and Serial RAM Interface SEP. 19, 2001 Version 1.5 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. SPCR02A Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 3. FEATURES.................................................................................................................................................................................................. 3 4. APPLICATION FIELD ................................................................................................................................................................................. 3 5. SIGNAL DESCRIPTIONS* .......................................................................................................................................................................... 4 6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5 6.1. CPU ..................................................................................................................................................................................................... 5 6.2. ROM AREA ........................................................................................................................................................................................... 5 6.3. RAM AREA............................................................................................................................................................................................ 5 6.4. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 5 6.5. I/O PORT CONFIGURATIONS*.................................................................................................................................................................. 5 6.6. TIMER/COUNTER ................................................................................................................................................................................... 6 6.7. SPEECH AND MELODY............................................................................................................................................................................ 6 6.8. POWER SAVINGS MODE ......................................................................................................................................................................... 6 7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 7 7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 7 7.2. DC/AC CHARACTERISTICS..................................................................................................................................................................... 7 7.3. THE RELATIONSHIP BETWEEN THE ROSC AND THE FCPU ............................................................................................................................. 7 8. APPLICATION CIRCUIT ............................................................................................................................................................................. 8 9. PACKAGE/PAD LOCATIONS ..................................................................................................................................................................... 9 9.1. PAD ASSIGNMENT ................................................................................................................................................................................. 9 9.2. ORDERING INFORMATION ....................................................................................................................................................................... 9 9.3. PAD LOCATIONS.................................................................................................................................................................................. 10 10. DISCLAIMER............................................................................................................................................................................................. 11 11. REVISION HISTORY ................................................................................................................................................................................. 12 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 2 SEP. 19, 2001 Version: 1.5 SPCR02A SOUND CONTROLLER WITH 40KB MROM AND SERIAL RAM INTERFACE 1. GENERAL DESCRIPTION The SPCR02A is a CPU based device for recording (one channel) and playback (two channel) that includes a CMOS 8-bit microprocessor, 40K-byte MROM (speech is compressed by 4-bit ADPCM with approx. 12sec. speech duration @ 7KHz sampling rate). It also includes Serial SRAM Interface and 128-byte It includes two Timer/Counters, 20 software For audio processing, It operates The power In addition, the working SRAM. 3. FEATURES ! 8-bit microprocessor ! Software-based audio processing ! Provides 40K-byte MROM for program and audio data with approx. 12 sec. speech @ 7KHz sampling rate with ADPCM ! 128-bytes working SRAM ! Operating voltage (single power): 2.4V - 3.6V 3.6V - 5.5V ! Supports Rosc ! Max. CPU clock speed: 6.0MHz @ 5.0V ! Serial SRAM Interface ! Standby mode (Clock Stop mode) for power savings. Max. 5A @ 5.0V ! Below 1000ns instruction cycle time @ 4.0MHz CPU clock ! Provides 20 general I/Os ! Two 12-bit timer/counters ! Two 8-bit audio current output (D/A) ! 6 INT sources ! Sunplus Serial SRAM Chip-Set Options SPRS256A (10sec @ 6.4KHz sampling rate) selectable I/Os, two 8-bit audio current output D/A, MIC (microphone) input, and AGC function. melody and speech can be mixed into one output. over a single power voltage range of 2.4V - 5.5V. SPCR02A has a Clock Stop mode for power savings. causing all other chip functions to be inoperative. clock frequency is 6.0MHz. clock cycles (min.) - 6 clock cycles (max.). commitment and technical support of Sunplus. savings mode saves the SRAM contents, but freezes the oscillator, The Max. CPU The SPCR02A It has an instruction cycle rate of 2 includes, not only the latest technology, but also the full 2. BLOCK DIAGRAM SPRS512C (20sec @ 6.4KHz sampling rate) SPRS1024C (40sec @ 6.4 Sampling Rate) Rosc 8-bit microprocessor 40K-byte MROM Two Timers TimeBase INT control ! Key wake -up function ! MIC input with AGC and Comparator AUD1 AUD2 128-byte SRAM MIC AGC OPIN OPOUT Two 8-bit D/A (current) 4. APPLICATION FIELD ! Intelligent education toys Ex. Pattern to voice (animal, car, color, etc.) Spelling (English or Chinese) Math ! High end toy controller ! Talking instrument controller ! General speech recorder ! Interactive games ! Industrial controller MIC Input Serial RAM Interface 20 PINS GENERAL I/O PORT CSB SCL SDA IOB3-0, 6,7 (I/O) IOC3-0,6,7 (I/O) IOD7-0 (I/O) (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 3 SEP. 19, 2001 Version: 1.5 SPCR02A 5. SIGNAL DESCRIPTIONS* Mnemonic VDD VSS RESET ROSC SDA SCL CSB AUD1 MIC OPIN OPOUT ALC AUD2 IOB0 IOB1 IOB2 IOB3 IOB6 IOB7 IOC0 IOC1 IOC2 IOC3 IOC6 IOC7 IOD0 IOD1 IOD2 IOD3 IOD4 IOD5 IOD6 IOD7 PIN No. 10 3 4 11 21 22 23 17 13 15 16 14 12 30 31 32 33 1 2 24 25 26 27 28 29 20 19 18 9 8 7 6 5 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O **See note 1 and 2 below. Type I I I I I/O O O O I I O I O I/O I/O I/O I/O I/O I/O **See note 1 and 2 below. Port C is an 8-bit bi-directional programmable Input / Output port with Pull-high or Open-drain option. As inputs, Port C can be in either the Pure or Pull-high states. As outputs Port C can be a Buffer or Open-drain type. IOC1: EXT INT IN IOC2: EXT COUNT IN **See note 1 and 2 below. Port D is an 8-bit bi-directional Input / Output port with Pull-low or Open-drain option. inputs, Port D can be either Pure or Pull-low states. Buffer or Open-drain PMOS (send current). for wake-up I/O pins. (Key change, Wake up I/O) As As outputs, Port D can be either Port C3 - C0 are Open-drain NMOS AUDIO output A Microphone input Preamplifier Input Preamplifier Output Automatic Gain Control AUDIO output B Port B is an 8-bit bi-directional programmable Input / Output port with Pull-low or Open-drain option. As inputs, Port B can be in either the Pure or Pull-low states. As outputs, Port B can be either Buffer or Open-drain NMOS types (Sink current). Positive supply for logic and I/O pins. Ground reference for logic and I/O pins. RESET input (This pin is active low reset for the chip) ROSC input External SRAM interface with the following Serial SRAM Chip-Set Options: SPRS256A, SPRS512C, and SPRS1024C. Description type (Sink current) and Port C7 - C6 are Open-drain NMOS (Sink current). Also, Port D can be software programmed * Refer to SPC Programming Guide for complete information. **Note: 1.) Three input states can be specified; Pure Input, Pull-High or Pull Low. 2.) Three output states can be specified as Buffer output, Open Drain PMOS output (send), or Open Drain NMOS output (sink). (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 4 SEP. 19, 2001 Version: 1.5 SPCR02A 6. FUNCTIONAL DESCRIPTIONS 6.1. CPU The SPCR02A 8-bit microprocessor is a high performance processor equipped with Accumulator, Program Counter, X Register, Stack pointer and Processor Status Register (this is the same as the 6502 instruction structure). specifications. SPCR02A is able to output data logic_2 control OD : Open Drain 60K Input/Output IOB port : IOB7,6 input data OD-NMOS or buffer perform with 6.0MHz (max.) depending on the application 6.2. ROM Area The SPCR02A provides a 40K-byte MROM that can be defined as the program area, audio data area, or both. 6.3. RAM Area The SPCR02A total RAM consists of 128 bytes (including Stack) at locations from $80 through $FF. Input/Output IOC port : IOC3 - 0 logic_3 control output data buffer or OD-NMOS VDD 90K 6.4. Map of Memory and I/Os *I/O PORT: - PORT IOB IOC IOD $0003 $0004 $0005 $00080 *MEMORY MAP (From ROM view) $00000 HW register, I/Os input data OD : Open Drain - I/O CONFIG $0000 $0001 *NMI SOURCE: - INTA (from TIMER A) $06000 $00100 USER RAM and STACK DUMMY for ice debug Input/Output IOC port : IOC7,6 logic_4 control output data buffer or OD-NMOS VDD 90K *INT SOURCE: - INTA (from TIMER A) - INTB (from TIMER B) - CPU CLK / 1024 - CPU CLK / 8192 - CPU CLK / 65536 - EXT INT $0FFFF USER'S PROGRAM & DATA AREA input data OD : Open Drain 6.5. I/O Port Configurations* Input/Output IOB port : IOB3 - 0 input data OD-NMOS or buffer Input/Output IOD port : IOD3 - 0 input data OD-PMOS or buffer output data logic_5 control output data logic_1 control OD : Open Drain 60K 60K OD : Open Drain (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 5 SEP. 19, 2001 Version: 1.5 SPCR02A Input/Output IOD port : IOD7 - 4 input data OD-PMOS or buffer Clock source of Timer/Counter can be selected as follows: Timer/Counter 12-BIT TIMER Clock Source CPU CLOCK (T) or T/4 T/64, T/8192, T/65536 or EXT CLK T or T/4 TMA only, select timer or counter Select T or T/4 output data TMA 12-BIT COUNTER 12-BIT TIMER TMB logic_6 control OD : Open Drain 60K MODE SELECT REGISTER TIMER CLOCK SELECTOR 6.7. Speech and Melody *Values shown are for VDD = 5.0V test conditions only. Since the SPCR02A provides a large ROM and wide range of CPU operation speeds, it is most suitable for speech and melody synthesis. For speech synthesis, the SPCR02A can provide NMI for accurate sampling frequency. For recording users can record the sound The sound data can and digitize it into the external Serial SRAM. designed by the user's program. 6.6. Timer/Counter The SPCR02A contains two 12-bit timer/counters, TMA and TMB respectively. TMA can be specified as a timer or a counter, but In the timer mode, TMA and When timer overflows from At TMB can only be used as a timer. TMB are re-loaded up-counters. $0FFF to $0000, the carry signal will make the timer automatically reload to the user's pre-set value and be up-counted again. corresponding bit is enabled in the INT ENABLE Register. counter. the same time, the carry signal will generate the INT signal if the If TMA is specified as a counter, users can reset by loading #0 into the After the counter has been activated, the value of the be played back in the sequence of the control functions as For pre-recorded data several algorithms are recommended for high fidelity and compression of sound including PCM, LOG PCM, and ADPCM. For melody synthesis, the SPCR02A provides the dual tone mode. After selecting the dual tone mode, users only need to fill either TMA or TMB, or both TMA and TMB to generate expected frequency for each channel. routine. The hardware will toggle the tone wave automatically without entering into an interrupt service Users are able to simulate musical instruments or sound effects by simply controlling the envelope of tone output. counter can also be read from the counters at the same time. The read instruction will not reset or affect the value of the counter. 6.8. Power Savings Mode The SPCR02A provides a power savings mode (Standby mode) for those applications that require very low stand-by current. To enter standby mode, the Wake-Up Register should be enabled and then stop the CPU clock by writing the STOP CLOCK Register. The CPU will then go to the stand-by mode. In such a mode, RAM and I/Os will remain in their previous states until being awakened. SPCR02A. Port IOD7-0 is the only wake-up source in the After the SPCR02A is awakened, the internal CPU Wakeup Reset will not affect RAM or will go to the RESET State (Tw 65536 x T1) and then continue processing the program. I/Os. (See FIG.1) Sleep T1 CPU CLK Wake-up Reset Tw FIG. 1 T1 = 1 / ( FCPU ), Tw 65536 x T1 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 6 SEP. 19, 2001 Version: 1.5 SPCR02A 7. ELECTRICAL SPECIFICATIONS 7.1. Absolute Maximum Ratings Characteristics DC Supply Voltage Input Voltage Range Operating Temperature Storage Temperature conditions see AC/DC Electrical Characteristics. Symbol V+ VIN TA TSTO Ratings < 7.0V -0.5V to V+ + 0.5V -10 to +70 -50 to +150 For normal operational Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. 7.2. DC/AC Characteristics Characteristics Operating Voltage Operating Current Standby Current OSC frequency Audio output current Input high level Input Low level Output high I IOB, IOC, IOD Output sink I IOB, IOC, IOD Input resistor IOB, IOC, IOD OSC frequency Symbol VDD IOP ISTBY FOSC IAUD VIH VIL IOH Limit Min. 2.4 3.0 -1.0 Typ. 4.0 3.0 -1.2 Max. 5.5 10 2.0 6.0 0.8 Unit V mA A MHz mA V V mA FOSC = 4.0MHz @ 5.0V, no load VDD = 5.0V VDD = 5.0V VDD = 5.0V VDD = 5.0V VDD = 5.0V VDD = 5.0V VOH = 4.2V VDD = 5.0V VOL = 0.8V Pull Low or Pull High VDD = 3.0V Test Condition IOL 4.0 - - mA RIN FCPU - 30 - 4.0 Kohm MHz 7.3. The Relationship between the ROSC and the FCPU 7.3.1. VDD = 3.0V, TA = 25 7.3.2. VDD = 4.5V, TA = 25 SPCR02A 6 5 Fosc ( MHz ) SPCR02A 4 Fosc ( MHz ) 3 2 1 0 0 200 400 Rosc ( Kohms ) 600 800 4 3 2 1 0 0 200 400 R o s c ( K o hm s ) 600 800 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 7 SEP. 19, 2001 Version: 1.5 SEP. 19, 2001 SPCR02A VDD SPCR02A R1 VDD ROSC RESET 0.1 VSS MIC C3 68p OPIN OPOUT ALC IOD0 IOD7 AUD1 AUD2 IOC0 IOC3 IOC6 IOC7 IOC0 IOC3 IOC6 IOC7 IOD0 IOD7 VDD R2 4.7K C1 0.1 47 C2 0.1 R3 MIC Input R4 200K C4 0.22 IOB0 IOB3 IOB0 IOB3 IOB6 IOB7 IOB6 IOB7 100K 43K Speaker Q1 8050 Speaker Q2 8050 VDD SDA SCL CSB SPRS512C VDD SDA SCL 8. APPLICATION CIRCUIT CSB VSS (c) Sunplus Technology Co., Ltd. 8 Proprietary & Confidential Version: 1.5 SPCR02A 9. PACKAGE/PAD LOCATIONS 9.1. PAD Assignment Chip Size: 2220m x 2120m This IC substrate should be connected to VSS Note1: Chip size included scribe line. Note2: The 0.1F capacitor between VDD and VSS should be placed to IC as close as possible. 9.2. Ordering Information Product Number SPCR02A-nnnnV-C Note1: Code number (nnnnV) is assigned for customer. Note2: Code number (nnnn = 0000 - 9999); version (V = A - Z). Package Type Chip form (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 9 SEP. 19, 2001 Version: 1.5 SPCR02A 9.3. PAD Locations PAD No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 PAD Name IOB6 IOB7 VSS RESET IOD7 IOD6 IOD5 IOD4 IOD3 VDD ROSC AUD2 MIC ALC OPIN OPOUT AUD1 IOD2 IOD1 IOD0 SDA SCL CSB IOC0 IOC1 IOC2 IOC3 IOC6 IOC7 IOB0 IOB1 IOB2 IOB3 X -915 -917 -897 -833 -669 -502 -345 -175 -14 152 304 465 614 775 925 908 891 904 904 935 937 937 613 474 313 176 15 -119 -278 -437 -569 -742 -908 Y 518 288 63 -807 -825 -825 -825 -825 -825 -832 -821 -821 -821 -821 -821 -620 -451 -290 -121 106 333 557 893 892 895 894 893 894 893 898 897 903 901 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 10 SEP. 19, 2001 Version: 1.5 SPCR02A 10. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. publication are current before placing orders. Accordingly, the reader is cautioned to verify that the data sheets and other information in this Products described herein are intended for use in normal commercial applications. Please note that application circuits Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. illustrated in this document are for reference purposes only. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 11 SEP. 19, 2001 Version: 1.5 SPCR02A 11. REVISION HISTORY Date NOV. 28, 1997 DEC. 27, 1997 Revision # 1.0 1.1 Original Modify error. IOB4 -> IOB6, IOB5 -> IOB7, IOC4 -> IOC6, IOC5 -> IOC7 FEB. 06, 1998 1.2 Modify error. IOB4 -> IOB6, IOB5 -> IOB7, IOC4 -> IOC6, IOC5 -> IOC7 AUG. 18, 1998 DEC. 15, 1999 1.3 1.4 Correction error. 1. Modify Format 2. Add PIN No. 3. Add "DISCLAIMER" SEP. 19, 2001 1.5 1. Modify operating voltage: 2.4V - 3.4V -> 2.4V - 3.6V 2. Correct chip size 3. Add Note1 and Note2 in the "9.1 PAD Assignment" 4. Renew to a new document format 3 9 9 2, 3, 7 Description Page (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 12 SEP. 19, 2001 Version: 1.5 |
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