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RF1K49154
Data Sheet January 2002
2A, 60V, 0.130 Ohm, Dual N-Channel, LittleFETTM Power MOSFET
This Dual N-Channel power MOSFET is manufactured using the latest manufacturing process technology. This process, which uses feature sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. It is designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers, and low voltage bus switches. These devices can be operated directly from integrated circuits. Formerly developmental type TA49154.
Features
* 2A, 60V * rDS(ON) = 0.130 * Temperature Compensating PSPICE(R) Model * Peak Current vs Pulse Width Curve * UIS Rating Curve * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Symbol
BRAND RF1K49154
S1(1) G1(2) D1(8) D1(7)
Ordering Information
PART NUMBER RF1K49154 PACKAGE MS-012AA
NOTE: When ordering, use the entire part number. For ordering in tape and reel, add the suffix 96 to the part number, i.e., RF1K4915496.
D2(6) D2(5)
S2(3) G2(4)
Packaging
JEDEC MS-012AA
BRANDING DASH 5
1 2 3 4
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154
Absolute Maximum Ratings
TA = 25oC, Unless Otherwise Specified RF1K49154 Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k, Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (Pulse width = 5s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed (Figure 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating (Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 60 60 20 2 Refer to Peak Current Curve Refer to UIS Curve 2 0.016 -55 to 150 300 260 W W/oC
oC oC oC
UNITS V V V A
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TA = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V, (Figure 12) VGS = VDS, ID = 250A, (Figure 11) VDS = 55V, VGS = 0V VDS = 50V, VGS = 0V, TC = 150oC MIN 60 2 VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 48V, ID = 2A, RL = 24 (Figure 14) Pulse Width = 1s Device Mounted on FR-4 Material TYP 10 25 70 35 26 14 0.8 340 140 40 MAX 4 1 250 10 0.130 50 155 32 17 1.0 62.5 UNITS V V A A A ns ns ns ns ns ns nC nC nC pF pF pF
oC/W
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
Gate to Source Leakage Current Drain to Source On Resistance Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 10V Threshold Gate Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Ambient
IGSS rDS(ON) tON td(ON) tr td(OFF) tf tOFF Qg(TOT) Qg(10) Qg(TH) CISS COSS CRSS RJA
VGS = 20V ID = 2A, VGS = 10V, (Figures 9, 10) VDD = 30V, ID 2A, RL = 15, VGS = 10V, RGS = 25 (Figure 14)
VDS = 25V, VGS = 0V, f = 1MHz (Figure 13)
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage Reverse Recovery Time SYMBOL VSD trr ISD = 2A ISD = 2A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.5 62 UNITS V ns
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 ID, DRAIN CURRENT (A) 0 25 50 75 100 125 150
TA = 25oC, Unless Otherwise Specified
2.5
2
1.5
1
0.5
0
0 25 50 TA , AMBIENT TEMPERATURE (oC) 75 100 125 TA, AMBIENT TEMPERATURE (oC) 150
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE
5
1 THERMAL IMPEDANCE ZJA, NORMALIZED
DUTY CYCLE DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1
0.1
0.01
t2
SINGLE PULSE 0.001 10-5 10-4 10-3 10-2 10-1 100 t, RECTANGULAR PULSE DURATION (s)
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 101 102 103
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
100 20 ID, DRAIN CURRENT (A) IDM, PEAK CURRENT CAPABILITY (A) TJ = MAX RATED TA = 25oC VGS = 20V VGS = 10V
TA = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I
10
5ms 10ms
= I25
150 - TA 125
10
THERMAL IMPEDANCE MAY LIMIT CURRENT IN THIS REGION
1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 0.1 0.1
VDSS (MAX) = 60V 10 100 200
1
1
10-5
10-4
VDS, DRAIN TO SOURCE VOLTAGE (V)
10-3 10-2 10-1 t, PULSE WIDTH (s)
100
101
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154 Typical Performance Curves
10 IAS, AVALANCHE CURRENT (A) If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 5 STARTING TJ = 25oC
TA = 25oC, Unless Otherwise Specified (Continued)
20 VGS = 20V VGS = 10V ID, DRAIN CURRENT (A) 15 VGS = 8V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TA = 25oC VGS = 6V
VGS = 9V
VGS = 7V
10
5 VGS = 5V 0
STARTING TJ = 150oC 1 0.1 1 10 tAV, TIME IN AVALANCHE (ms) 100
0
1.5 3.0 4.5 6.0 VDS, DRAIN TO SOURCE VOLTAGE (V)
7.5
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY FIGURE 7. SATURATION CHARACTERISTICS
20 ID(ON), ON-STATE DRAIN CURRENT (A) VDD = 15V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -55oC 150oC
rDS(ON), ON-STATE RESISTANCE (m)
25oC
500 ID = 0.5A 400 ID = 1A 300
16
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V ID = 4A ID = 2A
12
8
200
4
100
0 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10
0 2 4 6 8 10 VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
2 NORMALIZED ON RESISTANCE
1.5 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 2A NORMALIZED GATE THRESHOLD VOLTAGE 1.25 VGS = VDS, ID = 250A
1.5
1
1
0.5
0.75
0 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
0.5 -80
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154 Typical Performance Curves
1.5 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 400 C, CAPACITANCE (pF) 1.25 CISS
TA = 25oC, Unless Otherwise Specified (Continued)
500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD
300 COSS 200
1
0.75
100
CRSS
0.5 -80
0 -40 0 40 80 120 160 0 TJ , JUNCTION TEMPERATURE (oC) 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 25
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VDS , DRAIN TO SOURCE VOLTAGE (V)
60
10 VGS , GATE TO SOURCE VOLTAGE (V)
45 VDD = BVDSS 30 RL = 30 IG(REF) = 0.26mA VGS = 10V PLATEAU VOLTAGES IN DESCENDING ORDER: VDD = BVDSS VDD = 0.75 BVDSS VDD = 0.50 BVDSS VDD = 0.25 BVDSS 20 --------------------I G ( ACT ) I G ( REF ) t, TIME (s)
7.5
5
15
2.5
0
0
80 --------------------I G ( ACT )
I G ( REF )
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154 Test Circuits and Waveforms
(Continued)
tON VDS VDS VGS RL
+
tOFF td(OFF) tr tf 90%
td(ON)
90%
DUT RGS VGS
-
VDD
0
10% 90%
10%
VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS RL VDD VDS Qg(10) OR Qg(5)
+
Qg(TOT)
VGS
VGS = 20V VGS = 10V FOR L2 DEVICES VGS = 10V VGS = 5V FOR L2 DEVICES
VDD DUT Ig(REF)
VGS VGS = 2V 0 VGS = 1V FOR L2 DEVICES Qg(TH)
Ig(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
(c)2002 Fairchild Semiconductor Corporation
RF1K49154 Rev. B
RF1K49154 PSPICE Electrical Model
SUBCKT RF1K49154 2 1 3 ;
CA 12 8 3.5e-10 CB 15 14 3.7e-10 CIN 6 8 2.26e-10
10
rev 2/2/96
LDRAIN DPLCAP 5 RLDRAIN DBREAK 11 + 17 EBREAK 18 DRAIN 2 RSLC1 51 ESLC 50
RSLC2
5 51
EBREAK 11 7 17 18 63 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 1.4e-9 LSOURCE 3 7 3.1e-10 K1 LGATE LSOURCE 0.131 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 7.0e-3 RGATE 9 20 1.9 RLDRAIN 2 5 10 RLGATE 1 9 14 RLSOURCE 3 7 3 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 5.6e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
GATE 1
ESG + LGATE EVTEMP RGATE + 18 22 9 20 6 8 EVTHRES + 19 8 6
RLGATE CIN
MSTRO LSOURCE 8 RSOURCE RLSOURCE 7 SOURCE 3
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*50),3))} .MODEL DBODYMOD D (IS = 2.6e-13 RS = 2.34e-2 IKF = 5.5 N = 0.995 TRS1 = 2.8e-3 TRS2 = 1.1e-5 CJO = 3.7e-10 TT = 3.5e-8 M = 0.46 + XTI = 5.5) .MODEL DBREAKMOD D (RS = 0. 5IKF = 0.1 N = 1 TRS1 = 3e- 3TRS2 = -5e-5) .MODEL DPLCAPMOD D (CJO = 5.6e-1 0IS = 1e-3 0N = 10 M = 0.92) .MODEL MMEDMOD NMOS (VTO = 3.25 KP = 1.8 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1.9) .MODEL MSTROMOD NMOS (VTO = 3.68 KP = 13.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 2.83 KP = 0.03 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 19 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1.08e- 3TC2 = 5e-7) .MODEL RDRAINMOD RES (TC1 = 1.7e-2 TC2 = 1e-4) .MODEL RSLCMOD RES (TC1 = 1e-9 TC2 = 1e-4) .MODEL RSOURCEMOD RES (TC1 = 3.3e-3 TC2 = 1e-9) .MODEL RVTHRESMOD RES (TC1 = -1.9e-3 TC2 = -4e-6) .MODEL RVTEMPMOD RES (TC1 = -2.9e- 3TC2 = 2.2e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -7.1 VOFF= -4) VON = -4 VOFF= -7.1) VON = 0.01 VOFF= 1.9) VON = 1.9 VOFF= 0.01)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991.
(c)2002 Fairchild Semiconductor Corporation
+
DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD
-
RDRAIN 21 16
DBODY
MWEAK MMED
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
RF1K49154 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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