View NTE6850_1291171.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

NTE6850 Integrated Circuit NMOS, Asynchronous Communications Interface Adapter
Description: The NTE6850 Asynchronous Communications Interface Adapter provides the data formatting and control to interface serial asynchronous data communications information to bus organized systems such as the NTE6800 Microprocessing Unit. The bus interface of the NTE6850 includes select, enable, read/write, interrupt and bus interface logic to allow data transfer over an 8-bit bidirectional data bus. The parallel data of the bus system is serially transmitted and received by the asynchronous data interface, with proper formatting and error checking. The functional configuration of the ACIA is programmed via the data bus during system initialization. A programmable control register provides variable word lengths, clock division ratios, transmit control, receive control, and interrupt control. For peripheral or modem operation, three control lines are provided. These lines allow the ACIA to interface directly with the NTE6860 0-600 bps digital modem. Features: D 8-Bit and 9-Bit Transmission D Optional Even and Odd Parity D Parity, Overrun and Framing Error Checking D Programmable Control Register D Optional /1, /16, and /64 Clock Modes D Up to 1.0 Mbps Transmission D False Start Bit Deletion D Peripheral/Modem Control Functions D Double Buffered D One-Stop or Two-Stop Bit Operation Absolute Maximum Ratings: Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7.0V Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7.0V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +150C Thermal Resistance, Junction-to-Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120C/W Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g. either VSS or VCC).
Electrical Characteristics: (VCC = 5V 5%, VSS = 0, TA = 0 to +70C unless otherwise specified)
Parameter Input High Voltage Input Low Voltage Input Leakage Current R/W, CS0, CS1, CS2, Enable, RS, RX D, RX C, CTS, DCD Hi-Z (Off-State) Input Current D0 - D7 Output High Voltage D0 - D7 Output High Voltage TX Data, RTS Output Low Voltage Output Leakage Current (Off-State) IRQ Internal Power Dissipation Internal Input Capacitance D0 - D7 Internal Input Capacitance E, TX CLK, RX CLK, R/W, RS, RX Data, CS0, CS1, CS2, CTS, DCD Output Capacitance RTS, TX Data Output Capacitance IRQ Cout Vin = 0, TA = +25C, f = 1MHz VOL ILOH PINT Cin Symbol VIH VIL Iin Vin = 0 to 5.25V Test Conditions Min VSS+2.0 VSS-0.3 - Typ - - 1.0 Max VCC VSS+0.8 2.5 Unit V V A
ITSI VOH
Vin = 0.4 to 2.4V ILoad = 205A, Enable Pulse Width < 25s ILoad = 100A, Enable Pulse Width < 25s ILoad = 1.6A, Enable Pulse Width < 25s VOH = 2.4V TA = 0C, Note 2 Vin = 0, TA = +25C, f = 1MHz
- VSS+2.4 VSS+2. - - - - -
2.0 - - - 1.0 300 10.0 7.0
10.0 - - VSS+0.4 10 525 12.5 7.5
A V V V A mW pF pF
- -
- -
10 5
pF pF
Note 2. For temperatures less than TA = 0C, PINT maximum will increase.
Serial Data Timing Characteristics:
Parameter Data Clock Pulse Width, Low Symbol PWCL PWCH fC tTDD tRDS tRDH tR tRTS tr, tf or 10% of the pulse width if smaller B1 Mode B1 Mode Test Conditions B16, B64 Modes B1 Mode Data Clock Pulse Width, High B16, B64 Modes B1 Mode Data Clock Frequency B16, B64 Modes B1 Mode Data Clock-to-Data Delay for Transmitter Receive Data Setup Time Receive Data Hold Time Interrupt Request Release Time Request-to-Send Delay Time Input Rise and Fall Times Min 600 900 600 900 - - - 250 250 - - - Typ - - - - - - - - - - - - Max Unit 450 650 450 650 0.8 500 600 - - 1.2 560 1.0 ns ns ns ns MHz kHz ns ns ns s ns s
Bus Timing Characteristics: (VL 4V, VH 2.4V, measurement points 0.8V and 2V unless otherwise specified)
Parameter Cycle Time Pulse Width, E Low Pulse Width, E High Clock Rise and Fall Time Address Hold Time Address Setup Time Before E Chip Select Setup Time Before E Chip Select Hold Time Read Data Hold Time Write Data Hold Time Output data Delay Time Input Data Setup Time Symbol tcyc PWEL PWEH tr, tf tAH tAS tCS tCH tDHR tDHW tDHW tDSW Note 3 Test Conditions Min 1.0 430 450 - 10 80 80 10 20 10 - 165 Typ - - - - - - - - - - - - Max 10.0 9500 9500 25 - - - - 50 - 290 - Unit s ns ns ns ns ns ns ns ns ns ns ns
Note 3. The data bus output buffers are no longer sourcing or sinking current by tDHRmax (High Impedance).
Pin Connection Diagram VSS Rx Data Cx Clk Tx Clk RTS Tx Data IRQ CS0 CS2 CS1 RS VDD 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CTS DCD D0 D1 D2 D3 D4 D5 D6 D7 E R/W
24
13
1
12
1.300 (33.02) Max .225 (5.73) Max
.520 (13.2)
.100 (2.54) 1.100 (27.94)
.126 (3.22) Min
.600 (15.24)

▲Up To Search▲

Price & Availability of NTE6850

	To Download NTE6850 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .