 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MITSUMI No-adjustment Sync Separator MM1068 No-adjustment Sync Separator Monolithic IC MM1068 Outline This IC is a no-adjustment sync IC designed for use in VCR, TV and other video equipment. A ceramic resonator is used in the oscillation circuit for stable operation. Features 1. Sync separator with AFC 2. Ceramic resonator means no adjustment required 3. High precision due to use of PLL format 4. Ceramic resonator can be selected for use in either PAL or NTSC 5. Power supply voltage VCC=5V Package SIP-10A (MM1068XS) Applications 1. TV 2. VCR 3. Other video equipment Block Diagram MITSUMI No-adjustment Sync Separator MM1068 Pin Description Pin no. Pin name 1 2 GND OSC OUT Internal equivalent circuit diagram Pin no. Pin name 6 7 VCC VIDEO IN Internal equivalent circuit diagram 3 OSC IN1 8 H.SYNC 4 OSC IN2 9 V.INT 5 LPF 10 V.SYNC Absolute Maximum Ratings Item Storage temperature Operating temperature Power supply voltage Allowable loss (Ta=25C) Symbol TSTG TOPR VCC max. Pd Ratings -40~+125 -20~+75 7 500 Units C C V mW MITSUMI No-adjustment Sync Separator MM1068 Electrical Characteristics Item Operating power supply voltage Consumption current Free-running frequency NTSC Horizontal sync signal acquisition range NTSC Free-running frequency PAL Horizontal sync signal acquisition range PAL LPF pin DC level Sync separation level H. sync pulse width H. sync delay time H. sync output voltage L H. sync output voltage H V. sync pulse width V. sync delay time V. sync output voltage L V. sync output voltage H V. sync switching voltage L (Except where noted otherwise, Ta=25C, VCC=5.0V, X=CSB503F2, R=390 [OHM], C=3300pF, SW1=ON, SW2=OFF) Measurement circuit VCC Id TP1 TP1 TP1 TP1 TP4 VIN TP1 TP1 TP1 TP1 TP3 TP3 TP3 TP3 TP2 TP2 VIN : signal 1 Measurement conditions Min. Typ. Max. Units 4.7 5.0 8.0 5.3 V Symbol VCC Id fO1 fCAP1 fO2 fCAP2 VLPF VSEPA tW1 Td1 VL1 VH1 tW3 td3 VL3 VH3 VTHL3 11.5 mA 15.534 15.734 15.934 kHz *1 *2 300 500 Hz X=CSB500F40, R=200OHM, C=4700pF X=CSB500F40, R=200OHM, C=4700pF, VIN : signal 1 SW2 : ON SW1 : OFF, VIN : staircase wave 1VP-P VIN : signal 1, 15.734kHz 15.425 15.625 15.825 kHz 300 0.9 500 1.4 50 4.2 1.2 0.2 4.8 150 8.0 4.8 1.5 2.3 5.0 190 0.2 5.0 1.8 2.6 2.1 2.9 230 0.4 10.0 12.0 1.9 80 4.5 1.7 0.4 Hz V mV uS uS V V uS uS V V V V *1 *3 *4 20 3.9 0.7 V. sync switching voltage H VTHH3 *5 VIN : signal 1, 15.734kHz *5 VIN : signal 1, 15.734kHz *5 VIN : signal 1, 15.734kHz *5 VIN : staircase wave 1VP-P *6 VIN : staircase wave 1VP-P *6 VIN : staircase wave 1VP-P *6 VIN : staircase wave 1VP-P *6 TP2 : DC voltage 5V Low *7 TP2 : DC voltage 0V High *7 Notes: 1 Signal 1 : Pulse signal with 0.3V amplitude and pulse width 4.7S * Signal 1 waveform 4.7uS Measuring horizontal sync signal pull-in NTSC *2 With TP1 waveform not synchronized to range for adjust signal 1 frequency toward 15.734kHz. signal 1, The measurement value is the smaller of the synchronized frequency and the difference from 15.734. *3 Measuring horizontal sync signal pull-in range for PAL *4 Measuring sync separation level With TP1 waveform not synchronized to signal 1, adjust signal 1 frequency toward 15.625kHz. The measurement value is the smaller of the synchronized frequency and the difference from 15.625. Gradually lower staircase wave signal sync tip level, and measure sync tip level when Pin 9 waveform starts to change. MITSUMI No-adjustment Sync Separator MM1068 *5 H. SYNC measurement Signal 1 tw1 TP1 waveform VL1 td1 VH1 *6 V. SYNC measurement Input video signal (Horizontal sync signal portion) TP3 waveform tw3 VH3 VL3 td3 *7 V. SYNC switching voltage measurement Measuring Circuit Gradually change the DC voltage impressed on TP2, and measure TP2 voltage when TP3 output switches. Note : 1 * NTSC X R C CSB503F2 390 3300pF PAL CSB500F40 220 4700pF MITSUMI No-adjustment Sync Separator MM1068 Application Circuits There is a momentary phase lag in the H. SYNC output vertical feedback interval. When using this IC for OSD timing, characters at the top of the screen may bend due to IC deviation. If this happens, change the resistance between Pins 13 and 14 as shown, and the bending will improve by several H from the top edge of the screen. Application Circuit 1 Application Circuit 2 Note 1 : 1. 1 X R1 R2 C1 C2 * NTSC CSB503F2 1.5k 390 220pF 3300pF PAL CSB500F40 1.8k Note 2 : 1. 2 Input signal sync tip must be less than 1V for application circuit 1 Pin 7 external circuit. 2. The above 1. does not apply for application circuit 2 Pin 7 external circuit. Pin 1 is clamped at approximately 2.5V. * 2. Resistors R1 and R2 should have precision of 1%. 3. Capacitors C1 and C2 should have precision of 5% and temperature characteristic of CH class. |
Price & Availability of MM1068XS
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |