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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
INTRODUCTION
The KC73125UBA is an interline transfer CCD area image sensor developed for EIA 1/3 inch optical format video cameras, surveillance cameras, object detectors and image pattern recognizers. High sensitivity is achieved through the on-chip micro lenses and HAD (Hole Accumulated Diode) photosensors. This chip features a field integration read out system and an electronic shutter with variable charge storage time.
16Pin Cer DIP
FEATURES
* * * * * * * * High Sensitivity Optical Size 1/3 inch Format Variable Speed Electronic Shutter (1/60, 1/100 ~ 1/10,000sec) Low Dark Current Horizontal Register 5V Drive 16pin Ceramic DIP Package Field Integration Read Out System No DC Bias on Reset Gate
ORDERING INFORMATION
Device KC73125UBA Package 16Pin Cer DIP Operating -10 C ~ +60 C
STRUCTURE
* * * * * Number of Total Pixels: Number of Effective Pixels: Chip Size: Unit Pixel Size: Optical Blacks & Dummies: 537(H) x 505(V) 510(H) x 492(V) 6.00mm(H) x 4.95mm(V) 9.60m(H) x 7.50m(V) Refer to Figure Below Vertical 1 Line (Even Field Only)
16 2
510
25 1 Dummy Pixels Optical Black Pixels
Effective Imaging Area
OUTPUT
V-CCD
492 12
Effective Pixels
H-CCD
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
BLOCK DIAGRAM
(Top View)
8 VOUT
7 VSS
6 VGG
5 GND
V1
4
V2
3
V3
2
V4
1
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
Horizontal Shift Register CCD
Vertical Shift Register CCD
9 VDD
10 GND
11 SUB
12 VL
RS
13
14 NC
H1
15
H2
16
Figure 1. Block Diagram
PIN DESCRIPTION
Table 1. Pin Description Pin 1 2 3 4 5 6 7 8 Symbol V4 V3 V2 V1 GND VGG VSS VOUT Description Vertical CCD transfer clock 4 Vertical CCD transfer clock 3 Vertical CCD transfer clock 2 Vertical CCD transfer clock 1 Ground Output stage gate bias Output stage source bias Signal output Pin 9 10 11 12 13 14 15 16 Symbol VDD GND SUB VL RS NC H1 H2 Description Output stage drain bias Ground Substrate bias Protection circuit bias Charge reset clock No connection Horizontal CCD transfer clock 1 Horizontal CCD transfer clock 2
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
ABSOLUTE MAXIMUM RATINGS (NOTE)
Table 2. Absolute Maximum Ratings Characteristics Substrate voltage Supply voltage SUB - GND VDD, VOUT, VSS - GND VDD, VOUT, VSS - SUB Vertical clock input voltage V1,V2, V3, V4 - GND V1, V2, V3, V4 - V L V1, V2, V3, V4 - SUB Horizontal clock input voltage H1, H2 - GND H1, H2 - SUB Voltage difference between vertical and horizontal clock input pins V1, V2, V3, V4 Symbols Min. -0.3 -0.3 -55 -10 -0.3 -55 -0.3 -55 Max. 55 18 10 20 30 10 10 17 15 27 H1, H2 H1, H2 - V4 Output clock input voltage RS, VGG - GND RS, VGG - SUB Protection circuit bias voltage Operating temperature Storage temperature VL - SUB TOP TSTG -17 -0.3 -55 -55 -10 -30 17 17 15 10 10 60 80 Unit V V V V V V V V V V V V V V V C C
NOTE: The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature.
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
DC CHARACTERISTICS
Table 3. DC Characteristics Item Output stage drain bias Output stage gate voltage Output stage source voltage Substrate voltage adjustment range Fluctuation voltage range after substrate voltage adjusted Protection circuit bias voltage Output stage drain current Symbol VDD VGG VSS VSUB VSUB VL IDD Min. 14.55 1.75 Typ. 15.0 2.0 Max. 15.45 2.25 Unit V V V V % 5% Remark
Ground through 680 7.0 -3 14.5 3
The lowest vertical clock level 2.5 mA
CLOCK VOLTAGE CONDITIONS
Table 4. Clock Voltage Conditions Item Read-out clock voltage Vertical transfer clock voltage Symbol VVH1, VVH3 VVM1 ~ V VM4 VVL1 ~ V VL4 Horizontal transfer clock voltage VHH1, VHH2 VHL1, VHL2 Charge reset clock voltage VRSH VRSL Substrate clock voltage VSUB Min. 14.55 -0.2 -9.5 4.75 -0.2 4.75 -0.2 20 Typ. 15.0 0.0 -9.0 5.0 0.0 5.0 0.0 23.0 Max. 15.45 0.2 -8.5 5.25 0.2 5.25 0.2 25 Unit V V V V V V V V Remark High level Middle Low High Low High Low Shutter
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
DRIVE CLOCK WAVEFORM CONDITIONS
Read Out Clock Waveform
100% 90%
VVH1, VVH3
10% 0% tr twh tf 0V
Vertical Transfer Clock Waveform
O V 1
VVH1
V VH VVHH VVHL
O V 3
VVHH V V HL V VH L VVHL V VH3 V VHH
V VH H
V VH
V VL H V VL 1 V VL L V VL 3 V VL L V VL H V VL
V VL
O V 2
V VH H
V VHH
V VH V VHL
O V 4
V VH V VH H
V V HH
V VH2
V VHL
V VHL
V VH 4
V VHL
V VL 2
V VL H
V VL H
V VL L V VL V VH = ( V V H 1 + V V H 2)/ 2
V VL 4
V VL L V VL
V VH H
= V V H + 0. 3V
V V L = (V V L 3 + V V L 4)/ 2 V O V = V V H n - V V L n
(n =1~4)
V V H L = V V H - 0. 3 V V V L H = V V L + 0. 3V V V L L = V V L - 0. 3 V
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
Horizontal Transfer Clock Waveform Diagram
tr twh tf
90% VOH 10% VHL twl
Reset Gate Clock Waveform Diagram
tr twh tf VRGH twl VORG Point A RG waveform VRGLH VRGLL VRGL + 0.5V VRGL
OH1 waveform 10%
VRGLH is the maximum value and VRGLL the minimum value of the coupling waveform in the period from Point A in the diagram about to RG rise VRGL = (VRGLH + VRGLL)/2, VFRG = VRGH - VRGL
Substrate Clock Waveform
100% 90%
VOSU B 10% VSUB 0% tr twh tf
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
CLOCK EQUIVALENT CIRCUIT CONSTANT
Table 5. Clock Equivalent Circuit Constant
twh Item Read-out clock Vertical clock Symbol Min. VH V1, V2 V3, V4 H1 Horizontal clock Reset clock Substrate clock H2 RG SUB 37 37 11 1.5 41 41 15 2.0 38 38 75 42 42 79 12 12 6.5 0.5 15 15 Typ. 2.5 Max. Min. Typ. Max. Min. Typ. 0.5 15 10 10 4.5 0.5 Max. Min. Typ. 0.5 250 15 15 Max. s ns ns ns ns s twl tr tf Unit
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
EQUIVALENT CIRCUIT PARAMETERS
Table 6. Equivalent Circuit Parameters Item Capacitance between vertical transfer clock and GND Symbol C V1, CV3 C V2, CV4 Capacitance between vertical transfer clocks CV12, CV34 CV23, CV41 CV13 CV24 Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between substrate clock and GND Vertical transfer clock serial resistor Vertical transfer clock ground resistor Horizontal transfer clock serial resistor Reset gate clock serial resistor CH1, CH2 CH12 CSUB RV1 ~ RV4 RVGND RH1, RH2 RRS Typ. 1,300 1,300 600 230 120 90 38 38 1120 40 15 10 100 Unit pF pF pF pF pF pF pF pF pF Remark
OV1 ROV1 COV1
OV2 ROV2 COV2 ROH1 OH1 COH12 ROH2 OH2 COH2
COV12
COV41
COV24
COV13 ROVGND
COV23
COH1
COV4 ROV4 OV4 COV34
COV3 ROV3 OV3
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
OPERATING CHARACTERISTICS
Device Temperature = 25 C Table 7. Operating Characteristics Item Sensitivity Saturation signal Smear Blooming margin Uniformity Dark signal (NOTE) Dark shading (NOTE) Image lag Flicker
NOTE: Test Temperature = 60 C
Symbol S YSAT SM BM U D D YLAG FY
Min. 95 600
Typ. 105
Max.
Unit mV/lux mV
Remark 1 2 3 4 5 6 7 8 9
0.007 1,000
0.015
% times
20 2 2 0.5 1
% mV mV % %
TEST CONDITION
1. Use a light source with color temperature of 3,200K hallogen lamp and CM-500S for IR cut filter. The light source is adjusted in accordance with the average value of Y signals indicated in each item. 2. Through the following tests the substrate voltage should be set to the value while the device condition should be kept within the range of the bias and clock conditions.
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
TEST METHODS
1. Measure the light intensities (L) when the averaged illuminance output value (Y) is the standard illuminance output value, 150mV (YA) and when half of 150mV (1/2 YA).
1 Y A - -- Y A 2 S = -------------------------L YA - L 1
-- Y A 2
2. Adjust the light intensity to 15 times of the value with which Y is YA, then measure the averaged illuminance output value (Y = YSAT).
3. Adjust the light intensity to 500 times of the value with which Y is YA, then remove the read-out clock and drain the signal in photosensors by the electronic shutter operation in all the respective horizontal blanking times with the other clocks unchanged. Measure the maximum illuminance output value (YSM).
Y SM 1 - 1SM = --------- x -------- x ----- x 100 ( % ) Y A 500 10
4. Adjust the light intensity to 1,000 times of the value with which Y is YA, then inspect whether there is blooming phenomenon or not.
5. Measure the maximum and minimum illuminance output value (YMAX, YMIN) when the light intensity is adjusted to make Y to be YA.
Y MAX - Y MIN U = -------------------------------- x 100 ( % ) YA
6. Measure YD with the horizontal idling time transfer level as reference, when the device ambient temperature is 60 C and all of the light sources are shielded.
7. Follow test method 6, measure the maximum (DMAX) and minimum illuminance output (DMIN).
D = D MAX - D MIN
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
8. Adjust the light intensity of Y signal output value by strobe light to 150mV (YA), calculate by below formula with measuring the image lag signal which is qenerated by below timing diagram.
Y LAG = ( Y lag 150 ) x 100 ( % )
FLD
SG1 Light Strobe Timing Y Signal Output 150mV
YLag
Output
9. Adjust the light intensity of Y signal average value to 150mV (YA), calculate by below formula with measuring the signal differences (Yf [mV]) between fields.
F Y = ( Y f Y A ) x 100 ( % )
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
SPECTRAL RESPONSE CHARACTERISTICS
Excluding Light Source Characteristics
1 0.9 0.8 Spectral Response 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 400 425 450 475 500 525 550 575 600 625 650 675 700 Wave Length (nm)
Figure 2. Spectral Response Characteristics
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
APPLICATION CIRCUITS
5V XSUB XV2 XV1 SG1 XV3 SG2 XV4 50K H2 H1 RS
1
2
3
4
5
6
7
8
9
10
104
KS7221D
20 19 18 17 16 15 14 13 12 11
100K
MA110
1 V4
103
H2 16 H1 15
2 V3 3 4 5 +47/16V 680 15V 180K
KC73125UBA
-+
10/25V 22
V2 V1 GND VGG
NC 14 RS 13 VL 12 SUB 11 GND 10 VDD 9
10
-
+
6
1/10V
7 VSS
27K
8 VOUT
KSC2757 103 103 100 3.9K
+
1/50V
+
-
+
-
10/25V
10/25V
-9V
15V
CCD Output
Figure 3. Application Circuits
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
READ-OUT CLOCK TIMING CHART
Unit: [s]
HD
V1 Odd Field V2 2.5
V3
V4 38.1 1.2 1.5 2.5 2.0
0.3 V1
V2 Even Field V3
V4
Figure 4. Read-out Clock Timing Chart
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KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
CLOCK TIMING CHART (VERTICAL SYNC.)
FLD VD BLK HD 520 525 1 2 3 4 5 10 15 20 260 265 270 275 280 2468 1357
SG1 SG2
V1 V2 V3 V4 CCD OUT CLP1 492 491 246 135 246 135 492 491 246 135
Figure 5. Clock Timing Chart (Vertical Sync.)
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
CLOCK TIMING CHART (HORIZONTAL SYNC.)
10
5 3 2 1 2 1 16 15
10
5 3 2 1
25
20
15
10
5 3 2 1 510
505
500
XSHD
XSHP
CLP1
Figure 6. Clock Timing Chart (Horizontal Sync.)
16
SUB
BLK
HD
RS
H1
H2
V1
V2
V3
V4
KC73125UBA
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
PACKAGE DIMENSIONS
Unit: mm t = 0.253/40.02
8.203/40.10 10.003/40.10 11.403/40.10 2.50 2-R0.50
7.203/40.10 9.203/40.10 12.203/40.12
Package Material Lead Material
Ceramic 42 Alloy
1.103/40.08 2.803/40.30 1.273/40.25 3.503/40.50
0.303/40.10 1.273/40.05 1.277 = 8.893/40.10 11.603/40.12
Figure 7. Package Dimensions
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1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
KC73125UBA
HANDLING INSTRUCTIONS
* Static Charge Prevention CCD image sensors can be easily damaged by static discharge. Before handling, be sure to take the following protective measures. -- Use non chargeable gloves, clothes or material. Also use conductive shoes. -- When handling directly, use an earth band. -- Install a conductive mat on the floor or working table to prevent generation of static electricity. -- Ionized air is recommended for discharging when handling CCD image sensor. -- For the shipment of mounted substrates, use boxes treated for the prevention of static charges. * Soldering -- Make sure the package temperature does not exceed 80 C. -- Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less than 2 seconds. For repairs and and remount, cool sufficiently. -- To dismount an imaging device, do not use a solder suction equipment. When using an electronic disoldering tool, use a thermal controller of the zero cross on/off type and connect to ground. * Dust and Dirt Protection -- Operate in the clean environments (around class 1000 will be appropriate). -- Do not either touch glass plates by hand or have object come in contact with glass surface. Should dirt stick to a glass surface blow it off with an air blow(for dirt stuck through static electricity ionized air is recommended). -- Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be caerful not to scratch the glass. -- Keep in case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. -- When a protective tape is applied before shipping, just before use remove the tape applied electrostatic protection. Do not reuse the tape. * Do not expose to strong light (sun rays) for long period, color filter are discolored.
*
Exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions.
*
CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
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