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PD - 91841C IRLBA3803 HEXFET(R) Power MOSFET Logic-Level Gate Drive Advanced Process Technology 175C Operating Temperature Fast Switching Fully Avalanche Rated Purchase IRLBA3803/P for solder plated option. D VDSS = 30V RDS(on) = 0.005 G ID = 179AV Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The Super-220 is a package that has been designed to have the same mechanical outline and pinout as the industry standard TO-220 but can house a considerably larger silicon die. It has increased current handling capability over both the TO-220 and the much larger TO-247 package. This makes it ideal to reduce component count in multiparalled TO-220 applications, reduce system power dissipation, upgrade existing designs or have TO-247 performance in a TO-220 outline. This package has also been designed to meet automotive qualification standard Q101. S Super - 220 Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Q Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche EnergyRU Avalanche CurrentQU Repetitive Avalanche EnergyQ Peak Diode Recovery dv/dt SU Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Recommended clip force Max. 179 V 126V 720 270 1.8 16 610 71 27 5.0 -55 to + 175 300 (1.6mm from case ) 20 Units A W W/C V mJ A mJ V/ns C N Thermal Resistance Parameter RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. --- 0.5 --- Max. 0.55 --- 58 Units C/W www.irf.com 1 05/20/02 IRLBA3803 Electrical Characteristics @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 30 --- --- --- 1.0 55 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.052 --- --- --- --- --- --- --- --- --- --- --- 14 230 29 35 2.0 5.0 5000 1800 880 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mAU 0.005 VGS = 10V, ID = 71AT 0.009 VGS = 4.5V, ID = 59A T V VDS = V GS, ID = 250A --- S VDS = 25V, ID = 71AU 25 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 140 ID = 71A 41 nC VDS = 24V 78 VGS = 4.5V, See Fig. 6 and 13TU --- VDD = 15V --- ID = 71A --- RG = 1.3 --- RD = 0.20, See Fig. 10 TU D Between lead, --- nH 6mm (0.25in.) G from package --- S and center of die contact --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5U Source-Drain Ratings and Characteristics IS I SM VSD trr Q rr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Q Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 179V showing the A G integral reverse --- --- 720 p-n junction diode. S --- --- 1.3 V TJ = 25C, IS = 71A, VGS = 0VT --- 120 180 ns TJ = 25C, IF = 71A --- 450 680 nC di/dt = 100A/s TU Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Q Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) R VDD = 15V, starting TJ = 25C, L = 180H RG = 25, IAS = 71A. (See Figure 12) T Pulse width 300s; duty cycle 2%. U Uses IRL3803 data and test conditions. V Calculated continuous current based on maximum allowable junction temperature;for recommended current-handling of the package refer to Design Tip # 93-4 S ISD 71A, di/dt 130A/s, VDD V(BR)DSS, TJ 175C 2 www.irf.com IRLBA3803 1000 I D , Drain-to-Source Current (A) 100 I D , Drain-to-Source Current (A) VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP 1000 VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP 100 2.7V 20s PULSE WIDTH T = 175 C J 1 10 100 2.7V 10 0.1 1 20s PULSE WIDTH T = 25 C J 10 100 10 0.1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 I D , Drain-to-Source Current (A) TJ = 25 C TJ = 175 C R D S (on ) , D rain-to-S ource O n R esistance (N orm alized) I D = 1 20 A 1.5 100 1.0 0.5 10 2.0 V DS = 25V 20s PULSE WIDTH 8.0 4.0 6.0 10.0 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A VGS , Gate-to-Source Voltage (V) T J , Junction T em perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRLBA3803 10000 8000 V G S , G ate-to-S ource V oltage (V ) V GS C iss C C iss C rs s o ss = = = = 0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d 15 I D = 71 A V D S = 24 V V D S = 15 V 12 C , Capacitance (pF) 6000 C oss 9 4000 6 C rss 2000 3 0 1 10 100 A 0 0 40 80 FO R TE S T C IRC UIT S E E FIG U R E 1 3 120 160 A 200 V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 100 I D , Drain Current (A) TJ = 175 C 1000 10us TJ = 25 C 10 100us 1ms 100 1 0.4 V GS = 0 V 0.8 1.2 1.6 2.0 2.4 10 TC = 25 C TJ = 175 C Single Pulse 1 10 10ms 100 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRLBA3803 200 LIMITED BY PACKAGE 160 V DS VGS RG RD D.U.T. + I D , Drain Current (A) V DD - 120 4.5V Pulse Width 1 s Duty Factor 0.1 % 80 Fig 10a. Switching Time Test Circuit 40 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE) 0.001 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01 P DM t1 t2 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRLBA3803 1500 E A S , S ingle P ulse A valanche E nergy (m J) TO P 1200 1 5V B O TTO M ID 29 A 5 0A 71 A VDS L D R IV E R 900 RG 20V tp D .U .T IA S + V - DD A 600 0 .0 1 Fig 12a. Unclamped Inductive Test Circuit 300 0 V D D = 15 V 25 50 75 100 125 150 A 175 V (B R )D SS tp S tarting T J , J unc tion T em perature (C ) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 4.5 V VG QGS QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRLBA3803 Peak Diode Recovery dv/dt Test Circuit D.U.T + S + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer R - T + Q RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + V DD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRLBA3803 Super-220 Package Outline Super-220 package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.05/02 8 www.irf.com |
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