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ASAHI KASEI [AKD4555-E] AKD4555-E Evaluation board Rev.0 for AK4555 GENERAL DESCRIPTION AKD4555-E is an evaluation board for the portable digital audio 16bit A/D and D/A converter, AK4555. The AKD4555-E can evaluate A/D converter and D/A converter separately in addition to loopback mode (A/D D/A). The A/D section can be evaluated by interfacing with AKM's DAC evaluation boards directly. The AKD4555-E has the interface with AKM's ADC evaluation boards. Therefore, it's easy to evaluate the D/A section. The AKD4555-E also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide AKD4555 -E --Evaluation board for AK4555 FUNCTION * Compatible with 2 types of interface - Direct interface with AKM's A/D & D/A converter evaluation boards - DIT/DIR with optical input/output AK4555 Figure 1. AKD4555-E Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual. 2005/03 ASAHI KASEI [AKD4555-E] Evaluation Board Manual Operation sequence 1) Set up the power supply lines. [VDD] (Orange) = 1.6 3.6V [REG] (Red) = 5.0V [AGND] (Black) = 0V [DGND] (Black) = 0V : for VDD of AK4555 : for regulator : for analog ground (including VSS of AK4555) : for logic ground Each supply line should be distributed from the power supply unit. 2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.) 3) Power on. The AK4555 should be reset once bringing SW2 (PDN) "OFF" upon power-up. 2005/03 ASAHI KASEI [AKD4555-E] Evaluation mode Applicable Evaluation Mode 1) Evaluation of loopback mode (default) 2) Evaluation of D/A using A/D converted data 3) Evaluation of D/A using DIR (Optical Link) 4) Evaluation of A/D using D/A converted data 5) Evaluation of A/D using DIT (Optical Link) 6) All interface signals including master clock are fed externally. 5) AKD43XX 4) D/A Board PORT2 DIT AKD4555-E 1) PORT1 DIR PORT3 10pin-Header CD 3) AKD53XX A/D Board 2) Player 1) Evaluation of loopback mode. (default) Nothing should be connected to PORT1/PORT3. JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 2005/03 ASAHI KASEI [AKD4555-E] 2) Evaluation of D/A using A/D converted data. D/A part can be evaluated by connecting with AKM's A/D evaluation boards via PORT3. Nothing should be connected to PORT1 JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 3) Evaluation of D/A using DIR. (Optical link) PORT1 (TORX141) is used. DIR generates MCLK, SCLK, LRCK and SDATA from the received data through optical connector (TORX141). Used for the evaluation using CD test disk. Nothing should be connected to PORT2/PORT3. JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 4) Evaluation of A/D using D/A converted data. A/D part can be evaluated by connecting with AKM's D/A evaluation boards via PORT3. Nothing should be connected to PORT1. JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 2005/03 ASAHI KASEI [AKD4555-E] 5) Evaluation of A/D using DIT. (Optical link) PORT2 (TOTX141) is used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX141). It is possible to connect AKM's D/A converter evaluation boards on the digital-amplifier, which equips DIR input. JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 6) All interfacing signals (MCLK, SCLK, LRCK) are fed from the external circuit through PORT3. Under the following set-up, all external signals needed for the AK4555 to operate could be fed through PORT3. JP4 MCLK JP5 SCLK JP6 LRCK JP7 SDTI DIR ADC 2005/03 ASAHI KASEI [AKD4555-E] DIP switch set up Upper-side is "ON" ("H") and lower side is "OFF" ("L"). [SW1]: Set up the AK4555 and AK4114. . SW No. SW Name 1 2 3 4 DIF2, 0 DEM1 DEM0 NC Always ON. Mode AK45545and AK4114 Audio Format Setting Set up the de-emphasis of AK4555 (See table 2) No use Table 1. DIPswitch set-up of AK4114 DEM1 DEM0 Mode (SW1-#2) (SW1-#3) OFF OFF 44.1kHz OFF ON OFF ON OFF 48kHz ON ON 32kHz Table 2. DIPswitch set up of de-emphasis 2005/03 ASAHI KASEI [AKD4555-E] Other jumper pins set up [JP1] (GND): Connection between AGND and DGND open: Both grounds are separated on board. The function of the toggle SW. Upper-side is "ON" and lower side is "OFF". [SW2] (PDN): Resets the AK4555 and AK4114. Keep "ON" during normal operation. Indication for LED [LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114. 2005/03 ASAHI KASEI [AKD4555-E] Input Circuit J1 C28 4.7u AINR + 6 4 3 R20 560 AINL/AINR C29 4.7u AINL + R21 560 Figure 2. Input circuit on board Output Circuit R24 220 R23 10k R25 220 R22 10k J2 + AOUTR C30 22u 6 4 3 AOUTL/AOUTR AOUTL C31 22u + Figure 3. Output circuit on board * AKM assumes no responsibility for the trouble when using the circuit examples. 2005/03 ASAHI KASEI [AKD4555-E] MEASUREMENT RESULTS [Measurement condition] * Measurement unit * MCLK * SCLK * fs * Bit * Power Supply * Interface * Temperature 1. ADC VDD 2.5V Parameter S/(N+D) (-0.5dBFS) D-Range (-60dBFS) S/N (0 data) Measured Filter 20kHz LPF 20kLPF + A-weighted 20kLPF + A-weighted AINL 80.9 dB 89.4 dB 89.3 dB AINR 81.0 dB 89.2 dB 89.2 dB : Audio Precision, System two : 256fs : 64fs : 44.1kHz : 16bit : VDD = VP = 2.5V, VD = 5V : DIT/DIR : Room 2. DAC VDD 2.5V Parameter S/(N+D) (0dBFS) D-Range (-60dBFS) S/N (0 data) Measured Filter 20kHz LPF 22kLPF + A-weighted 22kLPF + A-weighted AOUTL 84.5 dB 91.6 dB 91.9 dB AOUTR 84.5 dB 91.7 dB 92.1 dB 2005/03 ASAHI KASEI [AKD4555-E] 3.PLOT DATA 3-1 ADC AKM -60 -62 -64 -66 -68 -70 -72 d B F S -74 -76 -78 -80 -82 -84 -86 -88 -90 -120 AK4554 ADC THD+N vs.Input Level VDD=2.5V, fs=44.1kHz, fin=1kHz -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 Fig. 1 THD+N vs. Input Level AKM -60 -62 -64 -66 -68 -70 -72 d B F S -74 -76 -78 -80 -82 -84 -86 -88 -90 20 AK4554 ADC THD+N vs. Input Frequency VDD=2.5V, fs=44.1kHz, Input Level=-0.5dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.2 THD+N vs. Input Frequency 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 AK4554 ADC Linearity VDD=2.5V, fs=44.1kHz, fin=1kHz -20 -30 -40 d B F S -50 -60 -70 -80 -90 -100 -110 -110 -100 -90 -80 -70 -60 dBr -50 -40 -30 -20 -10 +0 Fig.3 Linearity AKM +0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 d B F S -1.4 -1.6 -1.8 -2 -2.2 -2.4 -2.6 -2.8 -3 20 AK4554 ADC Frequency Response VDD=2.5V, fs=44.1kHz, Input level=-0.5dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.4 Frequency Response 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 ADC FFT Plot VDD=2.5V, fs=44.1kHz, fin=1kHz, Input Level=-0.5dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.5 FFT Plot (Input Level = -0.5dB) AKM +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 ADC FFT Plot VDD=2.5V, fs=44.1kHz, fin=1kHz, Input Level=-60dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.6 FFT Plot (Input Level = -60dB) 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 ADC FFT VDD=2.5V, fs=44.1kHz, Input Level=-0.5dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.7 FFT Plot (no signal) Fig.8 Crosstalk (red : L--->R, blue : R--->L) 2005/03 ASAHI KASEI [AKD4555-E] 3-2. DAC AKM -60 -62 -64 -66 -68 -70 -72 -74 -76 d B r A -78 -80 -82 -84 -86 -88 -90 -92 -94 -96 -98 -100 -120 -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 AK4554 DAC THD+N vs. Input Level VDD=2.5V, fs=44.1kHz, fin=1kHz Fig.9 THD+N vs. Input Level AKM -60 -62 -64 -66 -68 -70 -72 -74 -76 d B r A -78 -80 -82 -84 -86 -88 -90 -92 -94 -96 -98 -100 20 50 100 200 500 Hz 1k 2k 5k 10k 20k AK4554 DAC THD+N vs. Input Frequency VDD=2.5V, fs=44.1kHz, Input Level=0dB Fig.10 THD+N vs. Input Frequency 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -120 AK4554 DAC Linearity VDD=2.5V, fs=44.1kHz, fin=1kHz d B r A -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 Fig.11 Linearity AKM +1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d B r A +0.1 +0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k AK4554 DAC Frequency Response VDD=2.5V, fs=44.1kHz, Input Level=0dB Fig.12 Frequency Response 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 DAC FFT Plot VDD=2.5V, fs=44.1kHz,fin=1kHz, Input Level=0dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.13 FFT Plot (Input Level = 0dB) AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 DAC FFT Plot VDD=2.5V, fs=44.1kHz,fin=1kHz, Input Level=-60dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.14 FFT Plot (Input Level = -60dB) 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 DAC FFT VDD=2.5V, fs=44.1kHz, Input Level=0dB 50 100 200 500 Hz 1k 2k 5k 10k 20k Fig.15 FFT Plot (no data) Fig.16 Crosstalk (red : L--->R, blue : R--->L) 2005/03 ASAHI KASEI [AKD4555-E] AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4554 DAC out-band-noise VDD=2.5V, fs=44.1kHz, Input=no data 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k Fig.17 Out band noise 2005/03 ASAHI KASEI [AKD4555-E] Revision History Date (YY/MM/DD) 05/03/31 Manual Revision KM078200 Board Revision 0 Reason First Edtion Contents IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. 2005/03 A B C D E J1 6 4 3 C1 4.7u + + REG T45_R 1 VDD T45_O 1 AGND DGND + T45_BK T45_BK 1 1 R2 220 6 J2 4 3 R3 560 C2 22u R1 10k R4 220 R5 10k AINL/AINR E AOUTL/AOUTR E C4 4.7u + + (5V) (1.6-3.6V) REG T1 TA4803F GND IN OUT 1 R6 560 DGND JP1 GND AGND VD C6 0.1u C7 + 47u C8 0.1u C5 0.1u 2 U1 D D 1 VCOM AOUTR 16 VA JP2 REG L1 1 1 2 3 AINL PWDAN 14 2 AINR AOUTL 15 + C3 22u REG VA PWDAN C10 47u + 2 (short) R7 5.1 + + LVC VDD C11 10u C9 0.1u 4 VSS PWADN 13 R8 5 VDD SCLK 12 51 BCLK R9 6 C 51 MCLK C DEM0 MCLK 11 R10 51 7 DEM1 LRCK 10 LRCK R12 51 R11 51 8 SDTO SDTI 9 SDTI AK4555 DEM0 DEM1 4554_SDTO B B A A Title Size Document Number AKD4555-E AK4555 Sheet E Rev A3 Date: A B C D 0 1 of Wednesday, March 02, 2005 4 A B C D E VD 1 L2 47u E VD E DIP SW DIF2, 0 AK4555 AK4550/4 ON OFF DEM1 OFF OFF ON ON DEM0 OFF ON OFF ON 44.1k OFF 48k 32k PORT1 VCC GND OUT 3 2 1 2 C14 10u C12 0.1u + C13 10u R13 470 + C15 0.1u TORX141 C16 0.47u VD 41 48 46 45 44 42 39 47 R14 18k AVSS VCOM TEST1 D AVDD INT1 RX3 RX2 RX1 RX0 4 3 2 1 NC NC 1 2 3 6 5 4 43 40 38 37 RP1 DIF2,0 DEM 1 DEM 0 SW1 U2 VD U3A INT0 36 1 14 2 7 R VD D 47k MODE2 DEM0 DEM1 2 NC 1 IPS0 R15 1k 2 LED1 ERF 1 74HC14 OCKS0 35 3 DIF0 OCKS1 34 4 TEST2 CM1 33 5 DIF1 CM0 32 4114_PDN TP1 EXTCLK 1 C C 6 NC 1 7 DIF2 AK4114 PDN 31 C17 5p XTI 30 X1 11.2896MHz IPS1 XTO 2 8 29 C18 5p 9 P/SN DAUX 28 SDTO VD 10 XTL0 MCKO2 27 11 B XTL1 BICK 26 DIR_BICK B 12 VIN MCKO1 COUT UOUT DVDD BOUT VOUT TVDD DVSS DVSS LRCK TX0 TX1 SDTO 25 DIR_SDTO 13 14 15 16 17 18 19 20 21 22 23 C19 0.1u VD + C20 0.1u + 24 DIR_LRCK VD C21 10u R16 5.1 VD C22 10u DIR_MCKO PORT2 IN VCC A 3 2 1 GND A TOTX141 C23 0.1u Title Size Document Number AKD4555-E DIR/DIT Sheet E Rev A3 Date: A B C D 0 2 of Monday, February 07, 2005 4 A B C D E E E JP3 PWR VDD D3V VDD VD R17 1k U4 SDTO PWDAN 11 Y8 A8 9 7 2 14 U5A 1 4554_SDTO 74LVC07ANS LVC D 12 Y7 A7 8 D JP4MCLK MCLK 13 Y6 A6 7 DIR_MCKO JP5SCLK BCLK 14 Y5 A5 6 DIR_BICK JP6LRCK LRCK 15 Y4 A4 5 DIR_LRCK SDTI 16 Y3 A3 4 17 Y2 A2 3 C C 18 Y1 A1 2 10 GND G2 19 C24 0.1u 20 VCC G1 1 VD LVC 74LVC541 MCLK BICK LRCK SDTI VD PORT3 1 2 3 4 5 10 9 8 7 6 GND GND NC NC SDTO DSP R19 VD 2 D1 1S1588 R18 10k U3B 3 1 VD 14 4 7 U3C 5 10k 4114_PDN ADC B B 14 6 7 L 3 1 H SW2 PDN 2 74HC14 74HC14 SDTO C25 0.1u VD for 74HC14 for 74LVC07ANS LVC C26 0.1u C27 0.1u JP7 SDTI DIR DIR_SDTO A A Title Size Document Number AKD4555-E LOGIC Sheet E Rev A3 Date: A B C D 0 3 of Monday, February 07, 2005 4 A B C D E E E D D C VD LVC C U5B 7 3 4 14 74LVC07ANS U5C 7 5 6 14 74LVC07ANS U3D 9 14 8 7 U5D 7 9 8 14 74HC14 74LVC07ANS U5E 7 B U3E 11 14 10 7 11 10 14 74LVC07ANS B 74HC14 13 U5F 7 12 14 74LVC07ANS U3F 13 14 12 7 74HC14 A A Title Size Document Number AKD4555-E PIN Sheet E Rev A3 Date: A B C D 0 4 of Monday, February 07, 2005 4 |
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