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Preliminary Technical Data
FEATURES
5 Max On Resistance 0.5 Max On Resistance Flatness 33 V Supply Maximum Ratings Fully specified at 15V/12V/5V 3V Logic Compatible Inputs Rail-to-Rail Operation Break-Before-Make Switching Action 16-Lead TSSOP Packages Typical Power Consumption (< 0.03 W)
5 ax Ron, 4-/8-Channel 15V/12V/5V Multiplexers ADG1408/ADG1409
FUNCTIONAL BLOCK DIAGRAMS
ADG1408
S1 S1A DA S4A D S1B DB S8 S4B 1 OF 8 DECODER 1 OF 4 DECODER
ADG1409
APPLICATIONS
Relay Replacement Audio and Video Routing Automatic Test Equipment Data Acquisition Systems Battery-Powered Systems Sample-and-Hold Systems Communication Systems
A0 A1
A2 EN
A0
A1
EN
SWITCHES SHOWN FOR A "1" LOGIC INPUT
GENERAL DESCRIPTION
The ADG1408 and ADG1409 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG1408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1, and A2. The ADG1409 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched OFF. The ADG1408/ADG1409 are designed on an enhanced CMOS process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before- make switching action, preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.
PRODUCT HIGHLIGHTS
1. 2. 3. 4. 5 Max On Resistance 0.5 Max On Resistance Flatness 3V Logic Compatible Digital Input VIH = 2.0V, VIL = 0.8V 16 Lead TSSOP package
RevPrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2003 (c) 2004 Analog Devices, Inc. All rights reserved.
ADG1408/ADG1409 TABLE OF CONTENTS
ADG1408/ADG1409--Specifications ........................................... 3 Dual Supply ................................................................................... 3 Single Supply ................................................................................. 4 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configurations (TSSOP) .......................................................... 8
Preliminary Technical Data
Terminology .......................................................................................9 Typical Performance Characteristics ........................................... 10 Test Circuits..................................................................................... 12 Outline Dimensions ....................................................................... 15 Ordering Guide............................................................................... 16
REVISION HISTORY
RevPr. A | Page 2 of 16
Preliminary Technical Data ADG1408/ADG1409--SPECIFICATIONS
DUAL SUPPLY1
Table 1. VDD = +15 V 10%, VSS = -15 V 10%, GND = 0 V, unless otherwise noted.
Parameter ANALOG SWITCH Analog Signal Range RON RON Flatness RON LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG1408 ADG1409 Channel ON Leakage ID, IS (ON) ADG1408 ADG1409 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION 0.01 0.5 1 1 1 1 2.5 100 50 100 50 2.0 0.8 0.005 0.5 5 80 120 250 TBBM tON(EN) tOFF(EN) Charge Injection OFF Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N -3dB Bandwidth CS (OFF) CD (OFF) 10 85 150 40 20 75 85 0.002 50 15 10 125 225 65 150 120 250 10 1 125 225 65 150 20 0.5 50 100 50 100 50 2.0 0.8 nA typ nA max nA max nA max nA max nA max V min V max A max A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ % typ MHz typ pF typ 0.5 0.5 +25C -40C to +85C -40C to +125C VSS to VDD 3 4 5 5 Unit V typ max typ max typ max
ADG1408/ADG1409
Test Conditions/Comments
VD = 10 V, IS = -10 mA VD = +10 V, -10 V VD = +10 V, -10 V
VD = 10 V, VS = -10 V; Test Circuit 2 0.5 VD = 10 V; VS = 10 V; Test Circuit 3 VS = VD = 10 V; Test Circuit 4
VIN= VINL or VINH
RL = 300 , CL = 35 pF; VS1 = 10 V, VS8 = 10 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = 10 V; Test Circuit 6 RL = 300 CL = 35 pF; VS = 5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = 5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 10 nF; Test Circuit 8 RL = 1 k, f = 100 kHz; VEN = 0 V; Test Circuit 9 RL = 1 k, f = 100 kHz; Test Circuit 10 RL = 600 , 5Vrms; f=20Hz to 20kHz RL = 300 , CL = 5 pF; Test Circuit 10 Test Circuit 10 f = 1 MHz f = 1 MHz
Rev. B | Page 3 of 16
ADG1408/ADG1409
Parameter ADG1408 ADG1409 CD, CS(ON) ADG1408 ADG1409 POWER REQUIREMENTS IDD IDD ISS IGND IGND +25C 100 50 150 75 0.001 5 150 300 0.001 5 0.001 5 150 5 300 5 5 5 -40C to +85C -40C to +125C Unit pF typ pF typ pF typ pF typ A typ A max A typ A max A typ A max A typ A max A typ A max
Preliminary Technical Data
Test Conditions/Comments
f = 1 MHz
VDD = +16.5V, VSS = -16.5V Digital Inputs= 0 V or VDD Digital Inputs= 5 V Digital Inputs= 0 V or VDD Digital Inputs= 0 V or VDD Digital Inputs= 5 V
1 2
Temperature ranges are as follows: B Version: -40C to +85C; T Version: -40C to +125C. Guaranteed by design, not subject to production test.
SINGLE SUPPLY1
Table 2. VDD = 12 V V 10%,, VSS = 0 V, GND = 0 V, unless otherwise noted.
Parameter ANALOG SWITCH Analog Signal Range RON RON Flatness RON Channel ON Leakage ID, IS (ON) ADG1408 ADG1409 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION 1.5 0.5 +25C -40C to +85C -40C to +125C 0 to VDD 6 7 8 9 Unit V typ max typ max typ max nA max nA max V min V max A max pF typ ns typ VIN = 0 or VDD f = 1 MHz RL = 300 , CL = 35 pF; VS1 = 8 V/0 V, VS8 = 0 V/8 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = 5 V; Test Circuit 6 RL = 300 CL = 35 pF; VS = 5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = 5 V; Test Circuit 7 VS = 0 V, RS = 0, CL = 10 nF; Test Conditions/Comments
VD = 3 V, 10 V, IS = -1 mA VD = 3 V, 10 V, IS = -1 mA VD = 3 V, 10 V, IS = -1 mA VS = VD = 8 V/0 V; Test Circuit 4
1 1
100 50 2.0 0.8 10
100 50 2.0 0.8 10
8 130
TBBM tON (EN) tOFF (EN) Charge Injection
10 1 140 60 5
RevPr. A | Page 4 of 16
ns typ ns min ns typ ns typ pC typ
Preliminary Technical Data
Parameter OFF Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N -3dB Bandwidth CS (OFF) CD (OFF) ADG1408 ADG1409 CD, CS (ON) ADG1408 ADG1409 POWER REQUIREMENTS IDD IDD +25C -75 85 0.002 50 15 100 50 150 75 1 5 150 300 1 5 -40C to +85C -40C to +125C Unit dB typ dB typ % typ MHz typ pF typ pF typ pF typ f = 1 MHz pF typ pF typ A typ A max A typ A max
ADG1408/ADG1409
Test Conditions/Comments Test Circuit 8 RL = 1 k f = 100 kHz; VEN = 0 V; Test Circuit 9 RL = 1 k, f = 100 kHz; Test Circuit 10 RL = 600 , 5Vrms; f=20Hz to 20kHz RL = 300 , CL = 5 pF; Test Circuit 10 f = 1 MHz f = 1 MHz
VDD = 13.2V Digital Inputs= 0 V or VDD Digital Inputs= 5
1 2
Temperature ranges are as follows: B Version: -40C to +85 ; T Version: -55C to +125. Guaranteed by design, not subject to production test.
DUAL SUPPLY1
Table 3. VDD = +5 V 10%, VSS = -5 V 10%, GND = 0 V, unless otherwise noted.
Parameter ANALOG SWITCH Analog Signal Range RON RON LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG1408 ADG1409 Channel ON Leakage ID, IS (ON) ADG1408 ADG1409 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION +25C -40C to +85C -40C to +125C VSS to VDD 6 7 0.5 8 10 Unit V typ max max Test Conditions/Comments
VD = 3.3 V, IS = -10 mA VD = +3.3 V, -3.3 V VD = 3.3 V, VS = -3.3 V; Test Circuit 2 VD = 3.3. V; VS = 3.3 V; Test Circuit 3 VS = VD = 3.3 V; Test Circuit 4
0.01 0.5 1 1 1 1 2.5 100 50 100 50 2.0 0.8 0.005 0.5 5 120 120 0.5 50 100 50 100 50 2.0 0.8
nA typ nA max nA max nA max nA max nA max V min V max A max A max pF typ ns typ
VIN= VINL or VINH
RL = 300 , CL = 35 pF;
Rev. B | Page 5 of 16
ADG1408/ADG1409
Parameter +25C -40C to +85C 250 TBBM tON(EN) tOFF(EN) Charge Injection OFF Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N -3dB Bandwidth CS (OFF) CD (OFF) ADG1408 ADG1409 CD, CS(ON) ADG1408 ADG1409 POWER REQUIREMENTS IDD IDD ISS IGND IGND 20 -75 85 0.002 50 15 100 50 150 75 0.001 5 150 300 0.001 5 0.001 5 150 5 300 5 5 5 -75 85 85 150 125 225 65 150 1 125 225 65 150 -40C to +125C 250 Unit ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ % typ MHz typ pF typ pF typ pF typ
Preliminary Technical Data
Test Conditions/Comments VS1 = 10 V, VS8 = 10 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = 5 V; Test Circuit 6 RL = 300 CL = 35 pF; VS = 5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = 5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 10 nF; Test Circuit 8 RL = 1 k, f = 100 kHz; VEN = 0 V; Test Circuit 9 RL = 1 k, f = 100 kHz; Test Circuit 10 RL = 600 , 5Vrms; f=20Hz to 20kHz RL = 300 , CL = 5 pF; Test Circuit 10 Test Circuit 10 f = 1 MHz f = 1 MHz
f = 1 MHz pF typ pF typ A typ A max A typ A max A typ A max A typ A max A typ A max VDD = +16.5V, VSS = -16.5V Digital Inputs= 0 V or VDD Digital Inputs= 5 V Digital Inputs= 0 V or VDD Digital Inputs= 0 V or VDD Digital Inputs= 5 V
1 2
Temperature ranges are as follows: B Version: -40C to +85C; Y Version: -40C to +125C. Guaranteed by design, not subject to production test.
RevPr. A | Page 6 of 16
Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS1
Table 4. Absolute Maximum Ratings (TA = 25C, unless otherwise noted.)
Parameter VDD to VSS VDD to GND VSS to GND Analog, Digital Inputs2 Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) Automotive (Y Version) Storage Temperature Range Junction Temperature Rating 36 V -0.3 V to +25 V +0.3 V to -25 V VSS - 0.3 V to VDD + 0.3V or 20 mA, Whichever Occurs First 30 mA 100 mA Parameter TSSOP Package, Power Dissipation JA, Thermal Impedance JC, Thermal Impedance Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec)
ADG1408/ADG1409
Rating 450 mW 150.4C/W 50C/W 215C 220C
1
-40 C to +85C -40 C to +125C -65 C to +150C 150C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at A, EN, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 7 of 16
ADG1408/ADG1409 PIN CONFIGURATIONS - TSSOP
A0 1 EN 2 VSS 3 S1 4 16 A1 15 A2 A0 1 EN 2 VSS 3 S1A 4 16 A1 15 GND
Preliminary Technical Data
Table 5. ADG408 Truth Table
A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH NONE 1 2 3 4 5 6 7 8
13 VDD TOP VIEW (Not to Scale) 12 S5 S2 5 11 S6 10 S7 9 S8 S4 7 D8
ADG1408
14 GND
13 S1B TOP VIEW S2A 5 (Not to Scale) 12 S2B S3A 6 S4A 7 DA 8 11 S3B 10 S4B 9 DB
ADG1409
14 VDD
S3 6
Figure 1. Pin Configurations - TSSOP
Table 6. ADG409 Truth Table
Al X 0 0 1 1 A0 X 0 1 0 1 EN 0 1 1 1 1 ON SWITCH PAIR NONE 1 2 3 4
RevPr. A | Page 8 of 16
Preliminary Technical Data TERMINOLOGY
VDD VSS GND RON RON IS (OFF) ID (OFF) ID, IS (ON) VD (VS) CS (OFF) CD (OFF) CD, CS (ON) CIN tON (EN) tOFF (EN) tTRANSITION tOPEN VINL VINH IINL (IINH) IDD ISS Off Isolation Charge Injection Bandwidth On Response THD + N
ADG1408/ADG1409
Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to ground. Ground (0 V) reference. Ohmic resistance between D and S. Difference between the RON of any two channels. Source leakage current when the switch is off. Drain leakage current when the switch is off. Channel leakage current when the switch is on. Analog voltage on terminals D, S. Channel input capacitance for OFF condition. Channel output capacitance for OFF condition. ON switch capacitance. Digital input capacitance. Delay time between the 50% and 90% points of the digital input and switch ON condition. Delay time between the 50% and 90% points of the digital input and switch OFF condition. Delay time between the 50% and 90% points of the digital inputs and the switch ON condition when switching from one address state to another. OFF time measured between the 80% point of both switches when switching from one address state to another. Maximum input voltage for Logic 0. Minimum input voltage for Logic 1. Input current of the digital input. Positive supply current. Negative supply current. A measure of unwanted signal coupling through an OFF channel. A measure of the glitch impulse transferred from the digital input to the analog output during switching.
The frequency at which the output is attenuated by 3dBs. The Frequency response of the "ON" switch. The ratio of the harmonic amplitude plus noise of the signal to the fundamental.
Rev. B | Page 9 of 16
ADG1408/ADG1409 TYPICAL PERFORMANCE CHARACTERISTICS
Preliminary Technical Data
TBD
TBD
TPC 1. On Resistance as a Function of VD(VS) for for Single Supply
TPC 4. On Resistance as a Functionof VD(VS) for Different Temperatures, Single Supply
TBD
TBD
TPC 2. On Resistance as a Function of VD(VS) for Dual Supply
TPC 5. On Resistance as a Functionof VD(VS) for Different Temperatures, Dual Supply
TBD TBD
TPC 3. On Resistance as a Functionof VD(VS) for Different Temperatures, Single Supply TPC 6. Leakage Currents as a Function of VD (VS)
RevPr. A | Page 10 of 16
Preliminary Technical Data
ADG1408/ADG1409
TBD
TBD
TPC 10. TON/TOFF Times vs. Temperature)
TPC 7. Leakage Currents as a function of Temperature
TBD
TBD
TPC 8 Supply Currents vs. Input Switching Frequency
TPC 11 Off Isolation vs. Frequency
TBD
TBD
TPC 12 Crosstalk vs. Frequency
TPC 9 . Charge Injection vs. Source Voltage
TBD
TPC 13. On Response vs. Frequency
Rev. B | Page 11 of 16
ADG1408/ADG1409
Preliminary Technical Data
TBD
TPC 14. THD + N vs. Frequency
TEST CIRCUITS
Figure 2. Test Circuit 1. On Resistance
Figure 4. Test Circuit 3. ID (OFF)
Figure 3. Test Circuit 2. IS (OFF)
Figure 5. Test Circuit 4. ID (ON)
RevPr. A | Page 12 of 16
Preliminary Technical Data
ADG1408/ADG1409
Figure 6. Test Circuit 5. Switching Time of Multiplexer, tTRANSlTlON
Figure 7. Test Circuit 6. Break-Before-Make Delay, tOPEN
Figure 8. Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
Rev. B | Page 13 of 16
ADG1408/ADG1409
Preliminary Technical Data
Figure 9. Test Circuit 8. Charge Injection
Figure 10. Test Circuit 9. OFF Isolation
Figure 11. Test Circuit 10. Channel-to-Channel Crosstalk
RevPr. A | Page 14 of 16
Preliminary Technical Data OUTLINE DIMENSIONS
ADG1408/ADG1409
Figure 12. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)
Rev. B | Page 15 of 16
ADG1408/ADG1409 ORDERING GUIDE
Model ADG1408BRU ADG1409BRU Temperature Range -40C to +125C -40C to +125C
Preliminary Technical Data
Package Option1 RU-16 RU-16
PR04861-0-4/04(PrA)
1
RU = Thin Shrink Small Outline Package (TSSOP)
(c) 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. Printed in the U.S.A. PR04861-0-4/04(PrA)
RevPr. A | Page 16 of 16

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