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A3989 Bipolar Stepper and High Current DC Motor Driver
Features and Benefits
36Voutputrating 2.4Adcmotordriver 1.2Abipolarstepperdriver Synchronousrectification Internalundervoltagelockout(UVLO) Thermalshutdowncircuitry Crossover-currentprotection VerythinprofileQFNpackage
Description
The A3989 is designed operate at voltages up to 36 V while driving one bipolar stepper motor, at currents up to 1.2A, and one dc motor, at currents up to 2.4 A. The A3989 includes a fixed off-time pulse width modulation (PWM) regulator for current control. The stepper motor driver features dual 2-bit nonlinear DACs (digital-to-analog converters) that enable control in full, half, and quarter steps. The dc motor is controlled using standard PHASE and ENABLE signals. Fast or slow current decay is selected via the MODE pin. The PWM current regulator uses the Allegro(R) patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. Protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover current protection. Special power up sequencing is not required. The A3989 is supplied in a leadless 6 mm x 6 mm x 0.9 mm, 36 pin QFN package with exposed power tab for enhanced thermal performance. The package is lead (Pb) free, with 100% matte tin leadframe plating.
Package: 36 pin QFN with exposed thermal pad 0.90 mm nominal height (suffix EV)
Approximate scale 1:1
0.1 F 50 V CP1 VDD
0.1 F 50 V CP2 VCP VBB VBB OUT1A OUT1B
100 F 50 V
0.22 F 50 V
PHASE1 I01 Microcontroller or Controller Logic I11 PHASE2 I02 I12 PHASE3 ENABLE MODE VREF1 VREF2 VREF3
A3989
SENSE1
OUT2A OUT2B SENSE2
OUT3A OUT3A OUT3B OUT3B SENSE3 GND GND SENSE3
Figure 1. Typical application circuit A3989DS
A3989
Selection Guide
Part Number A3989SEV-T A3989SEVTR-T
Bipolar Stepper and High Current DC Motor Driver
Packing 61 pieces per tube 1500 pieces per reel
Absolute Maximum Ratings
Characteristic Load Supply Voltage Logic Supply Voltage Symbol VBB VDD Stepper motor driver, continuous Output Current* IOUT Stepper motor driver, pulsed tw < 1s Dc motor driver, continuous Dc motor driver, pulsed tw < 1s Logic Input Voltage Range SENSEx Pin Voltage VREFx Pin Voltage Operating Temperature Range Junction Temperature Storage Temperature Range VIN VSENSEx VREFx TA TJ(max) Tstg Range S Pulsed tw < 1s Pulsed tw < 1 s Notes Rating -0.5 to 36 38 -0.4 to 7 1. .8 .4 3.5 -0.3 to 7 0.5 .5 .5 -0 to 85 150 -55 to 150 Units V V V A A A A V V V V C C C
* May be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a Junction Temperature of 150C.
Thermal Characteristics (may require derating at maximum conditions)
Characteristic Package Thermal Resistance Symbol RJA Test Conditions EV package, 4 layer PCB based on JEDEC standard Min. Units 7 C/W
Power Dissipation versus Ambient Temperature
5500 5000 4500 4000
Power Dissipation, PD (mW)
3500 3000 2500 2000 1500 1000 500 0 25 50 75 100 125 Temperature (C) 150 175
EV Package 4-layer PCB (R JA = 27 C/W)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
A3989
Bipolar Stepper and High Current DC Motor Driver
Functional Block Diagram
0.1 F 50 V 0.1 F 50 V
100 F 50 V 0.22 F 50 V
To VBB2
VCP
VBB
VBB
CP1
CP2
VDD
DMOS Full Bridge 1
VBB1
OSC
CHARGE PUMP
VCP
OUT1A
PHASE1 I01 I11 PHASE2 I02 I12 Sense1 VREF1 3
OUT1B
Control Logic Stepper Motor
GATE DRIVE
SENSE1 VBB1
RS1
DMOS Full Bridge 2
PWM Latch BLANKING
+
OUT2A VREF2 3 Sense 2
+ -
PWM Latch BLANKING VCP
OUT2B
PHASE3 ENABLE MODE
Control Logic DC Motor
Sense 2 Sense 3
SENSE2
RS2
OUT3A OUT3A
GATE DRIVE Sense 3 VREF3 3
+
PWM Latch BLANKING
DMOS Full Bridge 3
OUT3B OUT3B SENSE3 SENSE3
-
RS3
GND
GND
NC
NC
NC
NC
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Characteristics
Bipolar Stepper and High Current DC Motor Driver
Symbol VBB VDD IDD RDS(on)dc RDS(on)st IDSS IBB VIN(1) VIN(0) IIN Vhys PWM change to source on tpd tCOD tBLANKdc tBLANKst VREFx IREF VERR Operating VREF = 1.5 VREF = 1.5, phase current = 100% VREF = 1.5, phase current = 67% VREF = 1.5, phase current = 33% PWM change to source off PWM change to sink on PWM change to sink off VIN = 0 to 5 V Source driver, IOUT = -1. A, TJ = 5C Sink driver, IOUT = 1. A, TJ = 5C Sink driver, IOUT = 1. A, TJ = 5C IOUT = 1. A Outputs, VOUT = 0 to VBB IOUT = 0 mA, outputs on, PWM = 50 kHz, DC = 50% Source driver, IOUT = -1. A, TJ = 5C Test Conditions Min. 8.0 3.0 - - - - - - -0 - 0.7xVDD - -0 150 350 35 350 35 300 .5 0.7 0.0 - -5 -5 -15 7.3 400 VDD rising .65 75 155 - Typ. - - 7 350 350 700 700 - - - - - <1.0 300 550 - 550 - 45 3. 1 - - - - - 7.6 500 .8 105 165 15 Max. 36 5.5 10 450 450 800 800 1. 0 8 - 0.3xVDD 0 500 1000 300 1000 50 1000 4 1.3 1.5 1 5 5 15 7.9 600 .95 15 175 - Units V V mA m m m m V A mA V V A mV ns ns ns ns ns s s V A % % % V mV V mV C C
ELECTRICAL CHARACTERISTICS1, valid at TA = 25 C, VBB = 36 V, unless otherwise noted Load Supply Voltage Range Logic Supply Voltage Range VDD Supply Current Output On Resistance (dc motor driver) Output On Resistance (stepper motor driver) Vf , Outputs Output Leakage VBB Supply Current Control Logic Logic Input Voltage Logic Input Current Input Hysteresis Operating Operating
Propagation Delay Times
Crossover Delay Blank Time (dc motor driver) Blank Time (stepper motor driver) VREFx Pin Input Voltage Range VREFx Pin Reference Input Current Current Trip-Level Error3 Protection Circuits VBB UVLO Threshold VBB Hysteresis VDD UVLO Threshold VDD Hysteresis Thermal Shutdown Temperature Thermal Shutdown Hysteresis
1For Typical
VUV(VBB) VUV(VBB)hys VUV(VDD) VUV(VDD)hys TJTSD TJTSDhys
VBB rising
input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within the specified maximum and minimum limits. 3V ERR = [(VREF/3) - VSENSE] / (VREF/3). DC Control Logic PHASE ENABLE MODE OUTA OUTB Function 1 1 1 H L Forward (slow decay SR) 1 1 0 H L Forward (fast decay SR) 0 1 1 L H Reverse (slow decay SR) 0 1 0 L H Reverse (fast decay SR) X 0 1 L L Brake (slow decay SR) 1 0 0 L H Fast decay SR* 0 0 0 H L Fast decay SR* * To prevent reversal of current during fast decay SR - the outputs will go to the high impedance state as the current gets near zero.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
Functional Description
Device Operation The A3989 is designed to operate one
dc motor and one bipolar stepper motor. The currents in each of the full bridges, all N-channel DMOS, are regulated with fixed off-time pulse width modulated (PWM) control circuitry. The peak current in each full bridge is set by the value of an external current sense resistor, RSx , and a reference voltage, VREFx . If the logic inputs are pulled up to VDD, it is good practice to use a high value pullup resistor in order to limit current to the logic inputs should an overvoltage event occur. Logic inputs include: PHASEx, I0x, I1x, ENABLE, and MODE.
Blanking This function blanks the output of the current sense
comparator when the outputs are switched by the internal current control circuitry. The comparator output is blanked to prevent false detections of overcurrent conditions, due to reverse recovery currents of the clamp diodes, or to switching transients related to the capacitance of the load. Dc motors require more blank time than stepper motors. The stepper driver blank time, tBLANKst , is approximately 1 s. The dc driver blank time, tBLANKdc , is approximately 3 s.
Control Logic Stepper motor communication is implemented
Internal PWM Current Control Each full-bridge is
controlled by a fixed off-time PWM current control circuit that limits the load current to a user-specified value, ITRIP . Initially, a diagonal pair of source and sink DMOS outputs are enabled and current flows through the motor winding and RSx. When the voltage across the current sense resistor equals the voltage on the VREFx pin, the current sense comparator resets the PWM latch, which turns off the source driver. The maximum value of current limiting is set by the selection of RS and the voltage at the VREF input with a transconductance function approximated by: ITripMax = VREF / (3xRS)
via industry standard I1, I0, and PHASE interface. This communication logic allows for full, half, and quarter step modes. Each bridge also has an independent VREF input so higher resolution step modes can be programmed by dynamically changing the voltage on the corresponding VREFx pin. The dc motor is controlled using standard PHASE, ENABLE communication. Fast or slow current decay during the off-time is selected via the MODE pin.
Charge Pump (CP1 and CP2) The charge pump is used to
The stepper motor outputs will define each current step as a percentage of the maximum current, ITripMax. The actual current at Shutdown In the event of a fault (excessive junction temperature, or low voltage on VCP), the outputs of the device are each step ITrip is approximated by: disabled until the fault condition is removed. At power-up, the ITrip = (% ITripMax / 100) ITripMax undervoltage lockout (UVLO) circuit disables the drivers. where % ITripMax is given in the Step Sequencing table. Synchronous Rectification When a PWM-off cycle is Note: It is critical to ensure that the maximum rating of 500 mV triggered by an internal fixed off-time cycle, load current will on each SENSEx pin is not exceeded. recirculate. The A3989 synchronous rectification feature will turn on the appropriate MOSFETs during the current decay. This Fixed Off-Time The internal PWM current control circuitry effectively shorts the body diode with the low RDS(on) driver. This uses a one shot circuit to control the time the drivers remain off. The one shot off-time, toff , is internally set to 30 s. significantly lowers power dissipation. When a zero current level
generate a gate supply greater than the VBB in order to drive the source-side DMOS gates. A 0.1 F ceramic capacitor should be connected between CP1 and CP2 for pumping purposes. A 0.1 F ceramic capacitor is required between VCP and VBBx to act as a reservoir to operate the high-side DMOS devices.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
is detected, synchronous rectification is turned off to prevent reversal of the load current.
MODE Control input MODE is used to toggle between fast
Mixed Decay Operation The stepper driver operates in
mixed decay mode. Referring to figure 2, as the trip point is reached, the device goes into fast decay mode for 30.1% of the fixed off-time period. After this fast decay portion, tFD , the device switches to slow decay mode for the remainder of the off-time. The dc driver decay mode is determined by the MODE pin. During transitions from fast decay to slow decay, the drivers are forced off for approximately 600 ns. This feature is added to prevent shoot-through in the bridge. As shown in figure 2, during this "dead time" portion, synchronous rectification is not active, and the device operates in fast decay and slow decay only.
VPHASE
decay mode and slow decay mode for the dc driver. A logic high puts the device in slow decay mode. Synchronous rectification is always enabled when ENABLE is low.
Braking Driving the device in slow decay mode via the MODE
pin and applying an ENABLE chop command implements the Braking function. Because it is possible to drive current in both directions through the DMOS switches, this configuration effectively shorts the motor-generated BEMF as long as the ENABLE chop mode is asserted. The maximum current can be approximated by VBEMF/RL. Care should be taken to ensure that the maximum ratings of the device are not exceeded in worst case braking situations: high speed and high inertia loads.
+ IOUT See Enlargement A 0
-
Enlargement A
Fixed Off-Time 30 s 9 s 21 s
ITrip
IOUT
FDSR FDDT SDDT
SDSR SDDT
Figure . Mixed Decay Mode Operation
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
Step Sequencing Diagrams
100.0 66.7 100.0
66.7
Phase 1 (%)
0
Phase 1 (%)
0
-66.7 -100.0
-66.7
-100.0
100.0 66.7
100.0
66.7
Phase 2 (%)
0
Phase 2 (%)
0
-66.7 -100.0
-66.7
-100.0
Full step 2 phase Modified full step 2 phase
Half step 2 phase Modified half step 2 phase
Figure 3. Step Sequencing for Full-Step Increments.
Figure 4. Step Sequencing for Half-Step Increments.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
100.0 66.7 33.3
Bipolar Stepper and High Current DC Motor Driver
Phase 1 (%)
0 -33.3 -66.7 -100.0
100.0 66.7 33.3
Phase 2 (%)
0 -33.3 -66.7 -100.0
Figure 5. Decay Modes for Quarter-Step Increments
Step Sequencing Settings
Full 1/ 1 1/4 Phase 1 (%ITripMax) 0 33 66*/100 100 100 100 66*/100 33 0 33 66*/100 100 100 100 66*/100 33 I0x H L H L L L H L H L H L L L H L I1x H H L*/H L L L L*/H H H H L*/H L L L L*/H H PHASE x 1 1 1 1 1 1 1 x 0 0 0 0 0 0 0 1 1 3 4 3 5 6 4 7 8 5 9 10 3 6 11 1 7 13 14 4 8 15 16 * Denotes modified step mode
Phase (%ITripMax) 100 100 66*/100 33 0 33 66*/100 100 100 100 66*/100 33 0 33 66*/100 100
I0x L L H L H L H L L L H L H L H L
I1x L L L*/H H H H L*/H L L L L*/H H H H L*/H L
PHASE 1 1 1 1 X 0 0 0 0 0 0 0 X 1 1 1
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
Logic Timing Diagram, DC Driver
ENB
PH
MODE VBB
OUTA
0V
VBB
OUTB
0V
IOUT
0A
A
1
2
3
4
5
6
7
8
9
VBB 15 6 OutA 3 24 OutB OutA 8
VBB
7 OutB
9
A
Charge Pump and VREG Power-up Delay ( 200 s)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
Applications Information
Motor Configurations For applications that require either dual
dc or dual stepper motors, Allegro offers the A3988 and A3995. Both devices are offered in a 36 pin QFN package. Please refer to the Allegro website for further information and datasheets for the devices.
in the diagram below, illustrates how to create a star ground under the device, to serve both as low impedance ground point and thermal path. The two input capacitors should be placed in parallel, and as close to the device supply pins as possible. The ceramic capacitor should be closer to the pins than the bulk capacitor. This is necessary because the ceramic capacitor will be responsible for delivering the high frequency current components.
Layout The printed circuit board should use a heavy ground-
plane. For optimum electrical and thermal performance, the A3989 must be soldered directly onto the board. On the underside of the A3989 package is an exposed pad, which provides a path for enhanced thermal dissipation. The thermal pad should be soldered directly to an exposed surface on the PCB. Thermal vias are used to transfer heat to other layers of the PCB.
Sense Pins The sense resistors, RSx, should have a very
Grounding In order to minimize the effects of ground bounce
and offset issues, it is important to have a low impedance singlepoint ground, known as a star ground, located very close to the device. By making the connection between the exposed thermal pad and the groundplane directly under the A3989, that area becomes an ideal location for a star ground point. A low impedance ground will prevent ground bounce during high current operation and ensure that the supply voltage remains stable at the input terminal. The recommended PCB layout shown
VBB CVCP GND RS1 OUT1A OUT1B U1 OUT3B GND CCP
low impedance path to ground, because they must carry a large current while supporting very accurate voltage measurements by the current sense comparators. Long ground traces will cause additional voltage drops, adversely affecting the ability of the comparators to accurately measure the current in the windings. As shown in the layout below, the SENSEx pins have very short traces to the RSx resistors and very thick, low impedance traces directly to the star ground underneath the device. If possible, there should be no other components on the sense circuits. Note: When selecting a value for the sense resistors, be sure not to exceed the maximum voltage on the SENSEx pins of 500 mV.
VBB CVCP CCP CIN3
ENABLE
VCP
CP2
CP1
GND
I02
I01
I11
RS3
1
NC
OUT1A
RS1 CIN1
SENSE1 OUT1B VBB OUT2B SENSE2 OUT2A NC PHASE3
A3989
PAD
OUT3A SENSE3 OUT3B VBB OUT3B SENSE3 OUT3A NC PHASE2 PHASE1
I12 MODE
CIN3
RS3 CIN2
CIN1 OUT2B OUT2A RS2 CVDD1 GND VDD CVDD2
CIN2
RS2
VREF1
VREF2
VREF3
OUT3A
CVDD1 CVDD2
Figure 5. Printed circuit board layout with typical application circuit, shown at right. The copper area directly under the A3989 (U1) is soldered to the exposed thermal pad on the underside of the device. The thermal vias serve also as electrical vias, connecting it to the ground plane on the other side of the PCB , so the two copper areas together form the star ground.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
GND
VDD
NC
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A3989
Bipolar Stepper and High Current DC Motor Driver
Pin-out Diagram
25 SENSE3
21 SENSE3
26 OUT3A
24 OUT3B
22 OUT3B
20 OUT3A
27 MODE
23 VBB
19 NC
I12 28 I11 29 GND 30 VCP 31 CP1 32 CP2 33 I01 34 I02 35 ENABLE 36 1 2 3 4 5 6 7 8 9 PAD
18 17 16 15 14 13 12 11 10
PHASE1 PHASE2 GND NC VREF3 VREF2 VREF1 VDD PHASE3
OUT1A
OUT1B
SENSE1
OUT2B
SENSE2
OUT2A
VBB
NC
Terminal List Table
Number 1 3 4 5 6 7 8 9 10 11 1 13 14 15 16 17 18 19 0 1 3 4 5 6 7 8 9 30 31 3 33 34 35 36 - Name NC OUT1A SENSE1 OUT1B VBB OUTB SENSE OUTA NC PHASE3 VDD VREF1 VREF VREF3 NC GND PHASE PHASE1 NC OUT3A SENSE3 OUT3B VBB OUT3B SENSE3 OUT3A MODE I1 I11 GND VCP CP1 CP I01 I0 ENABLE PAD Description No Connect DMOS Full Bridge 1 Output A Sense Resistor Terminal for Bridge 1 DMOS Full Bridge 1 Output B Load Supply Voltage DMOS Full Bridge Output B Sense Resistor Terminal for Bridge DMOS Full Bridge Output A No Connect Control Input Logic Supply Voltage Analog Input Analog Input Analog Input No Connect Ground Control Input Control Input No Connect DMOS Full Bridge 3 Output A Sense Resistor Terminal for Bridge 3 DMOS Full Bridge 3 Output B Load Supply Voltage DMOS Full Bridge 3 Output A Sense Resistor Terminal for Bridge 3 DMOS Full Bridge 3 Output B Control Input Control Input Control Input Ground Reservoir Capacitor Terminal Charge Pump Capacitor Terminal Charge Pump Capacitor Terminal Control Input Control Input Control Input Exposed pad for enhanced thermal performance. Should be soldered to the PCB
NC
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3989
Bipolar Stepper and High Current DC Motor Driver
EV Package, 36 Pin QFN with Exposed Thermal Pad
Preliminary dimensions, for reference only (reference JEDEC MO-220VJJD-1, except exposed thermal pad) Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 QFN50P600X600X100-37V1M); adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
6.15 .242 5.85 .230 36 A
A B
1 2
6.15 .242 5.85 .230
36X 0.08 [.003] C 36X 0.30 .012 0.18 .007 0.10 [.004] M C A B 0.05 [.002] M C 0.50 .020 0.75 .030 0.35 .014
SEATING PLANE 1.00 .039 0.80 .031 0.20 .008 REF 0.05 .002 0.00 .000
C
0.25 .010 NOM 1.15 .045 NOM 1 2 4X0.20 .008 MIN 36
32X0.20 .008 MIN 0.50 .020 NOM
C 4.15 .163 NOM
5.8 .228 NOM R0.30 .012 REF 2 1 36 4.15 .163 NOM
4.15 .163 NOM
4X0.20 .008 MIN
4.15 .163 NOM 5.8 .228 NOM
The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copyright(c) 2006 AllegroMicrosystems, Inc.
For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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