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Product Specification PE926C31 Product Description The PE926C31 is a high performance monolithic CMOS RS-422 line driver. Its operating supply range is 3.0 to 3.6 V, with an output signal overvoltage range of 0 - 6 V. The PE26C31 offers higher speed and lower power than other RS-422 driver types. It is packaged in a flat pack and is ideal for space applications. The PE926C31 is manufactured in Peregrine's patented Ultra Thin Silicon (UTSi(R)) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Quad RS-422 Differential Line Driver Radiation Hardened Features * High-speed operation: < 10 nS typical * Low power: < 150 uA typical (unloaded) * 3.3 V operation * Standard packaging: 16-lead flat pack * SEL Immune UTSi CMOS-on-sapphire * SEU <10-10 errors / bit-day * 300 Krad Total Dose Figure 1. Package Drawing Document No. 70-0157-01 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 PE926C31 Product Specification Figure 2. Pin Configuration (Top View) A AQ+ AQE+ BQBQ+ B V1 2 3 4 5 6 7 8 16 15 14 V+ D Table 2. Recommended Operating Conditions Symbol V+ TOP VIN Parameter/Conditions Supply voltage Operating temperature range Maximum input voltage Maximum output voltage Maximum output current Min 3.0 -55 0 0 -50 Max 3.6 125 Vdd Vdd 50 Units V C V V mA DQ+ DQE- VOUT IOUT PE926C31 13 12 11 10 9 Electrostatic Discharge (ESD) Precautions CQCQ+ C When handling this UTSi device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 2. Latch-Up Avoidance Table 1. Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name A AQ+ AQE+ BQBQ+ B VC CQ+ CQEDQDQ+ D V+ Description Channel A Input Channel A Noninverting Ouput Channel A Inverting Output Enable, active high Channel B Inverting Output Channel B Noninverting Output Channel B Input Ground Pin Channel C Input Channel C Noninverting Output Channel C Inverting Ouput Enable, active low Channel D Inverting Output Channel D Noninverting Output Channel D Input Supply Pin Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Device Functional Considerations The PE926C31 operates at high switching speeds. In order to obtain maximum performance, it is crucial that pin 16 be supplied with a bypass capacitor to ground (pin 8). Table 3. Truth Table E+ L H X H X EH X L X L Data X L Q+ Z L QZ H H H L (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7 Document No. 70-0157-01 UltraCMOSTM RFIC Solutions PE926C31 Product Specification Table 4. Electrical Specifications -55 C < Tcase < 125 C, 3.0 V < V+ < 3.6 V, PreRad, unless otherwise specified Param VD1 VD2 DVD2 VCM DVCM IOZH IOZL IOSC IOFFH IOFFL VOH VOL VIH VIL IIH IIL VIKL VIKH ICC Description Output Differential Voltage Output Differential Voltage Output Differential Voltage Change Common Mode Voltage Common Mode Voltage Change Tristate Output Leakage (H) Tristate Output Leakage (L) Output Short Circuit Current Output Leakage Current (H) Output Leakage Current (L) Output High Voltage Output Low Voltage Input threshold H Input Threshold L Input Lkg Current Input Lkg Current Input Clamp Diode Voltage Input Clamp Diode Voltage Supply Current Conditions No load RL=100 , Fig DC1 IOUT 0 - 20mA, Fig DC1 RL=100 , Fig DC1 RL=100 , Fig DC1 VOUT = V+, disabled VOUT = 0.0 V, disabled VOUT = 0.0 V, Enabled Q=H VOUT=6.0V,V+ and all inputs = 0.0V VOUT=-0.25V,V+ and all inputs = 0.0V Iout=-20mA Iout=20mA Vdd=3.6V (VIHMIN=0.7*VDD) Vdd=3.0V (VILMAX=0.3*VDD) Pin(s) AQ+, AQ-, BQ+, BQ-, CQ+, CQ-, DQ+, DQ- Min (V+) -0.3 1.9 -0.4 Typ (V+) 2.3 0 1.5 Max (V+) +0.6 Units V V 0.4 2.0 0.4 V V V uA -0.4 -5 0 -0.1 0.1 5 -100 100 uA mA uA uA V -30 -70 1 -100 2.0 -1 2.4 0.1 0.5 V V A, B, C, D, E+, EA, B, C, D, E+, EA, B, C, D, E+, EA, B, C, D, E+, E- 2.5 0.9 -1 -1 -1.5 (V+) + 1.5 V 120 uA 150 uA 1 1 V uA uA IIN=-20 mA IIN=20 mA No load, Inputs = 0 V or V+ A, B, C, D, E+, EA, B, C, D, E+, EV+ Notes: 1. "Line" pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs 2. "Digital Input" or "Enable" pins refer to E+, E3. "Digital Input" pins refer to A, B, C, D Document No. 70-0157-01 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 7 PE926C31 Product Specification Table 5. Post-Irradiation DC Electrical Specifications Tcase = 25 C, 3.0 V < V+ < 3.6 V, 300 KRad, unless otherwise specified Param VD1 VD2 DVD2 VCM DVCM IOZH IOZL IOSC IOFFH IOFFL VOH VOL VIH VIL IIH IIL VIKL VIKH ICC Description Output Differential Voltage Output Differential Voltage Output Differential Voltage Change Common Mode Voltage Common Mode Voltage Change Tristate Output Leakage (H) Tristate Output Leakage (L) Output Short Circuit Current Output Leakage Current (H) Output Leakage Current (L) Output High Voltage Output Low Voltage Input threshold H Input Threshold L Input Lkg Current Input Lkg Current Input Clamp Diode Voltage Input Clamp Diode Voltage Supply Current Conditions No load RL=100 , Fig DC1 IOUT 0 - 20mA, Fig DC1 RL=100 , Fig DC1 RL=100 , Fig DC1 VOUT = V+, disabled VOUT = 0.0 V, disabled VOUT = 0.0 V, Enabled Q=H VOUT=6.0V,V+ and all inputs = 0.0V VOUT=-0.25V,V+ and all inputs = 0.0V Iout=-20mA Iout=20mA Vdd=3.6V (VIHMIN=0.7*VDD) Vdd=3.0V (VILMAX=0.3*VDD) Pin(s) AQ+, AQ-, BQ+, BQ-, CQ+, CQ-, DQ+, DQ- Min (V+) -0.3 1.9 -0.4 Typ (V+) 2.3 0 1.5 Max (V+) +0.6 Units V V 0.4 2.0 0.4 V V V uA -0.4 -5 0 -0.1 0.1 5 -100 100 uA mA uA uA V -30 -70 1 -100 2.0 -1 2.4 0.1 0.5 V V A, B, C, D, E+, EA, B, C, D, E+, EA, B, C, D, E+, EA, B, C, D, E+, E- 2.5 0.9 -1 -1 -1.5 (V+) + 1.5 V 120 uA 150 uA 1 1 V uA uA IIN=-20 mA IIN=20 mA No load, Inputs = 0 V or V+ A, B, C, D, E+, EA, B, C, D, E+, EV+ Notes: 1. "Line" pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs 2. "Digital Input" or "Enable" pins refer to E+, E3. "Digital Input" pins refer to A, B, C, D 4. Output Short Circuit not intended to imply continuous operation (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 7 Document No. 70-0157-01 UltraCMOSTM RFIC Solutions PE926C31 Product Specification Table 6. Pre-irradiation Electrical Specifications -55 C < Tcase < 125 C, 3.0 V < V+ < 3.6 V, PreRad, unless otherwise specified Param TPHL TPLH TSK1 TSK2* TRISE* TFALL* TPHZ TPZH TPLZ TPZL Description Prop Delay H-L Prop Delay H-L Prop Delay Q+/QProp Delay Skew Ch/Ch Rise Time 20%/80% Fall Time 20%/80% Prop Delay H-Z Prop Delay Z-H Prop Delay L-Z Prop Delay Z-L Conditions RL=100 CL=50 pF Pin(s) AQ+, AQ-, BQ+, BQ-, CQ+, CQ-, DQ+, DQ- Min 3 3 -3 -3 Typ 9 9 0 0 3 3 12 12 10 10 Max 15 15 3 3 10 10 20 20 20 20 Units nS nS nS nS nS nS nS nS nS nS Table 7. Post-irradiation Electrical Specifications 25 C, 3.0 V < V+ < 3.6 V, 300 KRad, unless otherwise specified Param TPHL TPLH TSK1 TSK2* TRISE* TFALL* TPHZ TPZH TPLZ TPZL Description Prop Delay H-L Prop Delay H-L Prop Delay Q+/QProp Delay Skew Ch/Ch Rise Time 20%/80% Fall Time 20%/80% Prop Delay H-Z Prop Delay Z-H Prop Delay L-Z Prop Delay Z-L Conditions RL=100 CL=50 pF Pin(s) AQ+, AQ-, BQ+, BQ-, CQ+, CQ-, DQ+, DQ- Min 3 3 -3 -3 Typ 9 9 0 0 3 3 20 20 10 10 Max 15 15 3 3 10 10 20 20 20 20 Units nS nS nS nS nS nS nS nS nS nS *Note: Guaranteed by design, not tested Document No. 70-0157-01 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7 PE926C31 Product Specification Figure 3. TPLH, TPHL Test Circuit Block Diagram TPLH, TPHL measured from input 50% to output 50% thresholds. TRISE, TFALL measured from output 20% to output 80% thresholds. 4,16 DC 2,6,10,14 8,12 1,7,9,15 VI 0.0 - (V+) + - I+ Q3,5,11,13 Q+ TPLH TPLH Figure 2 : TPLH, TPHL Q-, Q+ TRISE TFALL Figure 4. TPLZ, TPZL, TPHZ, TPZH Test Circuit Block Diagram 4 E+ 0 - (V+) 13 1,7,9,15 E(V+) - 0 VI DC L: 0.0 H: (V+) 16 DC V+ 3.3V 2,6,10,14 + 3,5,11,13 TPZH, TPZL measured from input 50% to output 50% thresholds. TPHZ, TPLZ measured from input 50% to output 10% thresholds. R 110 L EE+ CL 50pF Q+, QTPZH Q+, QTPZL TPLZ TPHZ Figure 3: TPHZ, TPZH, TPLZ, TPZL Table 8. Ordering Information Order Code 926C31-01 926C31-21 926C31-00 Part Marking PE926C31-01 PE926C31-21 PE926C31-EK Description Engineering Sample Flight Product, FP Evaluation Kit Package 16-lead FLAT PACK 16-lead FLAT PACK Evaluation Board 1/Box 25/Tray 1/Box Shipping Method (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 7 Document No. 70-0157-01 UltraCMOSTM RFIC Solutions PE926C31 Product Specification Sales Offices United States Peregrine Semiconductor Corp. 9450 Carroll Park Drive San Diego, CA 92121 Tel 1-858-731-9400 Fax 1-858-731-9499 Japan Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: 011-81-3-3502-5211 Fax: 011-81-3-3502-5213 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: 011- 33-1-47-41-91-73 Fax : 011-33-1-47-41-91-73 China Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: 011-86-21-5836-8276 Fax: 011-86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0157-01 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 7 |
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