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| AP2301N Advanced Power Electronics Corp. Simple Drive Requirement Small Package Outline Surface Mount Device S D P-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID -20V 130m - 2.6A Description SOT-23 G D The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, , low on-resistance and cost-effectiveness. The SOT-23 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters. G S Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1,2 3 3 Rating - 20 12 -2.6 -2.1 -10 1.38 0.01 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 90 Unit /W Data and specifications subject to change without notice 200407043 AP2301N Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance2 Test Conditions VGS=0V, ID=-250uA Min. -20 -0.5 - Typ. -0.1 4.4 5.2 1.36 0.6 5.2 9.7 19 29 295 170 65 Max. Units 130 190 -1 -10 100 10 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=-1mA RDS(ON) VGS=-5V, ID=-2.8A VGS=-2.8V, ID=-2.0A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=-250uA VDS=-5V, ID=-2.8A VDS=-20V, VGS=0V VDS=-16V, VGS=0V VGS=12V ID=-2.8A VDS=-6V VGS=-5V VDS=-15V ID=-1A RG=6,VGS=-10V RD=15 VGS=0V VDS=-6V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol IS ISM VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V , VS=-1.2V 1 Min. - Typ. - Max. Units -1 -10 -1.2 A A V Pulsed Source Current ( Body Diode ) Forward On Voltage 2 Tj=25, IS=-1.6A, VGS=0V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 270/W when mounted on min. copper pad. AP2301N 10 10 T A =25 C 8 o VGS= -5V VGS= -4V 8 T A =150 C o VGS= -5V VGS= -4V VGS= -3V -ID , Drain Current (A) VGS= -3V 6 -ID , Drain Current (A) 6 4 4 2 VGS= -2V VGS= -2V 2 0 0 1 2 3 4 5 6 0 0 1 2 3 4 5 6 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 800 1.8 1.6 600 I D = -2A T A =25 Normalized R DS(ON) 1.4 I D = -2.8A V GS = -5V RDS(ON) ( ) 400 1.2 1 200 0.8 0 0 2 4 6 8 10 0.6 -50 0 50 100 150 -V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance 10 1.5 -VGS(th) (V) 1 1.0 -IS(A) T j =150 o C 0 T j =25 o C 0.5 0 0.1 0.3 0.5 0.7 0.9 1.1 1.3 0.0 -50 0 50 100 150 -V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( C) o Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP2301N f=1.0MHz 5 1000 -VGS , Gate to Source Voltage (V) 4 I D =-2.8A V DS =-6V C iss C oss C (pF) 3 100 2 C rss 1 0 10 0 2 4 6 1 3 5 7 9 11 13 Q G , Total Gate Charge (nC) -V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (Rthja) Duty factor=0.5 0.2 10 0.1 0.1 0.05 -ID (A) 1ms 1 PDM 0.01 t T 10ms 100ms 0.01 Single Pulse Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 270/W 0.1 T A =25 C Single Pulse 0.01 0.1 1 10 1s DC 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG -5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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