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 (R)
VN808
OCTAL CHANNEL HIGH SIDE DRIVER
TYPE VN808
s s
RDS(on) 150 m
IOUT 0.7 A
VCC 45V
VCC/2 COMPATIBLE INPUT JUNCTION OVERTEMPERATURE PROTECTION s CASE OVERTEMPERATURE PROTECTION FOR THERMAL INDEPENDENCE OF THE CHANNELS s CURRENT LIMITATION s SHORTED LOAD PROTECTION s UNDERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT s COMPLIANCE TO 61000-4-4 IEC TEST UP TO 4.4KV (see application schematic page 7) DESCRIPTION The VN808 is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active current limitation combined with thermal shutdown and automatic restart, protect the device against overload. BLOCK DIAGRAM
PowerSO-36
ORDER CODES
PACKAGE TUBE VN808 T&R VN80813TR
PowerSO-36
In overload condition, channel turns off and back on automatically so as to maintain junction temperature between TTSD and TR. If this condition makes case temperature reach TCSD, overloaded channel is turned off and will restart only when case temperature has decreased down to TCR (see waveform 3 page 8). Non overloaded channels continue to operate normally. Device automatically turns off in case of ground pin disconnection. This device is especially suitable for industrial applications conform to IEC 1131 (Programmable Controllers International Standard).
V CC UNDERVOLTAGE DETECTION
VCC CLAMP
INPUT 1 GND INPUT 2 CLAMP POWER INPUT 3 OUTPUT 1 OUTPUT 2 INPUT 4 CURRENT LIMITER OUTPUT 3 INPUT 5
LOGIC
JUNCTION TEMP. DETECTION
Same structure for all channels
OUTPUT 4 OUTPUT 5 OUTPUT 6 OUTPUT 7
INPUT 6
INPUT 7 INPUT 8 STATUS CASE TEMP. DETECTION
OUTPUT 8
Rev. 2
July 2004 1/12
VN808
ABSOLUTE MAXIMUM RATING
Symbol VCC - IGND IOUT - IOUT IIN VIN VESD Ptot Lmax Tj Tc Tstg Parameter DC Supply voltage DC Ground pin reverse current TRAN Ground pin reverse current (pulse duration < 1ms) DC Output current Reverse DC output current DC Input current Input voltage range Electrostatic discharge (R=1.5K; C=100pF) Power dissipation TC=25C Max inductive load (VCC=24V, RLOAD=48, Tamb=100oC) Junction operating temperature Case operating temperature Storage temperature Value 45 - 250 -6 Internally Limited -2 +/- 10 -3/+VCC 2000 96 2 Internally Limited Internally Limited - 55 to 150 Unit V mA A A A mA V V W H C C C
PIN DEFINITIONS AND FUNCTIONS
Pin No TAB 1 2,3,4,5 6 7 8 9 10 11 12 13 14,15,16,17,18 19 20 21,22 23,24 25,26 27,28 29,30 31,32 33,34 35,36 Symbol VCC VCC NC INPUT 1 INPUT 2 INPUT 3 INPUT 4 INPUT 5 INPUT 6 INPUT 7 INPUT 8 NC GND STATUS OUTPUT 8 OUTPUT 7 OUTPUT 6 OUTPUT 5 OUTPUT 4 OUTPUT 3 OUTPUT 2 OUTPUT 1 Function Positive power supply voltage Positive power supply voltage Not connected Input of channel 1 Input of channel 2 Input of channel 3 Input of channel 4 Input of channel 5 Input of channel 6 Input of channel 7 Input of channel 8 Not connected Logic ground Common open source diagnostic for overtemperature High-Side output of channel 8 High-Side output of channel 7 High-Side output of channel 6 High-Side output of channel 5 High-Side output of channel 4 High-Side output of channel 3 High-Side output of channel 2 High-Side output of channel 1
2/12
VN808
CONNECTION DIAGRAM (TOP VIEW)
VCC N.C. N.C. N.C. N.C. INPUT 1 INPUT 2 INPUT 3 INPUT 4 INPUT 5 INPUT 6 INPUT 7 INPUT 8 N.C. N.C. N.C. N.C. N.C.
OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 OUTPUT 3 OUTPUT 3 OUTPUT 4 OUTPUT 4 OUTPUT 5 OUTPUT 5 OUTPUT 6 OUTPUT 6 OUTPUT 7 OUTPUT 7 OUTPUT 8 OUTPUT 8 STATUS GND
VCC
CURRENT AND VOLTAGE CONVENTIONS
ICC
IINn INPUTn ISTAT STATUS GND VINn VSTAT IGND
VCC OUTPUTn
IOUTn
VOUTn VCC
3/12
VN808
THERMAL DATA
Symbol Rthj-case Rthj-amb Parameter Thermal resistance junction-case Thermal resistance junction-ambient (*) Value Unit C/W C/W
Max Max
1.3 50
(*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 thick) connected to all TAB pins.
ELECTRICAL CHARACTERISTICS (10.5VSymbol VCC VUSD RON Parameter Operating supply voltage Undervoltage shut-down On state resistance IOUT =0.5A Off state; VCC=24V; Tcase=25C IS Supply current On state (all channels ON); VCC=24V; Tcase=100C VCC=VSTAT=VIN=VGND=24V VOUT =0V VIN=VOUT=0V VIN=0V, IOUT=0A (see Fig.1b: switching time waveforms) 0 Test Conditions Min 10.5 7 Typ Max 45 10.5 185 280 150 12 1 5 3 1 Unit V V m m A mA mA A V ms
IOUT =0.5A; Tj=25C
150
ILGND IL(off) VOUToff td(Vccon)
Output current at turn-off Off state output current Off state output voltage Power-on delay time from VCC rising edge
SWITCHING (V CC=24V)
Symbol ton toff dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on time Turn-off time Turn-on voltage slope Turn-off voltage slope Test Conditions RL=48 from 80% VOUT (**) RL=48 to 10% VOUT (**) RL=48 from VOUT=2.4V to VOUT=19.2V (**) RL=48 from VOUT=21.6V to VOUT=2.4V (**) Min Typ 50 75 0.7 1.5 Max 100 150 Unit s s V/s V/s
(**) see figure 1a: switching time waveforms
INPUT PIN
Symbol VINL IINL VINH IINH VI(hyst) IIN Parameter Input low level Low level input current Input high level High level input current Input hysteresis voltage Input current Test Conditions VIN=VCC/2 -1V VIN=VCC/2+1V VIN=VCC=32V Min 80 VCC/2+1 150 0.6 260 300 Typ Max VCC/2 -1 Unit V A V A V A
4/12
1
VN808
ELECTRICAL CHARACTERISTICS (continued) PROTECTIONS
Symbol TCSD
TCR TCHYST TTSD TR
Parameter Case shut-down temperature Case reset temperature Case thermal hysteresis Junction shut-down temperature Junction Reset
Test Conditions
Min
125 110 7 150
Typ
130
Max
135
Unit
C C C
15 175 200
C
135
7 0.7 15
THYST Ilim Vdemag
temperature Junction thermal hysteresis DC Short circuit current VCC=24V; RLOAD=10m Turn-off output clamp IOUT =0.5 A; L=6mH voltage
C
C A
1.7
VCC-47 VCC-52 VCC-57
V
STATUS PIN
Symbol IHSTAT
ILSTAT VCLSTAT
Parameter High level output current Leakage current Clamp voltage
Test Conditions Vcc=18...32V,RSTAT=1k
(Fault condition) Normal operation; VCC=32V ISTAT=1mA ISTAT= -1mA
Min
2
Typ
3
Max
4 0.1 8.0
Unit
mA
A
V V
6.0
6.8 -0.7
EQUIVALENT INTERNAL BLOCK DIAGRAM (same structure for all channels)
VCC
STATUS 6.8V 50V 110k INn 13 50V
52V OUTn
GND
5/12
2
VN808
APPLICATION EXAMPLE
Filter for bus inductance effect., make supply voltage stable and avoid undervoltage shut down EMC Filter Vcc24V - 28,2V IEC1132
Protection for IEC 801-5 Surge test suggested 1,5KE39xx
Optional protection for Vcc disconnection.
. . . ..
22F
.
100nF Vin1 Vin2 Vin3 Vin8
.
Imax 80A
.
.
Load 2 Load 3
c/2 Vc
m co
uts inp le tib pa
.
Load 1
10nF
VN808 Status
Load 8
Protection against IEC 801-6 Current injection Test
Status output current from 2 to 4 mA
RGND
10 protection against Vcc disconnection on Inductive loads
PROTECTIONS INCLUDED IN THE DEVICE: IEC 801-2 ESD Test better than 2000V Human body model IEC 801-4 Burst Test
Figure 1: Switching Time Waveforms Fig. 1a: Turn-on & Turn-off
ton VIN toff
t
VOUT
80%
dVOUT/dt(on) tr 10%
90%
dVOUT/dt(off) tf t
Fig. 1b: Vcc turn-on
VIN
t VCC
t VOUT td(Vccon)
t
6/12
VN808
TRUTH TABLE
CONDITIONS Normal operation Current limitation Overtemperature (see waveforms 3,4 page 9,10) --> Tj > TTSD Undervoltage INPUTn L H L H L H L H OUTPUTn L H L X L L L L STATUS L L L L L H X X
APPLICATION SCHEMATIC
+24V
VCC
22F
100nF
STATUS
36V
52V 6.8V
1k
50V 110k
OUTPUTn
50V 13
INPUTn
48
NOMINAL 500mA LOAD
GND
2H
VGND
RGND
10
7/12
VN808
Figure 2: Waveforms
1) NORMAL OPERATION VIN
VOUT VSTAT
2) UNDERVOLTAGE VCC
VIN
VOUT VSTAT
VUSDhyst VUSD
undefined
3) HARD SHORT CIRCUIT: Tj>TTSD
TTSD TR TCSD TCR
Tj1
TC
VIN1 IOUT1 VSTAT
VIN2
IOUT2
8/12
VN808
Waveforms (continued)
4) OVERLOAD CONDITION: TC>TCSD
TTSD TR TCSD TCR
Tj1
TC
VIN1 IOUT1 VSTAT
9/12
1
VN808
PowerSO-36 MECHANICAL DATA
DIM. A a1 a2 a3 b c D (1) D1 E E1 (1) E2 E3 e e3 G H h L N S mm. TYP inch TYP.
MIN. 0.10 0 0.22 0.23 15.80 9.40 13.90 10.90 5.80
MAX. 3.60 0.30 3.30 0.10 0.38 0.32 16.00 9.80 14.50 11.10 2.90 6.20
MIN. 0.004 0 0.008 0.009 0.622 0.370 0.547 0.429 0.228
MAX. 0.141 0.012 0.130 0.004 0.015 0.012 0.630 0.385 0.570 0.437 0.114 0.244
0.65 11.05 0 15.50 0.80 0.10 15.90 1.10 1.10 10 (max) 8 (max) 0 0.610 0.031
0.0256 0.435 0.004 0.626 0.043 0.043
(1): "D" and "E1" do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (0.006 inch) - Critical dimensions are "a3", "E" and "G".
0096119
10/12
VN808
REVISION HISTORY
Date Sep. 2003 Revision 1 Description of Changes - First issue - ORDER CODE table insertion (page 1) - EQUIVALENT INTERNAL BLOCK DIAGRAM of the APPLICATION
Jul. 2004
2
SCHEMATIC correction (page 7)
- Revision history table insertion (page 11)
11/12
1
VN808
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
12/12


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