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U7004B
DECT SiGe Front End IC
Description
The U7004B is a monolithic SiGe transmit/receive front end IC with power amplifier, internally 50- matched, low-noise amplifier and T/R switch driver. It is especially designed for operation in TDMA systems like DECT. Due to the ramp-control feature and a very low quiescent current an external switch transistor for VS is not required.
Electrostatic sensitive device. Observe precautions for handling.
Features
D Single 3-V supply voltage D High-power-added efficient power amplifier (Pout typ. 26.5 dBm) D Ramp-controlled output power D Low-noise preamplifier (NF typ. 1.8 dB) D Biasing for external PIN diode T/R switch D Current-saving standby mode D Few external components
Block Diagram
VS_PA V1_PA
PA PA_IN RAMP LNA LNA_IN TX/RX Standby control T/R Switch driver SWITCH_OUT V2_PA_OUT
LNA_OUT RX_ON
PU
R_SWITCH
14674
Figure 1. Block diagram
Ordering Information
Extended Type Number U7004B-MFS U7004B-MFSG3 SSO20 SSO20 Package Tube Taped and reeled Remarks
Rev. A6, 06-Sep-00
1 (9)
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Thermal Resistance
All voltages refer to GND (Pins 3, 5, 7, 8, 9, 11, 12 and 17)
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Absolute Maximum Ratings Pin Description
U7004B
2 (9) Junction ambient ESD protection according to ESD-S5.2-1994 Input power LNA Pin 4 Input power PA Pin 15 Storage temperature Junction temperature Burst duration PA Duty cycle PA Supply voltage
Pin 20 19 18 17 16 15 14 13 12 10 11 9 8 7 6 5 4 3 2 1 SWITCH_OUT V2_PA_OUT R_SWITCH LNA_OUT VS_LNA LNA_IN RX_ON Symbol VS_PA V1_PA RAMP PA_IN GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 PU Power-up active high RX active high Low-noise amplifier output Ground Supply-voltage input for low-noise amplifier Power amplifier input Power-ramping control input Supply voltage for power amplifier Ground Ground Inductor to power supply and matching network for power amplifier output Ground Ground Ground Inductor to power supply for power amplifier Ground Low-noise amplifier input Ground Switched current output for PIN diode Resistor to GND sets the PIN diode current
Parameter
Parameter
Pins 6, 10, 13 and 16 (no RF)
Function
SWITCH_OUT
V2_PA_OUT 10
Symbol
Symbol
PinLNA
R_SWITCH 1
RthJA
PinPA
Tstg
VS
Tj
LNA_IN
GND5
GND4
GND3
V1_PA 6
GND2 5
GND1 3
8
7
4
2
9
Figure 2. Pinning
-40 to +125
Class M1
Value
Value
+10
150
95
-5
50
5
5
Rev. A6, 06-Sep-00
17 18 19 11 12 13 14 15 20 16 VS_PA RAMP PA_IN VS_LNA LNA_OUT RX_ON PU GND6 GND7 GND8
K/W dBm dBm Unit Unit ms % V C C
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Note 1) Power amplifier shall be unconditional stable, maximum duty cycle 50%, maximum load mismatch and duration: load VSWR = 20:1 (all phases) 10 s, ZG = 50 W 2) With external matching network (see figures 13 and 14) Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25C, pulsed mode, duty cycle 4.17%, ton = 417 ms
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All voltages refer to GND (Pins 3, 5, 7, 8, 9, 11, 12 and 17). The following table represents the sum of all supply currents depending on the TX/RX mode. Power supply points are VS_LNA, VS_PA, V1_PA, V2_PA_OUT.
Rev. A6, 06-Sep-00
Electrical Characteristics
Operating Range
Switch-out current output
T/R-switch driver (current programmed by external resistor from R_SWITCH to GND)
Stability (non harmonic emission)
Max. input power
Harmonics @P 1dB
Output matching
Input matching
Saturated output power
Power-added efficiency
Ramping current
Ramping voltage
Gain-control range
Power gain
Frequency range
Standby current
Supply current
Supply voltage
Power amplifier
Ambient temperature
Standby current
Supply current
Supply voltage
Supply voltage
Parameter
2)
2)
1)
TX RX PU = 0
Pin 16
Pins 6, 10 and 13
Parameter
TX @ 33 kW
TX @ 1.2 kW
TX @ 100 W
RX
Standby
TX Pin 10 Pin = 2 dBm, VRAMP = 2 V VSWRout <10:1 (all phases)
TX
TX
TX
TX, referred to Pin 10
TX
TX, power gain (max) Pin 14
TX
TX
TX
Standby
RX (PA off)
TX
Test Conditions / Pins
Pins 6, 10 and 13
Pin 15 to Pin 10
Pin 15
Pin 10
Pin 10
Pin 15
Pin 2
Symbol
Tamb
IS_O_standby
VRAMP max
VS
VS
VSWRout
IS IS IS
VSWRin
IS_standby
IS_O_33k
IS_O_1k2
IS_O_100
IS_O_RX
Symbol
IRAMP
IS_RX
IS_TX
2 fo 3 fo PinPA
Gp
PAE
Psat
Gp
VS
f
Min.
-25
2.7
2.7
Min.
1.88
2.7
Typ.
+25
450 8 10
3.6
3.6
<2.0:1
<2.0:1
Typ.
26.5
-60
-30
450
0.5
2.1
3.6
10
10
30
48
28
3
1
U7004B
Max.
+70
4.6
4.6
Max.
1.94
2.0
4.6
10
10
2
2
Unit
mA mA mA
dBm
dBm
GHz
Unit
C
dBc
dBc
mA
mA
mA
mA
mA
A
A
A
A
V
V
dB
dB
%
3 (9) V V
U7004B
Electrical Characteristics (continued)
Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25C, pulsed mode, duty cycle 4.17%, ton = 417 ms
( dBm )
Pout
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Low-noise amplifier 3) Supply voltage Supply current All Pin 16 VS IS IS IS f 2.7 3.6 8 4.6 V RX mA mA mA dB dB Supply current (LNA and control logic) Standby current Frequency range Power gain Noise figure TX (control logic active) Pin 16 Standby Pin 16 RX RX RX RX RX RX 300 1 10 1.88 17 1.94 2.0 GHz Pin 4 to Pin 18 Gp 19 -7 NF 1.8 Gain compression Input matching RX, referred to Pin 18 P1dB IIP3 dBm dBm 3rd-order input interception point Output matching High input level Low input level High input current Low input current 3) -15 VSWRin <2:1 <2:1 VSWRout ViH ViL IiH IiL Logic input levels (RX_ON, PU) = `1' = `0' = `1' = `0' Pins 19 and 20 2.4 0 40 0 VS V V mA mA 0.5 Low-noise amplifier shall be unconditional stable
Parameter
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Control Logic
PU Power up Standby
30 20 VS_PA 10 0 -10 -20 0.0
14204
RX_ON RX mode TX mode 1 0
1 0
Input / Output Circuits
13
15 PA_IN
17 0.5 1.0 2.0 VRAMP ( V ) 1.5 2.5 3.0 GND1
14716
Figure 3. Output power vs. ramp voltage
Figure 4.
4 (9)
Rev. A6, 06-Sep-00
U7004B
Input / Output Circuits (continued)
13 VS_PA 16 VS_LNA
14 RAMP 4 7 GND7
14717
LNA_IN 3 GND1
14720
Figure 5.
16 6 V1_PA VS_LNA
Figure 8.
18 LNA_OUT
8 GND3
14718
5 GND2
14721
Figure 6.
Figure 9.
10 V2_PA_OUT
13 VS_PA
2 SWITCH_OUT 1 R_SWITCH 8 GND5
14719
17 GND8
14722
Figure 7.
Figure 10.
Rev. A6, 06-Sep-00
5 (9)
U7004B
Input / Output Circuits (continued)
16 VS_LNA 16 VS_LNA
19 RX_ON
20 PU
14723
14724
Figure 11.
Figure 12.
Typical Application Circuit
LNA_OUT PU RX_ON PA_IN RAMP PCB 20 19 18 17 16 SiGe FE U7004B 15 14 13 12 11
TX/RX standby control TX
LNA 1 2 3 4 5 6 PCB 7 8 9
PA 10 PCB
diel. BPF
VS PCB Microstripline /4
Antenna
14675
Figure 13. Typical schematic
6 (9)
Rev. A6, 06-Sep-00
U7004B
14203
Figure 14. U7004B application board schematic
LNA_OUT
PA_IN
RAMP
0R 100pF 100pF 0R 56pF 0R
2.7pF
0R 2.7nH 56pF 1nF
4.7mF RX_ON
56pF
PU SWITCH_ OUT VS_LNA
22nH
4.7mF 1.2pF 1.0pF 0R 56pF 0R 0R V1_PA VS_PA 2.7k 390 0R GND 0R LNA_IN V2_PA 0R 56pF 56pF 1nF 1nF 1mF 1mF 15nH GND
0R
Components:
- 3 Inductors (Pins 10,13,15) - 16 Capacitors - 1 Resistor (Pin 1)
PA
PA_OUT
14189
Figure 15. U7004B application board layout
Rev. A6, 06-Sep-00
LNA
7 (9)
U7004B
Package Information
Package SSO20
Dimensions in mm
6.75 6.50 5.7 5.3 4.5 4.3
1.30 0.25 0.65 20 5.85 11 0.15 0.05 0.15 6.6 6.3
technical drawings according to DIN specifications 13007
1
10
8 (9)
Rev. A6, 06-Sep-00
U7004B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
7.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.temic-semi.com
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
Rev. A6, 06-Sep-00
9 (9)

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