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16 Channel LVDS Driver/Receiver Evaluation Module
User's Guide
July 2000
AAP Data Transmission
SLLU013
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated
Trademarks
Preface
Read This First
About This Manual
This is the user's guide for the SN65LVDS387EVM and SN65LVDS386 evaluation modules (EVMs). It contains information on the evaluation modules (EVMs) for Texas Instruments' SN65LVDS387 16-channel LVDS driver and for the SN65LVDS386 16-channel LVDS receiver. Two separate EVMs are available, allowing each LVDS device to be tested individually using a single EVM for that device. If both EVMs are used, the LVDS output signals from the SN65LVDS387EVM 16-channel LVDS driver can be connected to the LVDS inputs of the 16-channel LVDS receiver on the SN65LVDS386EVM. This allows users to simulate performance of an LVDS system. Recommended test equipment and evaluation and interconnect guidelines are provided for both 16-channel point-to-point and multidrop configurations. The EVMs are CE compliant for distribution within the European Community.
How to Use This Manual
This document contains the following chapters:
- Chapter 1 - Introduction - Chapter 2 - The Evaluation Boards - Chapter 3 - Equipment Required - Chapter 4 - Operation - Appendix A - Parts List and Schematics
Trademarks
BergStick is a registered trademark of Berg Electronics. All other trademarks are the property of their respective owners.
Read This First
iii
Running Title--Attribute Reference
Contents
1 2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 The Evaluation Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 SN65LVDS387 16-Channel LVDS Line Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2 SN65LVDS386 16-Channel LVDS Line Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 Equipment Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Pattern Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Oscilloscope and Scope Probes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 SN65LVDS387 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 SN65LVDS386 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 System Evaluation Using Both the SN65LVDS387EVM and SN65LVDS386EVM . . . . 4.3.1 Point-to-Point Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3.2 Multidrop Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3-2 3-2 3-2 3-2 4-1 4-2 4-3 4-3 4-3 4-3 4-5
3
4
A
Parts List and Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 A.1 Parts List for EVMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 A.2 Schematic Diagrams 6420201 and 6420202 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Chapter Title--Attribute Reference
v
Running Title--Attribute Reference
Figures
2-1. 2-2. 2-3. 4-1. EVM Simplified I/O Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SN65LVDS387EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SN65LVDS386EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples of Multidrop Interconnections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2-4 2-6 4-4
vi
Chapter 1
Introduction
This is the user's guide for the evaluation modules (EVMs) for the Texas Instruments' SN65LVDS387EVM 16-channel LVDS driver EVM and the SN65LVDS386EVM 16-channel LVDS receiver EVM. One manual is used for both EVMs because the boards are similar for both devices. The EVMs are CE-compliant for distribution within the European Community. Low-voltage differential signaling (LVDS), as documented in TIA/EIA-644, is a balanced signaling method used for high-speed transmission of binary data over copper. It is well recognized that the benefits of balanced-data transmission begin to outweigh the cost advantages of single-ended techniques when signal-transition times approach 10 nS. This represents signaling rates approaching 30 Megabits per second (Mbps) Presently, LVDS devices operate with signaling rates in the hundreds of Mbps. This performance is achieved with reduced power consumption and reduced electromagnetic interference (EMI) emissions compared to other data transmission standards, such as TIA/EIA-422 and TIA/EIA-232 (also known as RS-232 and RS-422, respectively), PECL, etc. Note: To Designers
Both EVMs use the same printed-wiring board (PWB). The 387 device is mounted with the device's pin 1 facing the top of the PWB, and the 386 is mounted with the device's pin 1 facing the bottom of the PWB.
Introduction
1-1
Chapter 2
The Evaluation Boards
Each EVM consists of a six-layer printed-wiring board (PWB). The LVDS device and BergStickTM connectors are on the top (connector side) of the board. All other passive components are installed on the underside (component side) of the PWB. A simplified input/output (I/O) block diagram of the EVM is shown in Figure 2-1.
Topic
2.1 2.2
Page
SN65LVDS387 16-Channel LVDS Line Driver . . . . . . . . . . . . . . . . . . . . 2-3 SN65LVDS386 16-Channel LVDS Line Receiver . . . . . . . . . . . . . . . . . . 2-5
The Evaluation Boards
2-1
Figure 2-1. EVM Simplified I/O Block Diagram
LVTTL Input Connector VCC GND LVDS Output Connector LVTTL Output VCC GND Connector EN_A EN_A A1A 51 A1Y A1Z D4Y 100 D4B D4A LVDS Input Connector
A2A
A2Y A2Z
D3Y
D3B D3A
A3A
A3Y A3Z
D2Y
D2B D2A
A4A
A4Y A4Z LVDS Driver (1 of 4)
D1Y
D1B D1A
LVDS Receiver (1 of 4)
LVDS387EVM
LVDS386EVM
The SN65LVDS387EVM and the SN65LVDS386EVM are discussed in sections 2.1 and 2.2. Use of the schematics in Appendix A will facilitate understanding the detailed discussion that follows.
2-2
SN65LVDS387 16-Channel LVDS Line Driver
2.1 SN65LVDS387 16-Channel LVDS Line Driver
This 16-channel LVDS driver accepts 16 low-voltage TTL (LVTTL) inputs and generates 16 LVDS differential outputs (please refer to the schematic in Appendix I). Connectors P1/P2 are the LVTTL I/O connectors. Connectors P3 through P7 are the LVDS I/O connectors. The LVTTL inputs can be provided by any suitable source. As shipped, the SN65LVDS387EVM has 50- termination resistors (R33 through R48) installed on each LVTTL input line to accommodate inputs from a pattern generator or other instrumentation that has a 50- source impedance. If the LVTTL source and cable being used is not a 50- source, then these resistors (resistors R33 through R48) need to be removed. They are required to match the characteristic impedance of the cable (and the source impedance of most pattern generators). These resistors are located on the back (under) side of the SN65LVDS386EVM, next to the P1/P2 connector row. The other optional components are resistors R1 through R32. Resistors R1 through R16 are left open on the SN65LVDS387EVM. These are used in the LVDS output circuit and, since LVDS lines are normally terminated at the input to the receiver, these 100- resistors are not installed on the EVM. If users want to measure specific performance parameters on the '387, then they are responsible for installing 100-ohm resistors in R1 through R16. Zero-ohm resistors are installed in R17 through R32, which are in series with the LVTTL inputs to the SN65LVDS387. The remaining components are connectors for Vcc and Gnd connections, and decoupling capacitors for the LVDS device. These components are the same for both configurations of the EVM. There are also four jumpers (JMP1 through JMP4 ) located next to the P1/P2 connector row. These jumpers control the enable and disable for each fourchannel (quad) section of the device. Each of these jumpers consist of three pins and a jumper short. The center pin is connected to the device and the outer pins (top and bottom) are VCC and GND. The jumper short can be moved so contact is made between VCC and the enable/disable pin, or between GND and the enable/disable pin. As shipped, the four jumper shorts are installed to VCC so that all four sections of the device are enabled. A photograph of the SN65LVDS387EVM is shown is Figure 2-2.
The Evaluation Boards
2-3
SN65LVDS387 16-Channel LVDS Line Driver
Figure 2-2. SN65LVDS387EVM
LVTTL Input Pins GND Enable/Disable Jumpers LVDS VCC Output Pins
Connector (Top) Side
Component (Bottom) Side
2-4
SN65LVDS386 16-Channel LVDS Line Receiver
2.2 SN65LVDS386 16-Channel LVDS Line Receiver
The SN65LVDS386EVM accepts 16 LVDS inputs and generates 16 LVTTL outputs (refer to the schematic in Appendix I). Connectors P3 through P7 (right-side edge) accept the differential LVDS inputs and connector P1/P2 provides the LVTTL output signals. The as shipped configuration of the SN65LVDS386 EVM also contains external resistors required for basic operation and testing of the device. Resistors R1 through R16 are 100- resistors which terminate each LVDS input channel. These are installed on the underside of the SN65LVDS386EVM, very close to the input pins of the device. The LVTTL output-channels path (etch on the PWB) contains two pads where external resistors may be installed. Resistors R17 through R32 are series resistors where zero-ohm resistors are normally installed. These are followed by resistors R33 through R48, which allow a pull-down resistor to be installed after the series resistor (R17 through R32). As shipped, these pull-down resistors are not installed. The combination of these series (R17 through R32) and pull-down resistors (R 33 through R48) allow the user to install a divider network if desired. This might be necessary if the outputs are to be measured with an instrument having a 50- input impedance. By installing a 475- series resistor and a 50- pull down resistor, a 20:1 divider is created (the 50- pulldown in parallel with the 50- input impedance equals 25 , plus the 475- series impedance of the instrument, for a total load of 500 on the output of the receiver). As shipped, there is no resistor divider installed, and each device LVTTL output is routed directly to the P1/P2 connectors through a 0- resistor (R17 through R32). The remaining components are connectors for VCC and GND connections, and decoupling capacitors for the LVDS device (these components are the same for both EVM configurations). There are also four jumpers (JMP1 through JMP4 ) located next to the P1/P2 connector row. These jumpers control the enable/disable for each four-channel (quad) section of the device. Each of these jumpers consist of three pins and a jumper short. The center pin is connected to the device and the outer pins (top and bottom) are VCC and GND. The jumper short can be moved so contact is made between VCC and the enable/disable pin, or between GND and the enable/disable pin. As shipped, the jumper shorts are installed to VCC so that all four sections of the device are enabled.
The Evaluation Boards
2-5
SN65LVDS386 16-Channel LVDS Line Receiver
Figure 2-3. SN65LVDS386EVM
LVTTL Output Pins GND Enable/Disable Jumpers VCC LVDS Input Pins
Connector (Top) Side
Component (Bottom) Side
2-6
Chapter 3
Equipment Required
This chapter provides guidance for selecting the test equipment required to use the EVM.
Topic
3.1 3.2 3.3 3.4
Page
Pattern Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Oscilloscope and Scope Probes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Equipment Required
3-1
Pattern Generator
3.1 Pattern Generator
The SN65LVDS387 EVM requires a signal or pattern generator that can provide at least one LVTTL input signal to the device. The LVTTL signal levels provided to the SN65LVDS387EVM must have a VIH = 2 Vdc minimum. Sixteen simultaneous LVTTL inputs are required to fully exercise the device, so a pattern generator with 16 parallel LVTTL outputs and a signaling-rate range up to several hundred megabits-per-second (Mbps) is suggested. The Tektronix HFS-series of pattern generators, or equivalent, can be used to provide the LVTTL inputs signals. HFS-9DG1 plug-in cards are recommended as they can be used to provide both single-ended inputs for the SN65LVDS387 driver and differential inputs for the SN65LVDS386 receiver.
3.2 Oscilloscope and Scope Probes
The signaling rates and LVDS signal transitions are very fast (less than 1 nS). To adequately monitor these signals will require an oscilloscope with a minimum bandwidth of 1 GHz. The probes need to have a similar bandwidth to prevent significant measurement errors. A Tektronix 784C oscilloscope with P6243 or P6245 single-ended probes, and P6247 differential probes, or equivalent, is suggested.
3.3 Power Supply
A single-output dc power supply is required to provide Vcc and Gnd to the EVM. This supply is connected to J1 (Vcc) and J2 (GND) on the EVM. An adjustable dc range of 2-4 Vdc and a current of 200 mA dc is required. When testing both the SN65LVDS387EVM and SN65LVDS386EVM together as a system, either a single 500-mA dc-supply can be used, or two separate power supplies may be used so performance with different Vcc levels on each EVM may be evaluated.
3.4 Cables
There are no cables provided with either the SN65LVDS387EVM or the SN65LVDS386EVM. When evaluating either the SN65LVDS387EVM or SN65LVDS386EVM separately, the only cables required are those connecting the input signal source to the input of the EVM. When connecting the SN65LVDS387EVM to the SN65LVDS386EVM to perform system tests, users may evaluate system performance using different types and lengths of cabling. This is done by inserting the bare conductor into the LVDS connectors between the two EVMs (the conductors have to be exposed by removing approximately 1 to 1.5 centimeters of insulation from each conductor). It is recommended to select a cable with a characteristic impedance (Zo) of 100 (10%). Any cable which meets the requirements of EIA-568A Category 5 (CAT5) is recommended.
3-2
Chapter 4
Operation
The SN65LVDS386 and SN65LVDS387 EVMs provide easy I/O connections for instrumentation. This makes device testing quick and easy. Individual channels can be tested and parameters evaluated for specific applications. In addition, the EVMs are small and compact to allow the entire PWB to be placed in a small temperature chamber. Also, the I/O connectors and enable jumpers are located away from the device, and all external resistors are located on the opposite side of the EVM. This also allows the use of a forced-air temperature controller (such as a Thermostream, or a Temptronics system). The user will notice that the boards are designed such that the LVTTL I/O connections are made on the left side of the EVM (P1 and P2) and the LVDS I/O connections are made on the right side of each EVM (P3).
Topic
4.1 4.2 4.3 4.4
Page
LVDS387 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 LVDS386 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 System Evaluation Using Both the SN65LVDS387EVM and SN65LVDS386EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Operation
4-1
SN65LVDS387EVM Operation
4.1 SN65LVDS387EVM Operation
The SN65LVDS387EVM is ready to be used as shipped. When connected to the test instrumentation and 3.3-Vdc power (as described in section 3), performance can be tested and observed. All I/O connections are made using standard BergSticksTM that allow fast and easy connections. These also allow direct connections to oscilloscope probes. BergSticksTM are also used for the enable/disable jumper posts to provide easy connection to external equipment if device response to enable/disable is required. The jumper shorts can be manually placed in either the VCC position (enabled) or the GND position (disabled), or the jumper post can be removed to allow connection to external equipment. Note that there is no 50- termination onboard for the enable/disable pins. Basic tests of the SN65LVDS387 driver will consist of applying an LVTTL signal pattern to the P1/P2 input connector and monitoring the output of the driver. When tested as a stand-alone device, 100- termination resistors can be added to the scope probe, or individual 100- termination resistors can be installed on the board (backside of the SN65LVDS387EVM) at R1 through R16. The scope termination is recommended for high-signaling rates to eliminate the stub effects caused by the PWB traces running to the P3 connector. The input pins on connectors P1 and P2 stagger the input and ground pins row to row. This is done to minimize channel-to-channel crosstalk and interference between input channels. If an LVDS channel is not responding, check to make sure the input connection has not been inverted.
4-2
SN65LVDS386EVM Operation
4.2 SN65LVDS386EVM Operation
Like the SN65LVDS387EVM, the SN65LVDS386EVM is shipped with all required components already installed on the board, and is ready for testing. For the LVDS386, differential inputs need to be provided to simulate the differential output-voltage levels (Vod is nominally 400 mV) and common-mode outputvoltage inputs (nominally 1.2 Vdc) of an LVDS driver. These inputs are easily connected to the right edge P3-P7 LVDS side of the SN65LVDS386EVM. The LVTTL output signals can be monitored using a scope probe connected directly to the P1/P2 connector pin. As shipped, each LVDS input channel is terminated with 100- resistors (R1 through R16) across the receiver inputs. These resistors are located on the backside of the EVM near the input pins of the device. Each LVTTL output pin is routed directly to the P1/P2 connector row. There are provisions on the SN65LVDS386EVM to install a series resistor and a pulldown resistor. This allows users to install a resistor divider on the output if required for testing the device. But, as shipped, the series resistors (R17 through R32) have zero-ohm resistors installed, and the pulldown resistors (R33 through R48) have no components installed.
4.3 System Evaluation Using Both the SN65LVDS387EVM and SN65LVDS386EVM
These EVMs has been designed to allow performance evaluation of both devices when connected together. This allows users to perform tests using the specific type and length of cable between the SN65LVDS387EVM and the SN65LVDS386EVM. Users also has the option to install any specific connectors and to use jumper wires to the BergStickTM connectors. However, it is recommended that any jumper wires be kept as short as possible to minimize their effect on system performance.
4.3.1
Point-to-Point Configuration
The majority of applications will have the outputs of the SN65LVDS387 driver connected directly to an SN65LVDS386 receiver. This point-to-point configuration can be used to perform higher-level system monitoring, such as channel-to-channel skew, crosstalk, and peak-to-peak jitter.
4.3.2
Multidrop Configuration
Using the SN65LVDS387EVM and SN65LVDS386EVM allows the performance of multidrop tests. A multidrop configuration is defined as one in which more than one receiver is connected to a single driver. There are many different multidrop configurations that can be tested using both the SN65LVDS387 and SN65LVDS386EVM. Two possible configurations are shown in Figure 4-1. The termination resistors on the SN65LVDS386EVM will need to be removed as required by the specific multidrop configuration.
Operation
4-3
System Evaluation Using Both the SN65LVDS387EVM and
Figure 4-1. Examples of Multidrop Interconnections
LVDS387 Termination LVDS386 LVDS387 LVDS386
Termination
Termination
Termination
Termination
Termination Four 1:4 Multidrops Single 1:16 Multidrop
4-4
References
Note: When testing an SN65LVDS387EVM and SN65LVDS386EVM together, make sure R1 through R16 (100 ) are not installed on the SN65LVDS387EVM. Termination of the LVDS signal lines needs to be done on the SN65LVDS386EVM.
4.4 References
There is a wide selection of LVDS devices and related applications materials available to assist in the design and development of LVDS interfaces. This information is located at http://www.ti.com/sc/datatran. Input LVDS into the search tool or enter the part number of a specific device to obtain additional information. For more information on these devices visit TI's web site at
http://www.ti.com/sc/docs/apps/analog/lvds_and_lvdm_general_purpose.html
These documents can also be located quickly by inserting the document number into the Quick Research box at our main web site at http://www.ti.com. Data sheets:
J J
Full data sheet for the LVDS387 in Acrobat PDF: slls362b.pdf (217 KB), or in zipped PostScript: slls362b.psz (214 KB) Full data sheet for the LVDS386 in Acrobat PDF: slls394a.pdf (205 KB), or in Zipped PostScript: slls394a.psz (213 KB)
Application materials:
J J J J J J J J J
Interface Circuits for TIA/EIA-644 (LVDS) (SLLA038) Low Voltage Differential Signaling (Lvds) Evaluation Module (EVM) (SLLA033A) Low-Voltage Differential Signaling (LVDS) Design Notes (SLLA014) LVDS Devices Operate With VCC = 2.5-Vdc (SLLA046) LVDS in Harsh Environments With the Next Generation Receivers From TI (SLLA061) LVDS Multidrop Connections (SLLA054) Measuring Crosstalk in LVDS Systems (SLLA064) Performance of LVDS With Different Cables (SLLA053) Slew Rate Control of LVDS Circuits (SLLA034A)
Finally, the May 2000 edition of the TI Applications Journal contains an article that presents test results from the LVDS387 EVM and LVDS386 EVM when connected together in a point-to-point system using twisted-pair ribbon cable.
Operation
4-5
Appendix A
Parts List and Schematics
This appendix presents the parts list and schematics for as-shipped configurations of LVDS387 and LVDS386 EVMs. Note that equivalent parts may be used.
Topic
A.1 A.2
Page
Parts List for EVMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Parts List and Schematics
A-1
A-2
Parts List for EVMs and Shcematics
A.1 Parts List for EVMs
387EVM Item QTY 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 1 1 1 1 1 3 3 3 2 1 2 1 1 N/A 4 4 N/A 16 16 N/A REF QTY 1 1 1 1 1 1 3 3 3 2 1 2 1 N/A 1 4 4 16 16 N/A N/A REF Millennium Circuits Sprague Sprague AVX AVX AVX Panasonic AVX AVX ITT-Pomona AMP AMP AMP Texas Instruments Texas Instruments AMP AMP Panasonic Digi-key DALE N/A Texas Instruments 386EVM Manufacturer Man fact rer Manufacturer Part Nunber 6417016A 592D686X9010R2T 592D106X9016C2T 12063G105ZATRA 12065C104JATMA 08051C102JATMA ECJ-1VB1C104K 06033G103JATMA 06033G102JATMA 3267-PK10 90F4440 90F7725 90F4440 SN65LVDS387 SN65LVDS386 4-103239-0X3 SHUNT/531220-2 ERJ-3GSYJ109 P0.0GCT-ND CRCW060349R9F N/A 6417016A REF DES PWB1 C1 C2 C3 C4 C5 C6, C9, C12 C7, C10, C13 C8, C11, C14 J1, J2 P3 P4 - P7 P1, P2 U1 U1 JMP1 - JMP4 JMP1 - JMP4 R1 - R16 R17-R32 R33 - R48 R49- R52 -- Description PWB Capacitor, SMT, tantalum Capacitor, SMT, tantalum Capacitor, SMT, Y5V Capacitor, SMT, X7R Capacitor, SMT, X7R Capacitor, SMT Capacitor, SMT, Y5V Capacitor, SMT, Y5V Connector, banana jack Connector, header, 2 X 16P Connector, header, 1 X 16P Connector, header, 2 X 20P Integrated circuit, SMT Integrated circuit, SMT Header Header, jumper short Resistor, SMT Resistor, SMT Resistor, SMT Resistor, SMT, 0603, 50 Schematic Value Val e or F nction Function PRINTED WIRING BOARD 10 V, 10%, 68 F, low ESR, Case code R 16 V, 10%, 10 F, Case code C 25V, 80/-20%, 1 F, 1206 PCKG 50V, 5%, 0.1 F, 1206 PCKG 100V, 5%, 0.001 F, 0805 PCKG 16v, 5%, 0.1 F 25V, 5%, 0.01 F, 0603 PCKG 25V, 5%, 0.001 F, 0603 PCKG One pin, square pad Header, male, 2 x 16, 0.1 ctrs Header, 1 x 16, 0.1 ctrs Header, male, 2 x 20, 0.1 ctrs 16-Channel LVDS driver 16-Channel LVDS receiver Make from 4-103239-0 Enable control jumpers 100 , 1%, 0.0625 W, 0603 PCKG 0 , 1/16 W, 15%, 0603 PCKG 49.9 , 1%, 0.0625 W, 0603 PCKG Reserved for XCVR devices --
Part/Module Identifier
Schematic Diagrams 620201 and 6420202
A.2 Schematic Diagrams 620201 and 6420202
This section contains the following evaluation board schematic diagrams:
- 6420201, Schematic, Bench, Evaluation Board, SN65LVDS387DGG,
EVM
- 6420202, Schematic, Bench, Evaluation Board, SN65LVDS386DGG,
EVM
Parts List and Schematics
A-3

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