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 SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
D D D D
EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015 Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages
DB, DW, OR PW PACKAGE (TOP VIEW)
description
This 8-bit (octal) noninverting bus transceiver uses two separate power-supply rails. The A port, VCCA, is dedicated to accept a 5-V supply level, and the configurable B port, which is designed to track VCCB, accepts voltages from 3 V to 5 V. This allows for translation from a 3.3-V to a 5-V environment and vice versa.
VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCCB NC OE B1 B2 B3 B4 B5 B6 B7 B8 GND
NC - No internal connection
The SN74LVCC4245A is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. The SN74LVCC4245A is characterized for operation from -40C to 85C.
FUNCTION TABLE (each transceiver) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
1
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
logic diagram (positive logic)
DIR 2
22 OE 3
A1
21
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCA + 0.5 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCB + 0.5 V Except I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCA + 0.5 V Output voltage range, VO (see Note 1): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCA + 0.5 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. This value is limited to 6 V maximum. 2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
recommended operating conditions (see Note 3)
VCCA VCCA VCCB VIHA Supply voltage Supply voltage High-level input voltage VOB 0.1 V, VOB VCCB - 0.1 V 4.5 45V 5.5 V VIHB High-level input voltage VOA 0.1 V, VOA VCCA - 0.1 V 4.5 45V 5.5 V VILA Low-level input voltage VOB 0.1 V, VOB VCCB - 0.1 V 4.5 45V 5.5 V VILB VIA VIB VOA VOB IOHA IOHB IOLA IOLB Low-level input voltage Input voltage Input voltage Output voltage Output voltage High-level output current High-level output current Low-level output current Low-level output current 4.5 V 4.5 V 4.5 V 4.5 V 3V 2.7 V to 4.5 V 3V 2.7 V to 4.5 V VOA 0.1 V, VOA VCCA - 0.1 V 45V 4.5 5.5 V 2.7 V 3.6 V 5.5 V 2.7 V 3.6 V 5.5 V 2.7 V 3.6 V 5.5 V 2.7 V 3.6 V 5.5 V 0 0 0 0 VCCB MIN 4.5 2.7 2 2 2 2 2 3.85 0.8 0.8 0.8 0.8 0.8 1.65 VCCA VCCB VCCA VCCB -24 -24 24 24 V V V V mA mA mA mA V V V V NOM 5 3.3 MAX 5.5 5.5 UNIT V V
TA Operating free-air temperature -40 85 C NOTE 3: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VOHA IOH = -100 A IOH = -24 mA IOH = -100 A IOH = -12 mA 12 VOHB IOH = -24 mA IOL = 100 A IOL = 24 mA IOL = 100 A IOL = 12 mA VOLB IOL = 24 mA 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V TEST CONDITIONS VCCA 4.5 V 4.5 V 4.5 V 45V 4.5 VCCB 3V 3V 3V 2.7 V 3V 2.7 V 3V 4.5 V VOLA 3V 3V 3V 2.7 V 2.7 V 3V 4.5 V II IOZ ICCA Control inputs A or B ports B to A VI = VCCA or GND VO = VCCA/B or GND, An = VCC or GND IO(A port) = 0, t) 0 An = VCCA or GND, GND VI = VIL or VIH 5.5 55V 5.5 V 5.5 V Bn = VCCB or GND IO (B port) = 0 t) 55V 5.5 5.5 55V 5.5 V 5.5 V 5.5 V 5.5 V Open 5V 3.6 V 5.5 V 3.6 V Open 3.6 V 5.5 V 3.6 V 5.5 V 5.5 V 5.5 V 3.6 V 3.6 V Open 3.3 V 0.11 0.22 0.21 0.18 0.1 0.1 0.5 8 8 8 5 8 1.35 1 1 0.35 5 11 0.21 MIN 4.4 3.76 2.9 2.2 2.46 2.1 2.25 3.76 TYP 4.49 4.25 2.99 2.5 2.85 2.3 2.65 4.25 0.1 0.44 0.1 0.44 0.5 0.44 0.44 1 1 5 80 80 80 50 80 1.5 1.5 1.5 0.5 mA pF mA A A A A V V V MAX UNIT V
ICCB
A to B A port
VI = VCCA - 2.1 V, Other inputs at VCCA or GND, OE at GND and DIR at VCCA VI = VCCA - 2.1 V, Other inputs at VCCA or GND, DIR at VCCA or GND VI = VCCA - 2.1 V, Other inputs at VCCA or GND, OE at VCCA or GND VI = VCCB - 0.6 V, Other inputs at VCCB or GND, OE at GND and DIR at GND VI = VCCA or GND VO = VCCA/B or GND
ICCA
OE DIR
ICCB Ci Cio
B port Control inputs A or B ports
pF For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or the associated VCC.
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figures 1 through 4)
FROM (INPUT) TO (OUTPUT) VCCA = 5 V 0.5 V, VCCB = 5 V 0.5 V MIN tPHL tPLH tPHL tPLH tPZL tPZH tPZL tPZH tPLZ tPHZ tPLZ tPHZ A B B A A B A B 1 1 1 1 1 1 1 1 1 1 1 1 MAX 7.1 6 6.8 6.1 9 8.3 8.2 8.1 4.7 4.9 5.4 6.3 VCCA = 5 V 0.5 V, VCCB = 2.7 V TO 3.6 V MIN 1 1 1 1 1 1 1 1 1 1 1 1 MAX 7 7 6.2 5.3 9 8 10 10.2 5.2 5.2 5.4 7.4 ns ns ns ns ns ns
PARAMETER
UNIT
OE OE OE OE
operating characteristics, VCCA = 5 V, VCCB = 3.3 V, TA = 25C
PARAMETER Cpd d Power dissipation capacitance per transceiver Outputs enabled Outputs disabled TEST CONDITIONS CL = 0 0, f = 10 MHz TYP 20 6.5 UNIT pF
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION FOR A TO B VCCA = 4.5 V TO 5.5 V AND VCCB = 2.7 V TO 3.6 V
6V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 6V GND
LOAD CIRCUIT tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input tPLH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL Output Control tPZL Output Waveform 1 S1 at 6 V (see Note B) Output Waveform 2 S1 at GND (see Note B) tPZH tPLZ 1.5 V tPHZ VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING VOL + 0.3 V 3V VOL 1.5 V 1.5 V 0V 3V
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION FOR A TO B VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V
7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 7V GND
LOAD CIRCUIT tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input tPLH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at GND (see Note B) tPZH Output Control tPZL tPLZ 1.5 V tPHZ VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING VOL + 0.3 V 3.5 V VOL 1.5 V 1.5 V 0V 3V
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
7
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION FOR B TO A VCCA = 4.5 V TO 5.5 V AND VCCB = 2.7 V TO 3.6 V
2 x VCCA From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCCA GND
LOAD CIRCUIT tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input tPLH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL Output Waveform 2 S1 at GND (see Note B) tPZH Output Control tPZL Output Waveform 1 S1 at 2 x VCCA (see Note B) tPLZ 1.5 V tPHZ VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING VOL + 0.3 V VCCA VOL 1.5 V 1.5 V 0V 3V
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.
Figure 3. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74LVCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584G - NOVEMBER 1996 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION FOR B TO A VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V
7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 7V GND
LOAD CIRCUIT tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input tPLH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at GND (see Note B) tPZH Output Control tPZL tPLZ 1.5 V tPHZ VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING VOL + 0.3 V 3V VOL 1.5 V 1.5 V 0V 3V
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.
Figure 4. Load Circuit and Voltage Waveforms
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9
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated


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