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MC33347A
LITHIUM BATTERY PROTECTION CIRCUIT FOR ONE OR TWO CELL SMART BATTERY PACKS
SEMICONDUCTOR TECHNICAL DATA
Lithium Battery Protection Circuit for One or Two Cell Battery Packs
The MC33347A is a monolithic lithium battery protection circuit that is designed to enhance the useful operating life of one or two cell rechargeable battery packs. Cell protection features consist of independently programmable charge and discharge limits for both voltage and current, a delayed current shutdown, continuous cell voltage balancing with the choice of on-chip or external balancing resistors, and a virtually zero current sleepmode state when the cells are discharged. Additional features include an on-chip charge pump for reduced MOSFET losses while charging or discharging a low cell voltage battery pack. This protection circuit requires a minimum number of external components and is targeted for inclusion within the battery pack. This MC33347A is available in standard and low profile 16 lead surface mount packages. * Programmable for One or Two Cell Applications
16 1
* * * * * * * *
Independently Programmable Charge and Discharge Limits for Both Voltage and Current Charge and Discharge Current Limit Detection with Delayed Shutdown Continuous Cell Voltage Balancing On-Chip and External (optional) Balancing Resistors Virtually Zero Current Sleepmode State when Cells are Discharged Charge Pump for Reduced Losses with a Low Cell Voltage Battery Pack Minimum External Components for Inclusion within the Battery Pack Available in Low Profile Surface Mount Packages
16
D SUFFIX PLASTIC PACKAGE CASE 751B (SO-16)
1
DTB SUFFIX PLASTIC PACKAGE CASE 948F (TSSOP-16)
PIN CONNECTIONS Typical Two Cell Smart Battery Pack
Balance 1 1
RLim(dschg) RLim(chg)
16 Ground 15 Charge Pump Output 14 13 12 11 10 9 (Top View) Discharge Gate Drive Output Cell Program/ Test Charge Gate Drive Output Charge Gate Drive Common Charge Current Limit/ Balance Disable Current Sense Common
Balance 2 2
9 13 6 4 Rb2 2 3 1 5 16 15 CO Discharge MOSFET Q2 Charge MOSFET Q1 14 12 11 R1 10
Cell Voltage 1/VC 3 Cell Voltage 1/VCC/ Discharge Current Limit/ 4 High Current Threshold Cell Voltage Return 5 Cell Voltage Positive 6
MC33347A
7 R2 8 R3
Rb1
Discharge Voltage 7 Threshold Charge Voltage 8 Threshold
ORDERING INFORMATION
Device MC33347AD MC33347ADTB Operating Temperature Range TA = -40 to +85C Package SO-16 TSSOP-16
Rev 0
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
(c) Motorola, Inc. 1999
MOTOROLA ANALOG IC DEVICE DATA
1
MC33347A
MAXIMUM RATINGS
Ratings Input Voltage (Measured with Respect to Ground, Pin 16) Balance 1, 2 (Pins 1, 2) Cell 1 (Pin 3) Cell 2 (Pin 4) Cell Voltage Divider (Pins 5, 6, 7 and 8) Current Sense Common (Pin 9) Charge Current Limit (Pin 10) Charge Gate Drive Common (Pin 11) Charge Gate Drive Output (Pin 12) Cell Program/Test (Pin 13) Discharge Gate Drive Output (Pin 14) Charge Pump Output (Pin 15) External Cell Balancing Current (Pin 1, 2, Note 1) Cell Voltage Divider Current Source Current (Pin 4 to 6) or (Pin 3 to 6) Sink Current (Pin 3 to 5) or (Pin 16 to 5) Symbol VIR Value 10 7.5 10 10 10 10 13 -14 to +12 10 10 10 1.0 0.5 0.5 Unit V
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Ibal Idiv A mA Thermal Resistance, Junction-to-Air DTB Suffix, TSSOP-16 Plastic Package, Case 948F D Suffix, SO-16 Plastic Package, Case 751B Operating Junction Temperature (Notes 1, 2 and 3) Storage Temperature RJA C/W 176 145 TJ -40 to +150 -55 to +150 C C Tstg
NOTE: ESD data available upon request.
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted.)
Characteristic VOLTAGE SENSING Symbol Min Typ Max Unit
Charge or Discharge Voltage Inputs (Pin 7 or 8 to Pin 5) Threshold Voltage TA = 25C TA = Tlow to Thigh Input Bias Current Input Hysteresis Source Current (Pin 8)
Vth
V
IIB IH
- - - - - - - - - -
1.230 - 20 2.0
- - - - - - - - - -
nA
A V
Cell Charge or Discharge Programmable Input Voltage Range (Pin 7 or 8) Cell Selector Series Resistance Cell Positive to Top of Divider (Pin 3 or 4 to Pin 6) Cell Negative to Bottom of Divider (Pin 3 or 16 to Pin 5) Cell Voltage Sampling Rate VPin 9< VPin 4 + 10mV VPin 9> VPin 4 + 10mV
VIR(pgm) RS+ RS-
Vth to 7.5 50 50
t(smpl)
s
1.0 0.004
Cell Program/ Test Input Threshold Voltage (Pin 13)
Vth
VCell 1/2.0
V
CELL VOLTAGE BALANCING
Cell Voltage Balancing Accuracy (Note 4) Internal Balancing Resistance (Pin 3, 4)
Vbal
- - -
1.0
- - -
%
Rbal
100 1.0
Balancing MOSFET On Resistance (Pin 1, 2)
RDS(on)
NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible. 3. Tested ambient temperature range for the MC33347A: Tlow = -25C Thigh = +85C
4. Cell balancing is active when the percent change in voltage exceeds the typical limit specified. This parameter is measured by holding one cell at a fixed voltage while the other is varied so that balancing is activated. It is defined by:
D%
+
Variable Cell Voltage Fixed Cell Voltage Fixed Cell Voltage
*
x 100
2
MOTOROLA ANALOG IC DEVICE DATA
MC33347A
ELECTRICAL CHARACTERISTICS (continued) (TA = 25C unless otherwise noted.)
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CURRENT SENSING Charge Current Limit (Pin 10 to Pin 9, TA = 25C) Threshold Voltage Input Bias Current Delay Vth(chg) IIB(chg) Idly(chg) - - - - - - 18 200 3.0 70 200 3.0 - - - - - - mV nA ms mV nA ms Discharge Current Limit (Pin 4 to Pin 9, TA = 25C) Threshold Voltage Input Bias Current Delay Output Voltage (Pin 15, RL 1010 ) Vth(dschg) IIB(dschg) Idly(dschg) VO CHARGE PUMP - 9.2 - V TOTAL DEVICE Average Cell Current (TA = 25C, Battery Pack Unloaded and without Current Limit Fault) Operating with Soft Short (VPin 4 - VPin 9 > 10mV) Operating (VCC = 8.0 V) Sleepmode (VCC = 5.0 V) Minimum Operating Cell Voltage Programmed for Two Cell Operation Cell 1 Voltage Cell 2 Voltage Programmed for One Cell Operation Cell 1 Voltage ICC A - - - 19 12.5 0.015 - - - VCC V - - - 1.5 0 1.5 - - -
NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible. 3. Tested ambient temperature range for the MC33347A: Tlow = -25C Thigh = +85C 4. Cell balancing is active when the percent change in voltage exceeds the typical limit specified. This parameter is measured by holding one cell at a fixed voltage while the other is varied so that balancing is activated. It is defined by:
Characteristic
Symbol
Min
Typ
Max
Unit
D%
+
Variable Cell Voltage Fixed Cell Voltage Fixed Cell Voltage
*
x 100
MOTOROLA ANALOG IC DEVICE DATA
3
MC33347A
PIN FUNCTION DESCRIPTION
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1 BAL1 Balance 1 This is the drain connection to an internal MOSFET. An external resistor is placed from this pin to the positive terminal of Cell 1 for increased cell balancing capability. This allows most of the additional power to be dissipated off-chip. This is the drain connection to an internal MOSFET. An external resistor is placed from this pin to the positive terminal of Cell 2 for increased cell balancing capability. This allows most of the additional power to be dissipated off-chip. 2 BAL2 Balance 2 3 V1+ Cell Voltage 1/VC This is a multifunction pin that connects to a high impedance node of the Cell Selector where it is used to monitor the positive terminal of Cell 1 and the negative terminal of Cell 2. This pin also provides logic biasing and a discharge path for the internal balancing of Cell 1. 4 V2+ Cell Voltage 2 /VCC/Discharge Current Limit/ High Current Threshold Cell Voltage Return Cell Voltage Positive Discharge Voltage Threshold This is a multifunction pin that connects to a high impedance node of the Cell Selector where it is used to monitor the positive terminal of Cell 2 and to provide positive supply voltage for the protection IC. This pin is also used to monitor the voltage drop across the discharge current limit resistor to detect a discharge current or a high current threshold to trigger fast sampling. It also provides a discharge path for the internal balancing of Cell 2. The bottom side of a three resistor divider string connects to this pin. The Cell Selector internally switches this point to the negative terminal of the cell that is to be monitored. 5 6 7 Ref_Gnd CV+ VL The top side of a three resistor divider string connects to this pin. The Cell Selector internally switches this point to the positive terminal of the cell that is to be monitored. The upper tap of a three resistor divider string connects to this pin. The Cell Voltage Detector compares the divided down cell voltage to an internal reference. If the comparator detects that the cell voltage has fallen below the programmed level for three consecutive samples, discharge switch Q2 is disabled, and the protection circuit enters into a low current sleepmode state. This prevents further discharging of the battery pack. The lower tap of a three resistor divider string connects to this pin. The Cell Voltage Detector compares the divided down cell voltage to an internal reference. If the comparator detects that the cell voltage has risen above the programmed level, charge switch Q1 is disabled, preventing further charging of the battery pack. A 2.0 A current source pull-up is internally applied to this pin creating input hysteresis. This pin is a common point that is used to monitor the voltage drop across the charge and discharge current limit resistors. This pin is used to monitor the voltage drop across the charge current limit resistor or if connected to Pin 16, prevents cell balancing from occuring. 8 VH Charge Voltage Threshold 9 OV Dchg OV Chg Current Sense Common 10 Charge Current Limit/Cell Balance Disable Charge Gate Drive Common Charge Gate Drive Output 11 Pack- Cgate Prog This pin provides a gate turn-off path for charge switch Q1. The charge switch source and the battery pack negative terminal connect to this point. This output connects to the gate of charge switch Q1 allowing it to enable or disable battery pack charging. 12 13 Cell Program /Test This is a multifunction input that is used to program the number of cells and to facilitate circuit testing. This input is connected to Pin 3 for two cell operation, and to Pin 16 for one cell operation. 14 15 16 Dgate Discharge Gate Drive Output Charge Pump Output Ground This output connects to the gate of discharge switch Q2 allowing it to enable or disable battery pack discharging. This is the charge pump output. A reservoir capacitor is connected from this pin to ground. This is the protection IC ground and all voltage ratings are with respect to this pin. Vpump GND
Pin
Pin Name
Function
Description
4
MOTOROLA ANALOG IC DEVICE DATA
MC33347A
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Outputs MOSFET Switches Function Input Conditions Cell Status Circuit Operation Battery Pack Status Charge Q1 Discharge Q2 Charge Pump Cell Balancing (See Note) CELL CHARGING/DISCHARGING Storage or Nominal Operation: No current or voltage faults Both Charge MOSFET Q1 and Discharge MOSFET Q2 are on. The battery pack is available for charging or discharging. On On Active Active CELL CHARGING FAULT/RESET Charge Current Limit Fault: VPin 10 (VPin 9 + 18 mV) for 3.0 ms Charge MOSFET Q1 is latched off and the cells are disconnected from the charging source. Q1 will remain in the off state as long as VPin 16 exceeds VPin 11 by 2.0 V. The battery pack is available for discharging. On to Off On Active Active Charge Current Limit Reset: VPin 16 - VPin 11 < 2.0 V The Sense Enable circuit will reset and turn on charge MOSFET Q1 when VPin 16 no longer exceeds VPin 11 by 2.0 V. This can be accomplished by either disconnecting the charger from the battery pack, or by connecting a load to the battery pack. Charge MOSFET Q1 is latched off and the cells are disconnected from the charging source. An internal current source pull-up of 2.0 A is applied to Pin 8 creating an input hysteresis voltage of VH with divider resistors R1 and R2. The battery pack is available for discharging. Off to On On Active Active Charge Voltage Limit Fault: VPin 8 1.23 V for 1.0 s On to Off On Active Active Charge Voltage Limit Reset: VPin 8 < 1.23 V for 1.0 s Charge MOSFET Q1 will turn on when the voltage across each cell falls sufficiently to overcome the input hysteresis voltage. This can be accomplished by applying a load to the battery pack. Off to On On Active Active CELL DISCHARGING FAULT/RESET Discharge Current Limit Fault: VPin 4 (VPin 9 - 50 mV) for 3.0 ms Discharge MOSFET Q2 is latched off and the cells are disconnected from the load. Q2 will remain in the off state as long as VPin 11 exceeds VPin 16 by 2.0 V. The battery pack is available for charging. The Sense Enable circuit will reset and turn on discharge MOSFET Q2 when VPin 11 no longer exceeds VPin 16 by 2.0 V. This can be accomplished by either disconnecting the load from the battery pack, or by connecting the battery pack to the charger. Discharge MOSFET Q2 is latched off, the cells are disconnected from the load, and the protection circuit enters a low current sleepmode state. The battery pack is available for charging. On On to Off Active Active Discharge Current Limit Reset: VPin 11 - VPin 16 < 2.0 V On Off to On Active Active Discharge Voltage Limit Fault: VPin 7 1.23 V for three consecutive 1.0 s samples On On to Off Disabled Disabled Discharge Voltage Limit Reset: VPin 16 > (VPin 11 + 0.6 V) The Sense Enable circuit will reset and turn on discharge MOSFET Q2 when VPin 16 exceeds VPin 11 by 0.6 V. This can be accomplished by connecting the battery pack to the charger. On Off to On Active Active FAULTY CELL (ONE CELL OVERVOLTAGE, ONE CELL UNDERVOLTAGE) Simultaneous Charge and Discharge Voltage Limit Faults: VPin 8 1.23 V for 1 cell and VPin 7 1.23 V for three consecutive 1.0 s samples This condition can happen if there is a defective cell in the battery pack such as one of the cells is shorted. The protection circuit will remain in the sleepmode state until the battery pack is connected to a charger. If Cell 2 is faulty and a charger is connected, the protection circuit will cycle in and out of sleepmode. If Cell 1 is faulty (<1.5 V), the protection circuit logic will not function and the battery pack cannot be charged. Cycles Cell 1 Good Cycles Cell 1 Good Cycles Cell 1 Good Cycles Cell 1 Good Disabled Cell 1 Faulty Disabled Cell 1 Faulty Disabled Cell 1 Faulty Disabled Cell 1 Faulty
NOTE: Cell balancing is not active when programmed for one cell operation.
PROTECTION CIRCUIT OPERATING MODE TABLE
MOTOROLA ANALOG IC DEVICE DATA
5
MC33347A
Figure 1. Two Cell Smart Battery Pack
RLim(dschg)
RLim(chg)
MC33347A Prog 13 V2+ 4 RB2 BAL2 2 V1+ 3 RB1 Cell 1 0.1 BAL1 1 GND 16 80 80
OV Dchg
9
10
OV Chg
CI 0.22
Discharge Overcurrent Detector
Charge Overcurrent Detector / Cell Balance Disable CV+ 6 R1
Cell 2
Cell Selector
Floating Over/Under Cell Voltage Detector & Reference
VL 7 R2 VH 8 R3 Ref_Gnd 5
Cell Voltage Balancing Amplifier
Over/Under Data Latch & Control Logic Sense Enable
Ck Ck
En Charge Pump Charge/Discharge Gate Drivers
Oscillator
Vpump 15 CO
Dgate
14 Rg 20 k
Cgate 12
11 Pack-
Discharge Switch Q2
Rg 20 k Charge Switch Q1
4.7 M Components CI and Rg are mandatory. Refer to the Battery Pack Application text. The 100 nF capacitor that connects across Cell 1 provides high frequency bypassing of the VC pin which powers the internal logic. This capacitor is desireable in applications that have high load current spikes when used with high impedance type cells.
6
MOTOROLA ANALOG IC DEVICE DATA
MC33347A
Figure 2. One Cell Smart Battery Pack
RLim(dschg)
RLim(chg)
MC33347A Prog 13 V2+ 4 80 BAL2 100 2 V1+ 3 Cell 1 100 BAL1 1 GND 16 80
OV Dchg
9
10
OV Chg
CI 0.22
Discharge Overcurrent Detector
Charge Overcurrent Detector / Cell Balance Disable CV+ 6 R1
Cell Selector
Floating Over/Under Cell Voltage Detector & Reference
VL 7 R2 VH 8 R3 Ref_Gnd 5
Cell Voltage Balancing Amplifier
Over/Under Data Latch & Control Logic Sense Enable
Ck Ck
En Charge Pump Charge/Discharge Gate Drivers
Oscillator
Vpump 15
Dgate
14
Cgate 12
11
Pack-
CO
Rg 20 k Discharge Switch Q2
Rg 20 k Charge Switch Q1
4.7 M
Components CI and Rg are mandatory. Refer to the Battery Pack Application text. In order to guarantee proper discharge current limit operation when the battery pack output is shorted, power must be made available to the MC33347. An artifical power source with a 10 ms time constant is required, and is provided by the 100 resistor and 100 F capacitor that connects to the VCC and VC inputs. These components are only required in single cell battery pack applications.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MOTOROLA ANALOG IC DEVICE DATA
7
MC33347A
OUTLINE DIMENSIONS
D SUFFIX PLASTIC PACKAGE CASE 751B-05 (SO-16) ISSUE J
9
-A-
16
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
G F
DIM A B C D F G J K M P R
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
16X K REF
DTB SUFFIX PLASTIC PACKAGE CASE 948F-01 (TSSOP-16) ISSUE O
M
0.10 (0.004) 0.15 (0.006) T U
S
TU
S
V
S
K
16
2X
L/2
9
J1 B -U-
L
PIN 1 IDENT. 1 8
SECTION N-N J N 0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
H D G
DETAIL E
How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Customer Focus Center: 1-800-521-6274
JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan. 81-3-5487-8488
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8
CCC EEE CCC EEE CCC
K1
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
Mfax is a trademark of Motorola, Inc.
MC33347A/D MOTOROLA ANALOG IC DEVICE DATA

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