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MICROCIRCUIT DATA SHEET MNLM6161-X REV 2A1
HIGH SPEED OPERATIONAL AMPLIFIER
General Description
The LM6161 high-speed amplifier exhibits an excellent speed-power product in delivering 300 V/uS and 50 MHz unity gain stability with only 5 mA of supply current. Further, power savings and application convenience are possible by taking advantage of the wide dynamic range in operating supply voltage which extends all the way down to +5V. This amplifier is built with National's VIP[TM] (Vertically Integrated PNP) process which provides fast PNP transistors that are true complements to the already fast NPN devices. This advanced junction-isolated process delivers high speed performance without the need for complex and expensive dielectric isolation. Original Creation Date: 08/03/95 Last Update Date: 11/23/98 Last Major Revision Date: 10/28/98
Industry Part Number
LM6161
NS Part Numbers
LM6161E/883* LM6161J-QMLV ** LM6161J/883 *** LM6161W-SMD **** LM6161W/883 LM6161WG-QMLV ***** LM6161WG/883 ******
Prime Die
LM6161B
Controlling Document
See Features Page
Processing
MIL-STD-883, Method 5004
Subgrp Description
1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at
Temp ( oC)
+25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55
Quality Conformance Inspection
MIL-STD-883, Method 5005
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Features
High slew rate 300V/uS High unity gain freq 50MHz Low supply current 5mA Fast settling 120nS to 0.1% Low differential gain <0.1% Low differential phase 0.1 degrees Wide supply range 4.75V to 32V Stable with unlimited capacitive load Well behaved; easy to apply SMD : 5962-89621012A*,VPA**,PA***,HA****,VXA*****,XA******
Applications
Video amplifier High-frequency filter Wide-bandwidth signal conditioning Radar Sonar
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
(Absolute Maximum Ratings)
(Note 1) Supply Voltage (V+ - V-) Differential Input Voltage Range (Note 4) Common-Mode Voltage Range (Note 6) (V+ - 0.7V) to (V- - 7V) Output Short Circuit to Gnd (Note 3) Continuous Power Dissipation (Note 2) 400mW Soldering Information (Soldering, 10 seconds) Storage Temperature Range Maximum Junction Temperature 150 C Thermal Resistance ThetaJA LCC CERDIP CERPAK CERAMIC SOIC ThetaJC LCC CERDIP CERPAK CERAMIC SOIC ESD Tolerance (Note 4, 5) 260 C -65 C to +150 C 36V
+8V
(Still Air) (500LF/Min Air (Still Air) (500LF/Min Air (Still Air) (500LF/Min Air (Still Air) (500LF/Min Air
flow) flow) flow) flow)
90 61 113 51 228 140 228 140 20 21 21 21
C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W
+500V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150 C. In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vio, Iio and Noise). The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test circuit used consists of the human body model of 100pF in series with 1500 Ohms. The voltage between V+ and either input pin must not exceed 36V.
Note 2:
Note 3: Note 4:
Note 5: Note 6:
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Recommended Operating Conditions
(Note 1) Temperature Range -55 C < TA < +125 C Supply Voltage Range 4.75V to 32V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms. SYMBOL Vio PARAMETER Input Offset Voltage Input Bias Current Input Offset Current Positive Common-Mode Voltage Range Vcc = +15V Vcc = +15V Vcc = +5V 2 2 -Vcmr Negative Common-Mode Voltage Range Vcc = +15V Vcc = +15V Vcc = +5V 2 2 CMRR Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Short Circuit Current -12.9V < Vcm < 13.9V -12.7V < Vcm < 13.8V PSRR +10V < Vcc < +16V +10V < Vcc < +16V Ios Source 80 74 80 74 -30 -20 Sink 30 20 Icc Supply Current 6.5 6.8 Avs Large Signal Voltage Gain Positive Voltage Swing Vout = +10V, Rl = 2K Ohms Vout = +10V, Rl = 2K Ohms +Vop Vcc = +15V, Rl = 2K Ohms Vcc = +15V, Rl = 2K Ohms Vcc = +5V, Rl = 2K Ohms 1 1 550 300 13.5 13.3 3.5 3.3 CONDITIONS NOTES PINNAME MIN -7 -10 Iib -3 -6 Iio -350 -800 +Vcmr 13.9 13.8 3.9 3.8 -12.9 -12.7 2.0 2.2 7 10 3 6 350 800 MAX UNIT mV mV uA uA nA nA V V V V V V V V dB dB dB dB mA mA mA mA mA mA V/V V/V V V V V SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms. SYMBOL -Vop PARAMETER Negative Voltage Swing CONDITIONS Vcc = +15V, Rl = 2K Ohms Vcc = +15V, Rl = 2K Ohms Vcc = +5V, Rl = 2K Ohms NOTES PINNAME MIN MAX -13.0 -12.7 1.7 2.0 UNIT V V V V SUBGROUPS 1 2, 3 1 2, 3
AC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.) AC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms. Gbw Gain Bandwidth Product Slew Rate f = 20Mhz 40 30 +Sr Output step = -4V to +4V, Av = +1, Vin = 8V step Output step = +4V to -4V, Av = +1, Vin = 8V step 10V step to 0.1% , Av = 1, Rl = 2K Ohms 200 180 -Sr Slew Rate 200 180 ts Setting Time 300 325 Mhz Mhz 4 5, 6
V/uS 4 V/uS 5, 6 V/uS 4 V/uS 5, 6 nS nS 9 10, 11
DC PARAMETERS: DRIFT VALUES
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Vcm = 0V, Rl > 100K Ohms, Rs = 10K Ohms. Delta Calculations Performed on QMLV Devices at Group B, Subgroup 5 ONLY. Vio Iib Iio CMRR Input Offset Voltage Input Bias Current Input Offset Current Common Mode Rejection Ratio Note 1: Note 2: -12.9V < +Vcm < 13.9V -0.7 -0.5 -35 -5 +0.7 +0.5 +35 +5 mV uA nA dB 1 1 1 1
Voltage gain is the total output swing (20V) divided by the signal required to produce that swing. For single supply operation, the following conditions apply: V+ = 5V, V- = 0V, Vcm = 2.5V, Vout = 2.5V. Vio adjust pins are each connected to V- to realize maximum output swing. This connection will degrade Vio.
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MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Graphics and Diagrams
GRAPHICS# 05885HRA4 06190HRA3 06191HRA2 E20ARE J08ARL P000167A P000168B P000169A P000259A W10ARG WG10ARC CERDIP (J), 8 LEAD (B/I CKT) CERPACK (W, WG), 10LD (B/I CKT) LCC (E), TYPE C, 20 TERMINAL (B/I CKT) LCC (E), TYPE C, 20 TERMINAL(P/P DWG) CERDIP (J), 8 LEAD (P/P DWG) CERPACK (W), 10 LEAD (PINOUT) LCC (E), 20 LEAD, TYPE C (PINOUT) CERDIP (J), 8 LEAD (PINOUT) CERAMIC SOIC (WG), 10 LEAD (PINOUT) CERPACK (W), 10 LEAD (P/P DWG) CERAMIC SOIC (WG), 10 LEAD (P/P DWG) DESCRIPTION
See attached graphics following this page.
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NC VIO ADJUST ININ+ V-
1 2 3 4 5
10 9 8 7 6
NC VIO ADJUST V+ VOUTPUT NC
LM6161W 10 - LEAD CERPACK CONNECTION DIAGRAM TOP VIEW P000167A
MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050
N
VIO ADJUST VIO ADJUST N/C N/C N/C
N/C INN/C IN+ N/C
4 5 6 7 8
3
2
1
20
19
18 17 16 15 14
N/C V+ N/C VOUT N/C
9
10
11
12
13
N/C
V-
N/C
N/C
N/C
LM6161E 20 - LEAD LCC CONNECTION DIAGRAM TOP VIEW P000168B
N
MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050
VIO ADJUST ININ+ V-
1 2 3 4
8 7 6 5
VIO ADJUST V+ VOUT NC
LM6161J 8 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000169A
MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050
N

N

MNLM6161-X REV 2A1
MICROCIRCUIT DATA SHEET
Revision History
Rev
1A1
ECN #
Rel Date
Originator
Barbara Lopez
Changes
Update MDS: MNLM6161-X Rev. 0B0 to MNLM6161-X Rev. 1A1. Updated NSID, deleted W-SMD and added WG ID. Added SMD number for WG package. Added WG package to thermal resistance, updated note 6, deleted note 7, added power dissipation limit in Absolute section. Updated Subgroups to match SMD, added note 2 to Electrical section. Added MKT graphic for WG package. Added Pinouts for all packages. Added Burn-In CKT for W and E packages. Update MDS: MNLM6161-X, Rev. 1A1 to MNLM6161-X, Rev. 2A1.
M0002843 11/23/98
2A1
M0003073 11/23/98
Rose Malone
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