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| MICROCIRCUIT DATA SHEET MNLM139A-X REV 1E1 Original Creation Date: 09/13/95 Last Update Date: 08/24/98 Last Major Revision Date: 01/21/97 LOW POWER LOW OFFSET VOLTAGE QUAD COMPARATORS General Description The LM139A consists of four independent precision voltage comparators. These were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes ground, even though operated from a single power supply voltage. Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and the time delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The LM139A was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, it will directly interface with MOS logic-where the low power drain of the LM139A is a distinct advantage over standard comparators. Industry Part Number LM139A NS Part Numbers LM139AE/883 LM139AJ-MLS LM139AJ-QMLV* LM139AJ/883 LM139AW-MLS LM139AW-QMLV** LM139AW/883 LM139AWG-QMLV*** LM139AWG/883 Prime Die LM139 Controlling Document See Features Page Processing MIL-STD-883, Method 5004 Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 Quality Conformance Inspection MIL-STD-883, Method 5005 1 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET Features - Wide supply voltage range LM139A 2Vdc to 28Vdc or +1Vdc to +14Vdc - Very low supply current drain (0.8 mA) - independent of supply voltage - Low input biasing current 25nA - Low input offset current +5nA and offset voltage +1mV - Input common-mode voltage range includes GND - Differential input voltage range equal to the power supply voltage - Low output saturation voltage 250mV at 4mA - Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic systems - SMD : 5962-9673801VCA*, VDA**, VXA*** 2 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET (Absolute Maximum Ratings) (Note 1) Supply Voltage V+ Differential Input Voltage (Note 5) Input Voltage -0.3 Vdc to +36 Vdc Input Current (Note 6) (Vin < -0.3 Vdc) Power Dissipation (Note 2, 3) LCC CERDIP CERPACK CERAMIC S.O.I.C. Output Short-Circuit to GND (Note 4) Maximum Junction Temperature 150 C Storage Temperature Range -65 C to +150 C Lead Temperature (Soldering, 10 seconds) Operating Temperature Range Thermal Resistance ThetaJA LCC 260 C -55 C to +125 C 36 Vdc or + 18 Vdc 36 Vdc 50mA 1250mW 1200mW 680mW 680mW Continuous (Still Air) (500LF/Min Air CERDIP (Still Air) (500LF/Min Air CERPACK (Still Air) (500LF/Min Air CERAMIC S.O.I.C. (Still Air) (500LF/Min Air ThetaJC LCC CERDIP CERPACK CERAMIC S.O.I.C. ESD Tolerance (Note 7) flow) flow) flow) flow) 100 73 103 65 183 120 183 120 28 23 23 23 C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W 600V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. The low bias dissipation and the ON-OFF characteristic of the outputs keeps the chip dissipation very small (Pd < 100mW), provided the output transistors are allowed to saturate. Note 2: Note 3: 3 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET (Continued) Note 4: Note 5: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuit to ground, the maximum output current is approximately 20mA independent of the magnitude of V+. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -3.0 Vdc (or 0.3 Vdc below the magnitude of the negative power supply, if used) (at 25 C). This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to the diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3 Vdc (at 25 C). Human body model, 1.5K Ohms in series with 100pF. Note 6: Note 7: 4 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V+ = 5V, Vcm = 0 SYMBOL Icc PARAMETER Supply Current Rl = Infinity V+ = 30V, Rl = Infinity Icex Vsat Output Leakage Current Saturation Voltage Output Sink Current Input Offset Voltage V+ = 30V V+ = 30V, Vo = 30V Isink = 4mA CONDITIONS NOTES PINNAME MIN 2 2 1 400 700 Isink Vio Vo = 1.5V 6 -2 -4 -2 -4 V+ = 30V, Vcm = 28.5V, Vout = 1.5V V+ = 30V, Vcm = 28.0V, Vout = 1.5V +Ibias Input Bias Current Input Bias Current Input Offset Current Power Supply Rejection Ratio Common Mode Rejection Ratio Voltage Gain Common Mode Voltage Range Vo = 1.5V -2 -4 -100 -300 -Ibias Vo = 1.5V -100 -300 Iio Vo = 1.5V -25 -100 PSRR CMRR Av Vcm V+ = 5V to 30V V+ = 30V, Vcm = 0V to 28.5V V+ = 15V, Rl > 15K Ohms, Vout = 1V to 11V V+ = 30V 1 1 Vdiff Differential Input Voltage V+ = 30V, Vdiff = 36V 2 60 60 50 0 0 V+ 1.5 V+ 1.5 500 2 4 2 4 2 4 -1 -1 -1 -1 25 100 MAX UNIT mA mA uA mV mV mA mV mV mV mV mV mV nA nA nA nA nA nA dB dB SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1 2, 3 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 1 V/mV 1 V V nA 1 2, 3 1, 2, 3 5 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET Electrical Characteristics AC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) AC: V+ = 5V SYMBOL tRLH PARAMETER Response Time CONDITIONS NOTES PINNAME MIN 5 0.8 tRHL Response Time 2.5 0.8 MAX UNIT uS uS uS uS SUBGROUPS 4 4 4 4 DC PARAMETERS: DRIFT VALUES (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V+ = 5V, Vcm = 0V. "Deltas not required on B-Level product. Deltas required for S-Level (-MLS) product as specified on Internal Processing Instructions (IPI) and for QMLV product at Group B, Subgroup 5 ONLY." Vio +Ibias -Ibias Iio Input Offset Voltage Input Bias Current Input Bias Current Input Offset Current Note 1: Note 2: Vo = 1.5V Vo = 1.5V Vo = 1.5V -1 -15 -15 -10 1 15 15 +10 mV nA nA nA 1 1 1 1 Parameter guaranteed by Vio tests. Vdiff is measured by applying +36V/-36V, with reference to gnd, to the two inputs. 6 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET Graphics and Diagrams GRAPHICS# 5542HRA2 5715HRA2 5816HRA3 E20ARE J14ARH P000184A P000201A P000238A P000271A W14BRN WG14ARC (blank) CERPACK (W), 14 LEAD (B/I CKT) LCC (E), TYPE C, 20 TERMINAL (B/I CKT) LCC (E), TYPE C, 20 TERMINAL(P/P DWG) CERDIP (J), 14 LEAD (P/P DWG) CERPACK (W), 14 LEAD (PINOUT) LCC (E), TYPE C, 20 TERMINAL (PINOUT) CERAMIC SOIC (WG), 14 LEAD (PINOUT) CERDIP (J), 14 LEAD (PINOUT) CERPACK (W), 14 LEAD (P/P DWG) CERAMIC SOIC (WG), 14LD (P/P DWG) DESCRIPTION See attached graphics following this page. 7 OUTPUT 2 OUTPUT 1 V+ IN- 1 IN+ 1 IN- 2 IN+ 2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 OUTPUT 3 OUTPUT 4 GND IN+ 4 IN- 4 IN+ 3 IN- 3 LM139AW, LM139W 14 - LEAD CERPACK CONNECTION DIAGRAM TOP VIEW P000184A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 OUT 1 OUT 2 N/C OUT 3 OUT 4 V+ N/C IN- 1 N/C IN+ 1 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 GND N/C IN+ 4 N/C IN- 4 9 10 11 12 13 IN- 2 IN+ 2 N/C IN- 3 IN+ 3 LM139AE, LM139E 20 - LEAD LCC CONNECTION DIAGRAM TOP VIEW P000201A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N OUTPUT 2 OUTPUT 1 V+ IN- 1 IN+ 1 IN- 2 IN+ 2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 OUTPUT 3 OUTPUT 4 GND IN+ 4 IN- 4 IN+ 3 IN- 3 LM139AJ, LM139J 14 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000271A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 MNLM139A-X REV 1E1 MICROCIRCUIT DATA SHEET Revision History Rev 1D1 ECN # Rel Date Originator Barbara Lopez Changes Changed MDS: MNLM139A-X Rev. 1C0 to MNLM139A-X Rev. 1D1. Changed subgroup 9 to subgroup 4, to reflect what is on SMD. Added Burn-In graphics for E, J, W and WG Pkg's. Added Pinouts for E, J, W and WG Pkg's. Update MDS:MNLM139A-X, REV 1D1 to MNLM139A-X, REV 1E1, main table to reflect the LM139AWG/883 package. M0002705 08/24/98 1E1 M0003001 08/24/98 James Gomez 8 |
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