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MICROCIRCUIT DATA SHEET MDLF198-X REV 0A0
MONOLITHIC SAMPLE AND HOLD
General Description
The LF198 is a monolithic sample-and-hold circuit which utilizes BI-FET technology to obtain ultra-high dc accuracy with fast acquisition of signal and low droop rate. Operating as a unity gain follower, dc gain accuracy is 0.002% typical and acquisition time is as low as 6us to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin, and does not degrade input offset drift. The wide bandwidth allows the LF198 to be included inside the feedback loop of 1 MHz op amps without having stability problems. Input impedance of 10[10] Ohms allows high source impedances to be used without degrading accuracy. P-channel junction FET's are combined with bipolar devices in the output amplifier to give droop rates as low as 5mV/min with a 1uF hold capacitor. The JFETs have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design guarantees no feed-through from input to ouput in the hold mode, even for input signals equal to the supply voltages. Original Creation Date: 06/21/95 Last Update Date: 03/17/97 Last Major Revision Date: 06/21/95
Industry Part Number
LF198
NS Part Numbers
LF198H-SMD*
Prime Die
LF198
Controlling Document
5962-8760801GA*
Processing
MIL-STD-883, Method 5004
Subgrp Description
1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at
Temp ( oC)
+25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55
Quality Conformance Inspection
MIL-STD-883, Method 5005
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
Features
- Operates from +5V to +18V supplies. - Less than 10 uS aquisition time. - TTL, PMOS, CMOS compatible logic input. - 0.5 mV typical hold step at Ch = 0.01 uF. - Low input offset. - 0.002% gain accuracy. - Low output noise in hold mode. - Input characteristics do not change during hold mode. - High supply rejection ratio in sample or hold. - Wide bandwidth. Logic inputs on the LF198 are fully differential with low input current, allowing direct connection to TTL, PMOS, and CMOS, Differential threshold is 1.4V. The LF198 will operate from +5V to +18V supplies.
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
(Absolute Maximum Ratings)
(Note 1) Supply Voltage +18V Power Dissipation (Note 2) (Package Limitation) Operating Ambient Temperature Range Maximum Junction Temperature 150 C Storage Temperature Range -65 C to +150 C Input Voltage Equal to Supply Voltage Logic to Logic Reference Differential Voltage (Note 3) +7V, -30V Output Short Circuit Duration Indefinite Hold Capacitor Short Circuit Duration 10 sec. Lead Temperature (Soldering, 10 seconds) Thermal Resistance ThetaJA Metal Can Pkg (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) ThetaJC Metal Can Pkg Note 1: 260 C
500mW -55 C to +125 C
160 C/W 84 C/W 48 C/W
Note 2:
Note 3:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Although the differential voltage may not exceed the limits given, the common-mode voltage on the logic pins may be equal to the supply voltages without causing damage to the circuit. For proper logic operation, however, one of the logic pins must always be at least 2V below the positive supply and 3V above the negative supply.
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Rl = 10K, Vin = 0V, Chold = 0.01uF, Logic Reference Pin = 0V, Logic Pin = 4V SYMBOL Icc+ PARAMETER Positive Supply Current CONDITIONS +Vcc = 15V, -Vcc = -15V NOTES PINNAME MIN MAX 5.5 6.5 +Vcc = 18V, -Vcc = -18V, Mode = "Sample" +Vcc = 18V, -Vcc = -18V, Mode = "Hold" 5.5 6.5 5.5 6.5 IccNegative Supply Current +Vcc = 15V, -Vcc = -15V -5.5 -6.5 +Vcc = 18V, -Vcc = -18V, Mode = "Sample" +Vcc = 18V, -Vcc = -18V, Mode = "Hold" -5.5 -6.5 -5.5 -6.5 Vos Input Offset Voltage +Vcc = 3V, -Vcc = -7V -3 -5 +Vcc = 15V, -Vcc = -15V -3 -5 +Vcc = 3.5V, -Vcc = -26.5V -3 -5 +Vcc = 18V, -Vcc = -18V -3 -5 +Vcc = 3.5V, -Vcc = -32.5V -3 -5 +Vcc = 26.5V, -Vcc = 3.5V -3 -5 +Vcc = 32.5V, -Vcc = -3.5V, Logic = 2.5V +Vcc = 7V, -Vcc = -3V -3 -5 -3 -5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 UNIT mA mA mA mA mA mA mA mA mA mA mA mA mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV SUBGROUPS 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Rl = 10K, Vin = 0V, Chold = 0.01uF, Logic Reference Pin = 0V, Logic Pin = 4V SYMBOL Ib PARAMETER Input Bias Current CONDITIONS +Vcc = 3V, -Vcc = -7V NOTES PINNAME MIN -25 -75 +Vcc = 15V, -Vcc = -15V -25 -75 +Vcc = 3.5V, -Vcc = -32.5V -25 -75 +Vcc = 32.5V, -Vcc = -3.5V -25 -75 +Vcc = 7V, -Vcc = -3V -25 -75 Ileak(CAP) Leakage Current into Hold Capacitor +Vcc = 3V, -Vcc = -7V +Vcc = 3.5V, -Vcc = -32.5V +Vcc = 32.5V, -Vcc = -3.5V +Vcc = 7V, -Vcc = -3V Vhs Hold Step +Vcc = 15V -Vcc = -15V -100 -100 -100 -100 -2 -5.6 +Vcc = 3.5V, -Vcc = -26.5V -2.5 -5.6 +Vcc = 26.5V, -Vcc = -3.5V -2.5 -5.6 Ae Gain Error +Vcc = 7V, -Vcc = -3V MAX 25 75 25 75 25 75 25 75 25 75 100 100 100 100 2 5.6 2.5 5.6 2.5 5.6 0.02 0.06 +Vcc = 3.5V, -Vcc = -26.5V 0.005 0.02 +Vcc = 32.5V, -Vcc = -3.5V 0.005 0.06 +Vcc = 26.5V, -Vcc = -3.5V 0.005 0.02 UNIT nA nA nA nA nA nA nA nA nA nA pA pA pA pA mV mV mV mV mV mV % % % % % % % % SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 1 1 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Rl = 10K, Vin = 0V, Chold = 0.01uF, Logic Reference Pin = 0V, Logic Pin = 4V SYMBOL Zi PARAMETER Input Impedance CONDITIONS +Vcc = 8V, -Vcc = -28V NOTES PINNAME MIN 10 0.8 +Vcc = 28V, -Vcc = -8V 10 0.8 Zo Output Impedance +Vcc = 18V, -Vcc = -18V 2 4 Icharge Capacitor Charging Current +Vcc = 8V, -Vcc = -28V -25 -25 +Vcc = 28V, -Vcc = -8V 4.5 3 Logic Logic Pin Current +Vcc = 18V, -Vcc = -18V, Mode = "Sample", Logic = 7V +Vcc = 18V, -Vcc = -18V, Mode = "Hold", Logic = -30V Vos Input Offset Voltage Input Offset Voltage Output Short Circuit Current Output Short Circuit Current Logic Reference Pin Current +Vcc = 15V, -Vcc = -15V, IDRIVE = +1mA -3.5 -6 Delta Vos +Vcc = 15V, -Vcc = -15V, IDRIVE = +1mA to -1mA +Vcc = 18V, -Vcc = -18V +Vcc = 18V, -Vcc = -18V +Vcc = 18V, -Vcc = -18V, Mode = "Sample", Logic = 7V +Vcc = 18V, -Vcc = -18V, Mode = "Hold", Logic = -30V PSRR Power Supply Rejection Ratio +Vcc = 10V, -Vcc = -15V 80 74 +Vcc = 15V, -Vcc = -10V 80 74 -1.1 -2 Ios+ IosIlogicref 7 -25 -1 -0.5 -4.5 -3 25 25 10 1 0.5 3.5 6 1.1 2 20 7 1 5 10 MAX UNIT SUBGROUPS
GOhm 1 GOhm 2, 3 GOhm 1 GOhm 2, 3 Ohm Ohm mA mA mA mA uA uA uA mV mV mV mV mA mA uA uA uA dB dB dB dB 1 2, 3 1 2, 3 1 2, 3 1, 2, 3 1 2, 3 1 2, 3 1 2, 3 1 1 1 2, 3 1, 2, 3 1 2, 3 1 2, 3
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MDLF198-X REV 0A0
MICROCIRCUIT DATA SHEET
Electrical Characteristics
DC PARAMETERS(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: Vcc = +15V, Rl = 10K, Vin = 0V, Chold = 0.01uF, Logic Reference Pin = 0V, Logic Pin = 4V SYMBOL FTRR PARAMETER Feedthrough Rejection Ratio CONDITIONS +Vcc = 3.5V, -Vcc = -32.5V NOTES PINNAME MIN 86 74 +Vcc = 32.5V, -Vcc = -3.5V 86 74 Vth Vos(2nd Stg) Differential Logic Level 2nd Stage Vos +Vcc = 3.5V, -Vcc = -32.5V 1 0.8 -35 -50 +Vcc = 3V, -Vcc = -7V -35 -50 +Vcc = 32.5V, -Vcc = -3.5V -35 -50 +Vcc = 7V, -Vcc = -3V -35 -50 2.4 +35 +50 +35 +50 +35 +50 +35 +50 MAX UNIT dB dB dB dB V mV mV mV mV mV mV mV mV SUBGROUPS 1 2, 3 1 2, 3 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3
AC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.) AC: Vcc = +15V, Rl = 10K, Vin = 0V, Chold = 0.01uF, Logic Reference Pin = 0V, Logic Pin = 4V Taq Acquisition Time Delta Vout = 10V, Chold = 1000pF Chold = 0.01uF Note 1: Parameter tested go-no-go only. 6 25 uS uS 4 4
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