 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MK1714-02 Spread Spectrum Multiplier Clock Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread designed to generate high frequency clocks with low EMI. Using analog/digital Phase Locked Loop (PLL) techniques, the device accepts an inexpensive, fundamental mode, parallel resonant crystal or clock input to produce a spread or dithered output. This reduces the EMI amplitude peaks at the odd harmonics by several dB. The OE pin puts both outputs into a high impedance state for board level testing. The PD pin powers down the entire chip and the outputs are held low. Features * * * * * * * * * * * * Packaged in 20-pin tiny SSOP Available in Pb (lead) free package Operating voltage of 3.3 V or 5 V Multiplier modes of x1, x2, x3, x4, x5, and x6 Inexpensive 10 - 25 MHz crystal or clock input OE pin tri-states the outputs for board testing Power down pin stops the outputs low Selectable frequency spread Spread can be turned on or off Advanced, low power CMOS process Duty cycle of 40/60 Industrial temperature range available Block Diagram V DD 2 S4:0 PD Low E M I E nable 5 P LL Clock M ultiplier and Spread S pectrum Circuitry Clock O ut Input Crystal or Clock X1 Crystal O scillator X2 RE F X SE L 4 O E (both outputs) G ND MDS 1714-02 I 1 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock Pin Assignment X2 X1/ICLK VDD VDD S4 S3 GND GND S2 CLK 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 REF OE PD GND S0 NC S1 GND LEE XSEL 20 pin (150 mil) SSOP (QSOP) Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 18 19 20 Pin Name X2 X1 VDD VDD S4 S3 GND GND S2 CLK XSEL LEE GND S1 GND PD OE REF Pin Type XO XI Power Power Input Input Power Power Input Pin Description Crystal connection. Connect to parallel mode crystal. Leave open for clock. Crystal connection. Connect to parallel mode crystal or clock. Connect to VDD. Must be same value as other VDD. Connect to VDD. Must be same value as other VDD. Select pin 4. Determines multiplier and spread amount per table on following page. Internal pull-down. Select pin 3. Determines multiplier and spread amount per table on following page. Internal pull-up. Connect to ground. Connect to ground. Select pin 2. Determines multiplier and spread amount per table on following page. Internal pull-up. Connect to VDD for crystal input, or GND for CLK input. Internal pull-down. Low EMI Enable. Turns on spread spectrum on CLK when high. Internal pull-up. Connect to ground. Select pin 1. Determines multiplier and spread amount per table on following page. Internal pull-up. Connect to ground. Power down. Turns off chip when low. Outputs stop low. Leave open or connected to VDD if power down is not required. Output enable. Tri-states all outputs when low. Internal pull-up. Output Clock output dependent on input, multiplier, and spread amount per table on following page. Input Input Power Input Power Input Input Output Reference clock output from crystal oscillator. This clock is not spread. Note: When changing the input frequency, the LEE pin must be set low for minimum of 10s to allow the PLL to lock to the new frequency. Alternatively, the PD pin may be set low while changing frequencies. MDS 1714-02 I 2 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock Clock Output Select Table (MHz) S4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Input Range 40 - 80 60 - 120 40 - 80 80 - 150 10 - 30 20 - 60 10 - 25 20 - 60 20 - 30 40 - 75 40 - 100 40 - 75 20 - 40 20 - 60 10 - 20 10 - 30 20 - 37.5 20 - 40 10 - 30 20 - 30 5 - 20 20 - 50 20 - 37.5 80 - 150 10 - 25 10 - 20 10 - 20 20 - 50 10 - 25 10 - 20 10 - 20 10 - 30 Multiplier x1 x1 x1 x1 x2 x2 x2 x2 x3 x2 x1 x2 x1 x1 x1 x1 x4 x3 x1 x1 x2 x3 x4 x1 x4 x5 x6 x1 x4 x5 x6 x1 Output Range 40 - 80 60 -120 40 - 80 80 - 150 20 - 60 40 - 120 20 - 50 40 - 120 60 - 90 80 - 150 40 - 100 80 - 150 20 - 40 20 - 60 10 - 20 10 - 30 80 - 150 60 - 120 10 - 30 20 - 30 10 - 40 60 - 150 80 - 150 80 - 150 40 - 100 50 - 100 60 - 120 20 - 50 40 - 100 50 - 100 60 - 120 10 - 30 Direction C DC C C C C DC DC C C DC DC DC DC DC DC DC DC C D DC D C DC C C C C DC DC D C Amount (%) 0.75 +0.25, -0.75 1.25 0.75 0.75 0.5 +0.25, -1.5 +0.5, -1 0.5 0.75 +0.25, -1.5 +0.25, -1.5 +0.5, -2.0 +0.25, -1.5 +0.5, -2.0 +0.25, -1.5 +0.25, -1.25 +0.25, -1.5 0.75 -0.5 +0.25, -2.25 -0.25, -2.25 0.75 +0.25, -1.25 0.75 0.75 0.75 0.75 +0.25, -1.5 +0.25, -1.25 -1.5 0.75 3.3/5V Both Both Both Both Both Both Both Both Both Both Both Both 3.3V Both Both Both Both Both Both Both 3.3V Both Both Both Both Both Both Both Both Both Both Both For S4:S0, 0 = connect to GND, 1 = connect to VDD. Direction: C = center spread, D = down spread, DC = down + center spread. Amount = spread amount. For example, for a 40 MHz output clock spread down 1%, the lowest frequency is 39.60 MHz. Contact ICS (ics-mk@icst.com) with your exact output frequency for details on spread direction and amount. MDS 1714-02 I 3 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock External Components The MK1714-02 requires a minimum number of external components for proper operation. Decoupling Capacitor A decoupling capacitor of 0.01F must be connected between VDD and GND, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces. 3) To minimize EMI the 33 series termination resistor, if needed, should be placed close to the clock output. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the MK1714-02. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Series Termination Resistor When the PCB trace between the clock outputs and the loads are over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Crystal Tuning Load Capacitors Crystal Load Capacitors The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) been the crystal and device. Crystal capacitors must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL-6)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be [16 - 6]*2 = 20 pF. Powerup Considerations To insure proper operation of the spread spectrum generation circuit, some precautions must be taken in the implementation of the MK1714-02. 1) An input signal should not be applied to ICLK until VDD is stable (within 10% of its final value). This requirement can be easily met by operating the MK1714-02 and the ICLK source from the same power supply. 2) LEE should not be enabled (taken high) until after the power supplies and input clock are stable. This requirement can be met by direct control of LEE by system logic; for example, a "power good" signal. Another solution is to leave LEE unconnected to anything but a 0.01F capacitor to ground. The pull-up resistor on LEE will charge the capacitor and provide approximately a 700s delay until spread spectrum is enabled. 3) If the input frequency is changed during operation, disable spread spectrum until the input clock stabilizes at the new frequency. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. MDS 1714-02 I 4 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1714-02. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V Rating -0.5V to VDD+0.5V -40 to +85C -65 to +150C 175C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +3.0 Typ. Max. +70 +5.5 Units C V DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85C Parameter Operating Voltage Supply Current Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Short Circuit Current On Chip Pull-up Resistor, inputs On-Chip Pull-down Resistor, outputs Input Capacitance Symbol VDD IDD IDD VIH VIL VOH VOL IOS RPU RPD Conditions No load, at 3.3 V No load, at 5 V Select inputs, OE, PD Select inputs, OE, PD IOH = -8 mA IOL = 8 mA Each output Except X1 S4 pin only Except X1, X2 Min. 3.0 Typ. 26 40 Max. 5.5 Units V mA mA V 2 0.8 VDD-0.4 0.4 50 500 500 7 V V V mA k k pF MDS 1714-02 I 5 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85 C Parameter Input Crystal Frequency Input Clock Frequency Output Rise Time Output Fall Time One Sigma Jitter Absolute Jitter Output Clock Duty Cycle Output Frequency Output Frequency Synthesis Error Symbol Conditions Min. 10 10 Typ. Max. Units 25 150 1.5 1.5 MHz MHz ns ns ps 60 200 % MHz ppm tOR tOF 0.8 to 2.0 V 2.0 to 0.8 V CLK CLK at VDD/2 40 2 1 40 160 50 Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 135 93 78 60 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 1714-02 I 6 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1714-02 Spread Spectrum Multiplier Clock Package Outline and Package Dimensions (20 pin SSOP, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 20 Millimeters Symbol Min Max Inches Min Max E1 INDEX AREA E 12 D A A1 A2 b C D E E1 e L 1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 8.55 8.75 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0 8 .053 .069 .0040 .010 -.059 0.008 0.012 .007 .010 .337 .344 .228 .244 .150 .157 0.025 Basic .016 .050 0 8 A 2 A 1 A c -Ce b SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number MK1714-02R MK1714-01RTR MK1714-02RI MK1714-02RITR MK1714-02RLF MK1714-01RLFTR MK1714-02RILF MK1714-02RILFTR Marking MK1714-02R MK1714-02R MK1714-02RI MK1714-02RI MK1714-02RL MK1714-02RL MK171402RIL MK171402RIL Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Package 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP Temperature 0 to +70 C 0 to +70 C -40 to 85 C -40 to 85 C 0 to +70 C 0 to +70 C -40 to 85 C -40 to 85 C Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 1714-02 I 7 Revision 042805 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com |
Price & Availability of MK171402
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |