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19-2486; Rev 0; 7/02
+14dBm to +20dBm LO Buffers with 1dB Variation
General Description
The MAX9989 and MAX9990 LO buffers provide the high output (+14dBm to +20dBm) necessary to drive the LO inputs of high-linearity passive mixers, while offering 40dB reverse isolation to prevent LO pulling. The MAX9989 is internally matched for the cellular/GSM bands, and the MAX9990 is matched for the DCS/PCS/UMTS bands. The Typical Application Circuit provides a nominal +17dBm output power with 1dB variation over supply, temperature, and input power. With two optional resistors, the output power can be precision set from +14dBm to +20dBm. The devices offer more than 35dB main driver output to PLL amp output isolation. Each device is offered in a 5mm 5mm 20-pin thin QFN package with exposed paddle. o 1dB Output Power Variation o +14dBm to +20dBm Adjustable Output Power o 40dB Reverse Isolation o Better Than 35dB Main Driver Output to PLL Amp Output Isolation o Low Output Noise: -170dBc/Hz at +17dBm o 110mA Supply Current at +17dBm o ESD Protection o Isolated PLL Output (+3dBm)
Features
MAX9989/MAX9990
Applications
Cellular/GSM/DCS/PCS/UMTS Base Station Tx/Rx LO Drives Coherent Receivers ISM Wireless LAN Wireless Local Loop Local Multipoint Distribution Service Point-to-Point Systems
PART
Ordering Information
TEMP RANGE PINPACKAGE 20 Thin QFN-EP* FREQUENCY RANGE (MHz) 700 to 1100
MAX9989ETP -40C to +85C
MAX9990ETP -40C to +85C 20 QFN-EP* 1500 to 2200
*EP = Exposed paddle.
Typical Application Circuit/Pin Configuration appears at end of data sheet.
Typical Operating Circuit and Block Diagram
PLL BUFFER TO PLL PRESCALER OUTPLL (+3dBm)
MAX9989 MAX9990
OUTPUT AMP INPUT AMP
RF INPUT
IN (+7dBm) RF LO
OUTLO (+17dBm)
IF OUTPUT
BIAS
BIASIN
BIASOUT
BIAS CONTROL NETWORK
________________________________________________________________ Maxim Integrated Products
1
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+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
ABSOLUTE MAXIMUM RATINGS
VCC1, VCC2, VCC3, VCCREF to GND .................-0.3V to +6.0V IN to GND ...................................................-0.3V to (VCC + 0.3V) OUTLO, OUTPLL to GND...........................-0.3V to (VCC + 0.3V) REF to GND ......................................................Source/Sink 5mA INBIAS, OUTBIAS to GND...................................-0.3V to +0.75V PLLBIAS ......................................................................Sink 25mA RF Input Power ...............................................................+20dBm Continuous Power Dissipation (TA = +70C) 20-Pin Thin QFN (derate 21mW/C above +70C) ....1667mW JA .................................................................................+48C/W Junction Temperature ......................................................+150C Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS--MAX9989
(Typical Application Circuit, VCC = 4.75V to 5.25V, input and outputs terminated in 50, TA = -40C to +85C. Typical specifications are for VCC = 5.0V and TA = +25C.) (Note 1)
PARAMETER Supply Voltage SYMBOL VCC Low power setting (see Table 1 for resistor values) Supply Current ICC Nominal power setting (R2-R5 not installed) (Note 2) High power setting (see Table 1 for resistor values) 94 CONDITIONS MIN 4.75 TYP 5.00 77 105 146 116 mA MAX 5.25 UNITS V
DC ELECTRICAL CHARACTERISTICS--MAX9990
(Typical Application Circuit, VCC = 4.75V to 5.25V, input and outputs terminated in 50, TA = -40C to +85C. Typical specifications are for VCC = 5.0V and TA = +25C.) (Note 1)
PARAMETER Supply Voltage SYMBOL VCC Low power setting (see Table 1 for resistor values) Supply Current ICC Nominal power setting (R2-R5 not installed) (Note 2) High power setting (see Table 1 for resistor values) 98 CONDITIONS MIN 4.75 TYP 5.00 87 111 154 122 mA MAX 5.25 UNITS V
2
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+14dBm to +20dBm LO Buffers with 1dB Variation
AC ELECTRICAL CHARACTERISTICS--MAX9989
(Typical Application Circuit, VCC = 4.75V to 5.25V, 50 environment, +4dBm < PIN < +10dBm, 700MHz < fIN < 1100MHz, TA = -40C to +85C, unless otherwise noted. Typical specifications are for VCC = 5.0V, PIN = +7dBm, fIN = 900MHz, and TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Operating Frequency SYMBOL f CONDITIONS Low power setting, PIN = +4dBm (see Table 1 for resistor values) Nominal power setting, +4dBm < PIN < +10dBm 4.75V < VCC < 5.25V -40C < TA < +85C (R2-R5 not installed) High power setting, PIN = +10dBm (see Table 1 for resistor values) Output Power (PLL Driver) Input VSWR Output VSWR Output-Noise Power Density OUTLO to RFIN Isolation POUTPLL VSWRIN VSWROUT PNOISE S12 VCC = 5.0V, 100MHz offset (R2-R5 not installed) VCC = 5.0V, nominal power setting (R2-R5 not installed) MIN 700 TYP MAX 1100 UNITS MHz
MAX9989/MAX9990
14.3
Output Power
POUTLO
17.3 0.8
dBm
19.7 3.7 1.2:1 1.7:1 -152 48 dBm/Hz dB dBm
AC ELECTRICAL CHARACTERISTICS--MAX9990
(Typical Application Circuit, VCC = 4.75V to 5.25V, 50 environment, +6dBm < PIN < +12dBm, 1500MHz < fIN < 2200MHz, and TA = -40C to +85C, unless otherwise noted. Typical specifications are for VCC = 5.0V, PIN = +9dBm, fIN = 1800MHz, and TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Operating Frequency SYMBOL f Low power setting, PIN = +6dBm (see Table 1 for resistor values) Nominal power setting, +6dBm < PIN < +12dBm 4.75V < VCC < 5.25V -40C < TA < +85C (R2-R5 not installed) High power setting, PIN = +12dBm (see Table 1 for resistor values) Output Power (PLL Driver) Input VSWR Output VSWR Output-Noise Power Density OUTLO to RFIN Isolation POUTPLL VSWRIN VSWROUT PNOISE S12 VCC = 5.0V, 100MHz offset VCC = 5.0V, nominal power setting (R2-R5 not installed) CONDITIONS MIN 1500 14.2 TYP MAX 2200 UNITS MHz
Output Power
POUTLO
17.3 0.8
dBm
19.5 3.6 1.5:1 1.4:1 -152 49 dBm/Hz dB dBm
Note 1: Devices are 100% DC screened and AC production tested for functionality. Data sheet typical specifications are derived from the average of 30 units from a typical lot, and are tested under the conditions specified for the typical specifications. Note 2: DC current limits at -40C are guaranteed by design and characterization. _______________________________________________________________________________________ 3
+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Typical Operating Characteristics
(VCC = 5.0V, nominal bias, fIN = 900MHz, PIN = +7dBm, TA = +25C, unless otherwise noted.) (Shaded regions are outside the guaranteed operating range, and are provided for reference only.)
MAX9989
SUPPLY CURRENT vs. OUTPUT POWER OUTLO
MAX9989 toc01
OUTPUT POWER vs. INPUT POWER OUTLO
MAX9989 toc02
OUTPUT POWER vs. INPUT POWER OUTPLL
5 4 OUTPUT POWER (dBm) 3 2 1 0 -1 -2 -3 -4 TA = +85C TA = +25C TA = -40C
MAX9989 toc03
120
20 19 18 OUTPUT POWER (dBm) 17 16 15 14 13 12 TA = +85C TA = -40C TA = +25C
6
SUPPLY CURRENT (mA)
115 TA = +85C 110 TA = +25C
105 TA = -40C 100 10 11 12 13 14 15 16 17 18 19 20 OUTPUT POWER (dBm)
11 10 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 INPUT POWER (dBm)
-6
-4
-2
0
2
4
6
8
10
INPUT POWER (dBm)
OUTPUT POWER vs. FREQUENCY OUTLO
MAX9989 toc04
OUTPUT POWER vs. FREQUENCY OUTPLL
MAX9989 toc05
20 19 OUTPUT POWER (dBm) 18 17 16 15 14 500 600 700 800 900 TA = +85C
7 6 OUTPUT POWER (dBm) 5 4 3 2 1 0 TA = -40C TA = +25C TA = +85C
TA = -40C
TA = +25C
1000 1100 1200
500
600
700
800
900
1000 1100 1200
OPERATING FREQUENCY (MHz)
OPERATING FREQUENCY (MHz)
OUTPUT POWER AND SUPPLY CURRENT vs. TEMPERATURE
18.0 17.8 17.6 OUTPUT POWER (dBm) 17.4 17.2 17.0 16.8 16.6 16.4 16.2 16.0 -40 -20 0 20 40 60 80 AMBIENT TEMPERATURE (C) POUTLO ICC
MAX9989 toc06
OUTPUT POWER vs. SUPPLY VOLTAGE
112.0 111.5 111.0 110.5 110.0 109.5 109.0 108.5 108.0 107.5 107.0 SUPPLY CURRENT (mA) OUTLO OUTPUT POWER (dBm) 18.0 17.5 OUTLO 17.0 16.5 16.0 15.5 15.0 14.5 14.0 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V) OUTPLL
MAX9989 toc07
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 OUTPLL OUTPUT POWER (dBm)
4
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+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Typical Operating Characteristics (continued)
(VCC = 5.0V, nominal bias, fIN = 900MHz, PIN = +7dBm, TA = +25C, unless otherwise noted.) (Shaded regions are outside the guaranteed operating range, and are provided for reference only.)
MAX9989
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9989 toc08
SMALL-SIGNAL GAIN vs. FREQUENCY
VCC = 5V TA = +25C PIN = -15dBm NOMINAL BIAS
MAX9989 toc09
INPUT RETURN LOSS vs. FREQUENCY
-5 -10 RETURN LOSS (dB) -15 -20 -25 -30 VCC = 5V TA = +25C PIN = +7dBm
MAX9989 toc10
120 115 SUPPLY CURRENT (mA) 110 105 100 95 90 4.5 4.7 4.9 5.1 5.3 PLL NOT BIASED PLL BIASED
19 18 17 GAIN (dB) 16 15 14 13
0
-35 -40 500 600 700 800 900 1000 1100 1200 500 600 700 800 900 1000 1100 FREQUENCY (MHz) FREQUENCY (MHz)
5.5
SUPPLY VOLTAGE (V)
OUTPUT RETURN LOSS vs. FREQUENCY
2 4 RETURN LOSS (dB) 6 8 10 12 14 16 18 20 500 600 700 800 900 1000 1100 FREQUENCY (MHz) OUTPLL OUTLO VCC = 5V TA = +25C PIN = +7dBm
MAX9989 toc11
OUT-TO-IN ISOLATION vs. FREQUENCY
-25 -30 ISOLATION (dB) -35 -40 -45 -50 -55 -60 -65 -70 500 600 700 800 900 1000 1100 FREQUENCY (MHz) OUTLO TO IN OUTPLL TO IN VCC = 5V TA = +25C PIN = +7dBm
MAX9989 toc12
0
-20
PLL ISOLATION vs. FREQUENCY
MAX9989 toc13
OUTPUT NOISE POWER vs. INPUT POWER
100MHz OFFSET NOISE POWER (dBm/Hz) -145
MAX9989 toc14
-20 -25 -30 ISOLATION (dB) -35 -40 -45 -50 -55 -60 -65 -70 500 600 700 800 900 1000 OUTLO TO OUTPLL OUTPLL TO OUTLO VCC = 5V TA = +25C PIN = +7dBm
-140
-150
-155
-160 1100 4 5 6 7 8 9 10 11 12 13 FREQUENCY (MHz) INPUT POWER (dBm)
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5
+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Typical Operating Characteristics (continued)
(VCC = 5.0V, nominal bias, fIN = 1800MHz, PIN = +9dBm, TA = +25C, unless otherwise noted.) (Shaded regions are outside the guaranteed operating range, and are provided for reference only.)
MAX9990
SUPPLY CURRENT vs. OUTPUT POWER OUTLO
MAX9990 toc01
OUTPUT POWER vs. INPUT POWER OUTLO
MAX9990 toc02
OUTPUT POWER vs. INPUT POWER OUTPLL
5 4 OUTPUT POWER (dBm) 3 2 1 0 -1 -2 -3 -4 TA = +85C TA = +25C
MAX9990 toc03
140 135 SUPPLY CURRENT (mA) 130 125 120 115 110 105 100 8 9 TA = -40C TA = +85C TA = +25C
20 19 18 OUTPUT POWER (dBm) 17 16 15 14 13 12 11 10 TA = +85C TA = +25C TA = -40C
6 TA = -40C
10 11 12 13 14 15 16 17 18 OUTPUT POWER (dBm)
-5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 INPUT POWER (dBm)
-6
-4
-2
0
2
4
6
8
10
INPUT POWER (dBm)
OUTPUT POWER vs. FREQUENCY OUTLO
MAX9990 toc04
OUTPUT POWER vs. FREQUENCY OUTPLL
TA = +85C 5 OUTPUT POWER (dBm) 4 3 2 1 0 TA = -40C TA = +25C
MAX9990 toc05
MAX9990 toc07
20 19 18 OUTPUT POWER (dBm) 17 16 15 14 13 12 11 10 TA = +85C TA = -40C TA = +25C
6
1500 1600 1700 1800 1900 2000 2100 2200 OPERATING FREQUENCY (MHz)
1500 1600 1700 1800 1900 2000 2100 2200 OPERATING FREQUENCY (MHz)
OUTPUT POWER AND SUPPLY CURRENT vs. TEMPERATURE
18.0 17.5 OUTPUT POWER (dBm) 17.0 16.5 ICC 16.0 15.5 15.0 -40 -20 0 20 40 60 80 AMBIENT TEMPERATURE (C) 110 105 100 POUTLO
MAX9990 toc06
OUTPUT POWER vs. SUPPLY VOLTAGE
130 125 120 115 SUPPLY CURRENT (mA) 18.0 17.5 OUTLO OUTPUT POWER (dBm) OUTLO 17.0 16.5 16.0 15.5 15.0 14.5 14.0 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V) OUTPLL 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 OUTPLL OUTPUT POWER (dBm)
6
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+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Typical Operating Characteristics (continued)
(VCC = 5.0V, nominal bias, fIN = 1800MHz, PIN = +9dBm, TA = +25C, unless otherwise noted.) (Shaded regions are outside the guaranteed operating range, and are provided for reference only.)
MAX9990
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9990 toc08
SMALL-SIGNAL GAIN vs. FREQUENCY OUTLO
MAX9990 toc09
INPUT RETURN LOSS vs. FREQUENCY
VCC = 5V TA = +25C PIN = +9dBm
MAX9990 toc10
120
18 17 16 GAIN (dB) -40C +25C VCC = 5V PIN = -15dBm NOMINAL BIAS
-6 -8 RETURN LOSS (dB) -10 -12 -14 -16
SUPPLY CURRENT (mA)
115 PLL BIASED 110
15 14 13
105 PLL NOT BIASED 100 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V)
12 11 10
+85C -18 -20 1500 1600 1700 1800 1900 2000 2100 2200 FREQUENCY (MHz) 1500 1600 1700 1800 1900 2000 2100 2200 FREQUENCY (MHz)
OUTPUT RETURN LOSS vs. FREQUENCY
5 10 RETURN LOSS (dB) 15 20 25 OUTPLL 30 35 40 1500 1600 1700 1800 1900 2000 2100 2200 FREQUENCY (MHz) OUTLO ISOLATION (dB) VCC = 5V TA = +25C PIN = +9dBm
MAX9990 toc11
OUT-TO-IN ISOLATION vs. FREQUENCY
20 25 30 35 40 45 50 55 60 65 1500 1600 1700 1800 1900 2000 2100 2200 FREQUENCY (GHz) OUTLO TO IN OUTPLL TO IN VCC = 5V TA = +25C PIN = +9dBm
MAX9990 toc12
0
15
PLL ISOLATION vs. FREQUENCY
MAX9990 toc13
OUTPUT NOISE POWER vs. INPUT POWER
100MHz OFFSET NOISE POWER (dBm/Hz) -145
MAX9990 toc14
-15 -20 -25 ISOLATION (dB) -30 -35 -40 -45 -50 -55 -60 -65 VCC = 5V TA = +25C PIN = +9dBm OUTLO TO PLL PLL TO OUTLO
-140
-150
-155
-160 1500 1600 1700 1800 1900 2000 2100 2200 FREQUENCY (MHz) 4 5 6 7 8 9 10 11 12 13 INPUT POWER (dBm)
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7
+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Pin Description
PIN 1, 4, 8, 9, 13-18, EP 2 3 5 NAME GND IN VCCREF REF FUNCTION Ground. Provide 5-10 plated vias from EP to system ground plane for optimal thermal and RF performance. Input. Internally matched 50 RF input. AC couple to this pin so as not to disturb input bias level. Supply. Supply connection for on-chip voltage and current references. See Applications Information for information on decoupling. Voltage Reference Output. Output for on-chip 1.5V bandgap voltage reference. See the Applications Information section for information on decoupling. Bias Connection for Input Buffer. Set compressed power point for input amplifier with a resistor to REF or GND. For +17dBm output power, no external biasing resistors are required. See the Applications Information section for more information. Bias Connection for LO Output Amplifier. Set compressed power point for OUTLO with a resistor to REF or ground. For +17dBm output power, no external biasing resistors are required. See the Applications Information section for more information. LO Output. Internally matched 50 RF output. AC couple to this pin so as not to disturb output bias level. Supply. Supply connection for OUTLO. Supply. Supply connection for input amplifier. PLL Output. Output for driving optional external PLL. Requires external 100 pullup to VCC for bias. For applications not requiring the PLL driver, removing R1 leaves OUTPLL unbiased, saving about 12mA current.
6
BIASIN
7
BIASOUT
10 11, 12 19 20
OUTLO VCC2 VCC1 OUTPLL
Detailed Description
The MAX9989/MAX9990 LO buffers each consist of a single-input amplifier, an output amplifier, and a second buffer amplifier to drive the LO's PLL. The bias currents for the amplifiers are adjustable through off-chip resistors, allowing the output level to be precision set anywhere from +14dBm to +20dBm. The PLL output is preset to +3dBm (about 900mVP-P into 50). Power levels are typically 1dB over the full supply, input power, and temperature range. Precision power control is achieved by internal control circuitry. Maintaining tight power control keeps the system engineer from over specifying the LO drive in order to guarantee a linearity specification in the base-station mixer. More than 40dB isolation between the LO output and the input prevents VCO pulling. The MAX9989 is specified from 700MHz to 1100MHz, and the MAX9990 is specified from 1500MHz to 2200MHz. Both are offered in compact 5mm 5mm 20pin QFN thin packages with EP.
Input Amplifier
A single low-noise input amplifier provides gain and isolation. The compressed output power for this stage is controlled by the bias setting resistors R2 or R4 (see the Typical Application Circuit). These resistors are not required for the nominal +17dBm output; see Table 1 for bias resistor values to obtain +14dBm to +20dBm output power. The input is internally matched to 50, and typical VSWR is no more than 2:1 over all operating conditions. Since the input is internally biased, provide a DC block at the input pin.
PLL Amplifier and Output
A small amount of power is tapped off from the input amplifier's output, and fed to a high-isolation buffer to drive the PLL output at about +3dBm. If the PLL output is not required, it can be disabled by removing R1; disabling the PLL output saves 12mA supply current.
8
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+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Table 1. External Resistor Values for +14dBm to +20dBm Output Power
NOMINAL OUTPUT POWER (dBm) +20 +19 +18 +17 +16 +15 +14 R2 (k) 1.35 2.2 5.0 Open Open Open Open R4 (k) Open Open Open Open 1.8 0.9 0.6 R3 (k) 2.0 3.0 6.0 Open Open Open Open R5 (k) Open Open Open Open 3.0 1.1 0.6 MAX9989 INPUT DRIVE (dBm) 10 3 9 3 8 3 7 3 6 3 5 3 4 3 MAX9990 INPUT DRIVE (dBm) 12 3 11 3 10 3 9 3 8 3 7 3 6 3
Table 2. Component Values for Typical Application Circuit
COMPONENT VALUE DESIGNATION MAX9989 (LOWBAND) 47pF 0.1F 5pF See Table 1 100 MAX9990 (HIGHBAND) 22pF 0.1F 22pF See Table 1 100
Applications Information
Input and Output Matching
All input and output matching is accomplished on chip; no external matching circuitry is required. Use a DC block of about 47pF (low band) or 22pF (high band) at the input and the outputs. Because these parts are internally broadband matched, adjusting external component values can optimize performance for a particular band.
C1, C2, C4, C6, C8, C9, C10 C3, C7, C11 C5 R2-R5 R1
Input Drive Level
In the case of the MAX9989, the typical required input drive level is +7dBm for +17dBm output, or +10dBm for +20dBm output. The MAX9990 uses slightly higher input levels (see Table 1). The typical VCO cannot provide sufficient drive by itself; the typical application follows the VCO with attenuation (about +3dB), and then with a low-noise gain block. This allows the VCO to drive the MAX9989/MAX9990 input at the required level without being load-pulled.
Output Amplifier
The output amplifier is similar to the input amplifier, except it is biased higher to provide more output power. For example, with an input power of +10dBm, the MAX9989 can deliver +20dBm. The bias is adjustable; see Table 1 for details. The RF output is internally matched to 50, with a typical VSWR limit of 2:1. Provide DC-blocking capacitors at the outputs.
Output Drive Level
The output drive of the MAX9989/MAX9990 is nominally +17dBm 1dB. This is the typical application, with no external bias-setting resistors at INBIAS and OUTBIAS. Output power can be set from +14dBm to +20dBm by using the bias-setting resistor values listed in Table 1.
Chip Information
TRANSISTOR COUNT: 89 PROCESS: BiCMOS
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9
+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Typical Application Circuit/Pin Configuration
5.0V 5.0V
C11
C10
C7 R1 100
C8
OUTPLL
VCC1
GND
GND
OUT TO PLL (+3dBm)
C9 GND
20
19
18
17
16 GND
1
GND 15
INPUT FROM LO C1 5.0V C3 C2
IN
2
MAX9989 MAX9990
14
GND
VCCREF
3
13
GND
GND
VCC2 4 BIAS 5 11 12 VCC2 C5 6 BIASIN 7 BIASOUT 8 GND 9 GND 10 OUTLO C6
5.0V
REF
TO OUTPUT 2 C4
R4*
R5*
R2*
R3*
FOR THESE VALUES, SEE TABLE 1. FOR CAPACITOR VALUES, SEE TABLE 2.
10
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+14dBm to +20dBm LO Buffers with 1dB Variation
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX9989/MAX9990
0.15 C A
D2
C L
D
b D2/2
0.10 M C A B
PIN # 1 I.D.
D/2
0.15 C B
k
PIN # 1 I.D. 0.35x45
E/2 E2/2 E (NE-1) X e
C L
E2
k L
DETAIL A
e (ND-1) X e
C L
C L
L
L
e 0.10 C A 0.08 C
e
C
A1 A3
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL DOCUMENT CONTROL NO. REV.
21-0140
C
1 2
______________________________________________________________________________________
11
+14dBm to +20dBm LO Buffers with 1dB Variation MAX9989/MAX9990
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
COMMON DIMENSIONS
EXPOSED PAD VARIATIONS
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220. 10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL DOCUMENT CONTROL NO. REV.
21-0140
C
2 2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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