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LMV710 and LMV711 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option
June 2000
LMV710 and LMV711 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option
General Description
The LMV710 and LMV711 are BiCMOS operational amplifiers with CMOS input stage. Both devices have greater than RR input common mode voltage range, rail-to-rail output and high output current drive. They offer a bandwidth of 5MHz and a slew rate of 5V/s. On the LMV711, a separate shutdown pin can be used to disable the device and reduces the supply current to 0.2A (typical). The LMV711 features a turn on time of less than 10s. It is an ideal solution for power sensitive applications, such as cellular phone, pager, palm computer, etc. The LMV710 is offered in the space saving SOT23-5 Tiny package. The LMV711 is offered in the space saving SOT23-6 Tiny package. The LMV710/711 are designed to meet the demands of low power, low cost, and small size required by cellular phones and similar battery powered portable electronics.
Features
(For 5 Supply, Typical Unless Otherwise Noted). n Low offset voltage 3mV, max n Gain-bandwidth product 5MHz, typ n Slew rate 5V/s, typ n Space saving packages SOT23-5 and SOT23-6 < 10s n Turn on time from shutdown n Industrial temperature range -40C to +85C n Supply current in shutdown mode 0.2A, typ n Guaranteed 2.7V and 5V Performance n Unity gain stable n Rail-to-rail input and output n Capable of driving 600 load
Applications
n n n n n n n Wireless phones GSM/TDMA/CDMA power amp control AGC, RF power detector Temperature compensation Wireless LAN Bluetooth HomeRF
Typical Application
High Side Current Sensing
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(c) 2000 National Semiconductor Corporation
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LMV710 and LMV711
Connection Diagrams
5-Pin SOT23-5 LMV710 6-Pin SOT23-6 LMV711
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Top View
Top View
Ordering Information
Package Temperature Range Industrial -40C to +85C LMV710M5 LMV710M5X 6-Pin SOT23-6 LMV711M6 LMV711M6X Packaging Marking A48A A48A A47A A47A Transport Media NSC Drawing
5-Pin SOT23-5
1k Units Tape and Reel 3k Units Tape and Reel 1k Units Tape and Reel 3k Units Tape and Reel
MF05A MF06A
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LMV710 and LMV711
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Machine Model Human Body Model Differential Input Voltage Voltage at Input/Output Pin Supply Voltage (V+ - V -) Output Short Circuit to V+ Output Short Circuit to V- Current at Input Pin 200V 2000V
Mounting Temp. Infrared or Convection (20 sec) Storage Temperature Range Junction Temperature(TJMAX) (Note 5) 235C -65C to 150C 150C
Operating Ratings (Note 1)
Supply Voltage Temperature Range Thermal Resistance (JA) MF05A Package, 5-Pin SOT23-5 MF06A package, 6-Pin SOT23-6 265 C/W 265 C/W 2.7V to 5.0V -40C TJ 85C
Supply Voltage
(V+) + 0.4V (V-) - 0.4V 5.5V (Note 3) (Note 4)
10mA
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 2.7V, V limits apply at the temperature extremes. Symbol VOS IB CMRR PSRR Parameter Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio 0 VCM 2.7V 2.7V V+ 5V, VCM = 0.85V 2.7V V+ 5V, VCM = 1.85V VCM ISC Input Common-Mode Voltage Range Output Short Circuit Current For CMRR 50dB Sourcing VO =0V Sinking VO = 2.7V VO Output Swing RL = 10k to 1.35V Condition VCM = 0.85V & VCM = 1.85V
-
= 0V, VCM = 1.35V and RL > 1M. Boldface Typ (Note 6) 0.4 4 75 110 95 -0.3 3 28 40 2.68 0.01 50 45 70 68 70 68 -0.2 2.9 15 12 25 22 2.62 2.60 0.12 0.15 2.52 2.50 0.23 0.30 200 1.7 1.9 10 Limits (Note 7) 3 3.2 Units mV max pA dB min dB min dB min V mA min mA min V min V max V min V max mV mA max A
RL = 600 to 1.35V
2.55 0.05
VO (SD) IS
Output Voltage Level in Shutdown Mode Supply Current ON Mode Shutdown Mode, VSD = 0V
50 1.22 0.002
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LMV710 and LMV711
2.7V Electrical Characteristics
Symbol AV Parameter Large Signal Voltage
(Continued)
-
Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 2.7V, V limits apply at the temperature extremes. Condition Sourcing RL = 10k VO = 1.35V to 2.3V Sinking RL = 10k VO = 0.4V to 1.35V Sourcing RL = 600 VO = 1.35V to 2.2V Sinking RL = 600 VO = 0.5V to 1.35V SR GBWP m TON VSD en Slew Rate Gain-Bandwidth Product Phase Margin Turn-on Time from Shutdown Shutdown Pin Voltage Range Input-Referred Voltage Noise On Mode Shutdown Mode f = 1kHz (Note 8)
= 0V, VCM = 1.35V and RL > 1M. Boldface Typ (Note 6) 115 Limits (Note 7) 80 76 80 76 80 76 80 76 Units dB min dB min dB min dB min V/s MHz Deg s 2.4 to 2.7 0 to 0.8 V V
113
110
100
5 5 60
< 10
1.5 to 2.7 0 to 1 20
3.2V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 3.2V, V- = 0V, VCM = 1.6V. Boldface limits apply at the temperature extremes. Symbol VO Output Swing Parameter IO = 6.5mA Conditions Typ (Note 6) 3.0 0.01 Limit (Note 7) 2.95 2.92 0.18 0.25 Units V min V max
5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 5V, V its apply at the temperature extremes. Symbol VOS IB CMRR PSRR Parameter Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio 0V VCM 5V 2.7V V+ 5V, VCM = 0.85V 2.7V V+ 5V, VCM = 1.85V VCM Input Common-Mode Voltage Range For CMRR 50dB
-
= 0V, VCM = 2.5V, and RL > 1M. Boldface limTyp (Note 6) 0.4 4 70 110 95 -0.3 5.3 50 48 70 68 70 68 -0.2 5.2 Limits (Note 7) 3 3.2 Units mV max pA dB min dB min dB min V
Condition VCM = 0.85V & VCM = 1.85V
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LMV710 and LMV711
5V Electrical Characteristics
Symbol ISC Parameter Output Short Circuit Current
(Continued)
-
Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 5V, V its apply at the temperature extremes.
= 0V, VCM = 2.5V, and RL > 1M. Boldface limTyp (Note 6) 35 40 4.98 0.01 Limits (Note 7) 25 21 25 21 4.92 4.90 0.12 0.15 4.82 4.80 0.23 0.3 200 1.7 1.9 10 80 76 80 76 80 76 80 76 Units mA min mA min V min V max V min V max mV mA max A dB min dB min dB min dB min V/s MHz Deg s 2.4 to 5 0 to 0.8 V
Condition Sourcing VO = 0V Sinking VO = 5V
VO
Output Swing
RL = 10k to 2.5V
RL = 600 to 2.5V
4.85 0.05
VO (SD) IS
Output Voltage Level in Shutdown Mode Supply Current On Mode Shutdown Mode
50 1.17 0.2 123
AV
Large Signal Voltage Gain
Sourcing RL = 10k VO = 2.5V to 4.6V Sinking RL = 10k VO = 0.4V to 2.5V Sourcing RL = 600 VO = 2.5V to 4.5V Sinking RL = 600 VO = 0.5V to 2.5V
120
110
118
SR GBWP m TON VSD en
Slew Rate Gain-Bandwidth Product Phase Margin Turn-on Time from Shutdown Shutdown Pin Voltage Range Input-Referred Voltage Noise
(Note 8)
5 5 60
< 10
ON Mode Shutdown Mode f = 1kHz 2 to 5 0 to 1.5 20
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 k in series with 100pF. Machine model, 0 in series with 100pF. Note 3: Shorting circuit output to V+ will adversely affect reliability. Note 4: Shorting circuit output to V- will adversely affect reliability. Note 5: The maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - T A)/JA. All numbers apply for packages soldered directly into a PC board. Note 6: Typical values represent the most likely parametric norm. Note 7: All limits are guaranteed by testing or statistical analysis. Note 8: Number specified is the slower of the positive and negative slew rates.
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LMV710 and LMV711
Typical Performance Characteristics
Supply Current vs. Supply Voltage (On Mode)
Unless otherwise specified, VS = +5V, single supply, TA = 25C. LMV711 Supply Current vs. Supply Voltage (Shutdown Mode)
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Output Positive Swing vs. Supply Voltage
Output Negative Swing vs. Supply Voltage
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Output Positive Swing vs. Supply Voltage
Output Negative Swing vs. Supply Voltage
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LMV710 and LMV711
Typical Performance Characteristics
TA = 25C. (Continued) Output Positive Swing vs. Supply Voltage
Unless otherwise specified, VS = +5V, single supply,
Output Negative Swing vs. Supply Voltage
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Input Voltage Noise vs. Frequency
PSRR vs. Frequency
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CMRR vs. Frequency
LMV711 Turn On Characteristics
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LMV710 and LMV711
Typical Performance Characteristics
TA = 25C. (Continued) Sourcing Current vs. Output Voltage
Unless otherwise specified, VS = +5V, single supply,
Sinking Current vs. Output Voltage
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THD+N vs. Frequency (VS = 5V)
THD+N vs. Frequency (VS = 2.7V)
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THD+N vs. VOUT
THD+N vs. VOUT
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LMV710 and LMV711
Typical Performance Characteristics
TA = 25C. (Continued) CCM vs. VCM
Unless otherwise specified, VS = +5V, single supply,
CCM vs. VCM
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CDIFF vs. VCM (VS = 2.7V)
CDIFF vs. VCM (VS = 5V)
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Open Loop Frequency Response
Open Loop Frequency Response
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LMV710 and LMV711
Typical Performance Characteristics
TA = 25C. (Continued) Open Loop Frequency Response
Unless otherwise specified, VS = +5V, single supply,
Open Loop Frequency Response
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Open Loop Frequency Response
Open Loop Frequency Response
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Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
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LMV710 and LMV711
Typical Performance Characteristics
TA = 25C. (Continued) Inverting Large Signal Pulse Response
Unless otherwise specified, VS = +5V, single supply,
Inverting Small Signal Pulse Response
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VOS vs. VCM
VOS vs. VCM
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LMV710 and LMV711
Application Note
1.0 Supply Bypassing The application circuits in this datasheet do not show the power supply connections and the associated bypass capacitors for simplification. When the circuits are built, it is always required to have bypass capacitors. Ceramic disc capacitors (0.1F) or solid tantalum (1F) with short leads, and located close to the IC are usually necessary to prevent interstage coupling through the power supply internal impedance. Inadequate bypassing will manifest itself by a low frequency oscillation or by high frequency instabilities. Sometimes, a 10F (or larger) capacitor is used to absorb low frequency variations and a smaller 0.1F disc is paralleled across it to prevent any high frequency feedback through the power supply lines. 2.0 Shutdown Mode The LMV711 has a shutdown pin. To conserve battery life in portable applications, the LMV711 can be disabled when the shutdown pin voltage is pulled low. During shutdown mode, the output stays at about 50mV from the lower rail, and the current drawn from the power supply is 0.2A (typical). This makes the LMV711 an ideal solution for power sensitive applications. The shutdown pin can't be left unconnected. In case shutdown operation is not needed, the shutdown pin should be connected to V+ when the LMV711 is used, or an LMV710 can be used. Leaving the shutdown pin floating will result in an undefined operation mode, either shutdown or active, or even oscillating between the two modes. 3.0 Rail-to-Rail Input The rail-to-rail input is achieved by using paralleled PMOS and NMOS differential input stages. (See Simplified Schematics in this datasheet). When the common mode input voltage changes from ground to the positive rail, the input stage goes through three modes. First, the NMOS pair is cutoff and the PMOS pair is active. At around 1.4V, both PMOS and NMOS pairs operate, and finally the PMOS pair is cutoff and NMOS pair is active. Since both input stages have their own offset voltage (VOS), the offset of the amplifier becomes a function of the common-mode input voltage. See curves for VOS vs. VCM in curve section. As shown in the curve, the VOS has a crossover point at 1.4V above V-. Proper design must be done in both DC and AC coupled applications to avoid problems. For large input signals that include the VOS crossover point in their dynamic range, it will cause distortion in the output signal. One way to avoid such distortion is to keep the signal away from the crossover point. For example, in a unity gain buffer configuration and with VS = 5V, a 3V peak-to-peak signal center at 2.5V will contain input-crossover distortion. To avoid this, the input signal should be centered at 3.5V instead. Another way to avoid large signal distortion is to use a gain of -1 circuit which avoids any voltage excursions at the input terminals of the amplifier. See Figure 1. In this circuit, the common mode DC voltage (VCM) can be set at a level away from the VOS crossover point.
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FIGURE 1. When the input is a small signal and this small signal falls inside the VOS transition range, the gain, CMRR and some other parameters will be degraded. To resolve this problem, the small signal should be placed such that it avoids the VOS crossover point. To achieve maximum output swing, the output should be biased at mid-supply. This is normally done by biasing the input at mid-supply. But with supply voltage range from 2V to 3.4V, the input of the op amp should not be biased at mid-supply because of the transition of the VOS. Figure 2 shows an example of how to get away from the VOS crossover point and maintain a maximum swing with a 2.7V supply. Figure 3 shows the waveforms of VIN and VOUT.
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FIGURE 2.
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FIGURE 3. The inputs can be driven 300mV beyond the supply rails without causing phase reversal at the output. However, the inputs should not be allowed to exceed the maximum ratings.
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LMV710 and LMV711
Application Note
(Continued)
4.0 Compensation of Input Capacitance In the application (Figure 4) where a large feedback resistor is used, the feedback resistor can react with the input capacitance of the op amp and introduce an additional pole to the close loop frequency response.
value, the more stable VOUT will be. But the DC accuracy is not great when the RISO gets bigger. If there were a load resistor in Figure 5, the output would be voltage divided by RISO and the load resistor. The circuit in Figure 6 is an improvement to the one in Figure 5 because it provides DC accuracy as well as AC stability. In this circuit, RF provides the DC accuracy by using feedforward techniques to connect VIN to RL. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Increased capacitive drive is possible by increasing the value of CF . This in turn will slow down the pulse response.
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FIGURE 4. Cancelling the Effect of Input Capacitance This pole occurs at frequency fp , where
Any stray capacitance due to external circuit board layout, any source capacitance from transducer or photodiode connected to the summing node will also be added to the input capacitance. If fp is less than or close to the unity-gain bandwidth (5MHz) of the op amp, the phase margin of the loop is reduced and can cause the system to be unstable. To avoid this problem, make sure that fp occurs at least 2 octaves beyond the expected -3dB frequency corner of the close loop frequency response. If not, a feedback capacitor CF can be placed in parallel with RF such that
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FIGURE 6. Indirectly Driving A Capacitive A Load with DC Accuracy 6.0 Application Circuits Peak Detector Peak detectors are used in many applications, such as test equipment, measurement instrumentation, ultrasonic alarm systems, etc. Figure 7 shows the schematic diagram of a peak detector using LMV710 or LMV711. This peak detector basically consists of a clipper, a parallel RC network, and a voltage follower.
The paralleled RF and CF introduce a zero, which cancels the effect from the pole. 5.0 Capacitive Load Tolerance The LMV710 and LMV711 can directly drive 200pF in unity-gain without oscillation. The unity-gain follower is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combination of the amplifier's output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, circuit in Figure 5 can be used.
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FIGURE 7. Peak Detector The capacitor C1 is first discharged by applying a positive pulse to the reset transistor. When a positive voltage VIN is applied to the input, the input voltage is higher than the voltage across C1. The output of the op amp goes high and forward biases the diode D1. The capacitor C1 is charged to VIN. When the input becomes less than the current capacitor voltage, the output of the op amp A1 goes low and the diode D1 is reverse biased. This isolates the C1 and leaves it with the charge equivalent to the peak of the input voltage. The follower prevents unintentional discharging of C1 by loading from the following circuit. R5 and C1 are properly selected so that the capacitor is charged rapidly to VIN. During the holding period, the capacitor slowly discharge through C1, via leakage of the capacitor and the reverse-biased diode, or op amp bias currents. In
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DS101325-21
FIGURE 5. Indirectly Driving A Capacitive Load using Resistive Isolation In Figure 5, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor
LMV710 and LMV711
Application Note
(Continued)
any cases the discharging time constant is much larger than the charge time constant. And the capacitor can hold its voltage long enough to minimize the output ripple. Resistors R2 and R3 limit the current into the inverting input of A1 and the non-inverting input of A2 when power is disconnected from the circuit. The discharging current from C1 during power off may damage the input circuitry of the op amps. The peak detector can be reset by applying a positive pulse to the reset transistor. The charge on the capacitor is dumped into ground, and the detector is ready for another cycle. The maximum input voltage to this detector should be less than (V+ - VD), where VD is the forward voltage drop of the diode. Otherwise, the input voltage should be scaled down before applying to the circuit. High Side Current Sensing The high side current sensing circuit (Figure 8) is commonly used in a battery charger to monitor charging current to prevent over-charging. A sense resistor Rsense is connected to the battery directly. This system requires an op amp with
rail-to-rail input. The LMV710/711 is ideal for this application because its common mode input range can go beyond the positive rail.
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FIGURE 8. High Side Current Sensing
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FIGURE 9. Typical of GSM P.A. Control Loop GSM Power Amplifier Control Loop There are four critical sections in the GSM Power Amplifier Control Loop. The class-C RF power amplifier provides amplification of the RF signal. A directional coupler couples small amount of RF energy from the output of the RF P. A. to an envelope detector diode. The detector diode senses the signal level and rectifies it to a DC level to indicate the signal strength at the antenna. An op-amp is used as an error amplifier to process the diode voltage and ramping voltage. This loop control the power amplifier gain via the op-amp and forces the detector diode voltage and ramping voltage to be equal. Power control is accomplished by changing the ramping voltage. The LMV710 and LMV711 are well suited as an error amplifier in this application. The LMV711 has an extra shutdown pin to switch the op-amp to shutdown mode. In shutdown mode, the LMV711 consumes very low current and provides a ground voltage to the power amplifier control pin VPC. Therefore, the power amplifier can be turned off to save battery life.
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LMV710 and LMV711
Simplified Schematic
LMV711
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LMV710 and LMV711
SOT-23 Tape and Reel Specification Tape Format
Tape Section Leader (Start End) Carrier Trailer (Hub End) # Cavities 0 (min) 75 (min) 3000 1000 125 (min) 0 (min) Cavity Status Empty Empty Filled Filled Empty Empty Cover Tape Status Sealed Sealed Sealed Sealed Sealed Sealed
TAPE DIMENSIONS
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TAPE SIZE 8 mm
DIM A .130 (3.3)
DIM Ao .124 (3.15)
DIM B .130 (3.3)
DIM Bo .126 (3.2)
DIM F .138 .002 (3.5 0.05)
DIM Ko .055 .004 (1.4 0.1)
DIM P1 .157 (4)
DIM T .008 .004 (0.2 0.1)
DIM W .315 .012 (8 0.3)
Note: UNLESS OTHERWISE SPECIFIED 1. CUMULATIVE PITCH TOLERANCE FOR FEEDING HOLES AND CAVITIES (CHIP POCKETS) NOT TO EXCEED .008 IN / 0.2mm OVER 10 PITCH SPAN. 2. THRU HOLE INSIDE CAVITY IS CENTERED WITHIN CAVITY. 3. SMALLEST ALLOWABLE TAPE BENDING RADIUS: 1.181 IN/ 30mm. 4. DIMENSIONS WITH ARE CRITICAL. DIMENSIONS TO BE ABSOLUTELY INSPECTED.
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LMV710 and LMV711
REEL DIMENSIONS
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TAPE SIZE 8 mm
DIM A 7.00 (177.8)
DIM B .059 (1.5)
DIM C .512 + .020/-.008 (13 +0.5/-0.2)
DIM D .795 (20.2)
DIM N 2.165 (55)
DIM W1 .331 + .059/-.000 (8.4 + 1.5/0)
DIM W2 .567 (14.4)
DIM W3 (LSL-USL) .311 - .429 (7.9 - 10.9)
Note: UNLESS OTHERWISE SPECIFIED 1. MATERIAL: POLYSTYRENE/PVC (WITH ANTISTATIC COATING). OR POLYSTYRENE/PVC, ANTISTATIC OR POLYSTYRENE/PVC, CONDUCTIVE. 2. CONTROLLING DIMENSION IS MILLIMETER, DIMESIONS IN INCHES ROUNDED. 3. SURFACE RESISTIVITY: 1010 OHM/SQ MAXIMUM. 4. ALL OUTPUT REELS SHALL BE UNIFORM IN SHADE. 5. PACKING OF REELS IN CONTAINERS MUST ENSURE NO DAMAGE TO THE REEL. 6. SURFACE FINISH OF THE FLANGES SHALL BE SMOOTH, MATTE FINISH PREFERRED. 7. ALL EDGES, ESPECIALLY THE TAPE ENTRY EDGES, MUST BE FREE OF BURRS. 8. THE REEL SHOULD NOT WARP IN THE STORAGE TEMPERATURE OF 67C MAXIMUM. 9. GLASS TRANSITION TEMPERATURE (Tg) OF THE PLASTIC REEL SHALL BE LOWER THAN -20C. 10. ALL GATING FROM THE MOLD MUST BE PROPERLY REMOVED. 11. NO FLASHES ARE TO BE PRESENT ALONG THE PARTING LINES. 12. ALLOWABLE RADIUS FOR CORNERS AND EDGES IS .012 INCHES/0.3 MILLIMETERS MINIMUM. 13. SINK MARKS THAT WILL CAUSE A CHANGE TO THE SPECIFIED DIMENSIONS OR SHAPE OF THE REELS ARE NOT ALLOWED. 14. MOLDED REELS SHALL BE FREE OF COSMETIC DEFECTS SUCH AS VOIDS. FLASHING, EXCESSIVE FLOW MARKS, ETC. 15. THERE MUST BE NO MISMATCH BETWEEN MATING PARTS. 16. MOLDED REELS SHALL BE ANTISTATIC COATED OR BLENDED. 17. THE SOT23-5L AND SOT23-6L PACKAGE USE THE 7-INCH REEL.
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LMV710 and LMV711
Physical Dimensions
inches (millimeters) unless otherwise noted
SOT23-5 NS Package Number MF05A
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LMV710 and LMV711 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
SOT23-6 NS Package Number MF06A
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