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| JST-AWICS09325 Features * * * * * * * High integration to minimize total system costs Contains LNA, Mixers, Filters, Limiters, Demod, Mod., PA, PLL, VCO, Ref. Osc. Data Retiming and SPI port Data rates to 28.8 Kbits/sec (with full Manchester Encoding on chip) Direct connection to microprocessor Single Rail Operation Programmable power levels, frequency, Tx/Rx/Stdby Wide Supply rail 2.4V to 3.3V @ 22mA during operation jSTechnologies Advance Information Advanced Communications JST-AWICS09325 300 - 928 MHz Frequency Agile with SPI Bus Interface Description The JS Technologies JST-AWICS09325 is a single ASIC transceiver for use in digital data and time division fullduplex voice applications. Direct microprocessor connections for control and data transfer eliminate the need for costly off chip components. The JST-AWICS09325 is ideally suited for use in battery powered wireless applications in conjunction with microprocessors for data communication and a Codec for voice. Package Option - inquire for options Functional Schematic +3 Vdc X S Modulate PLL Limiter DeMod RF Electrical Specification @ + 25oC Ambient Parameter Rx Sensitivity 1dB Compression Input IP3 Tx Output power Data Rate, Tx / Rx Adj. Channel rejection Detection Bandwidth Control/Data I/O Web Site: Email: 2001 09325 S Data/Control SPI Test Condition Vdd= 3V Vdd = 3V Vdd = 3V Continuous data w/Manchester Encoder Frequency 300- 928 MHz 300- 928 MHz 300- 928 MHz 300- 928 MHz Units dBm dBm dBm dBm dBm Kbps dB KHz MHz Min Typical -95 -20 -5 +3 28.8 75 100 10 Max Fc +/- 200KHz IQ baseband filter passband Serial peripheral interface (SPI). Direct connection to microcontroller/microprocessor www.jstcorp.com info@jstcorp.com Published Sept 2001 Page 1 JS Technologies, Corp Electronics Division 151 West Street, Suite 202 Annapolis, MD 21401 410-295-5452 1-866-46A-WICS (866-462-9427) JST-AWICS09325 DC Electrical Specifications @ + 25 C Ambient Parameter o jSTechnologies Advance Information Units V mA mA uA V VOH A Minimum 2.4 16 22 0 1.7 Typical 3.0 26 28 TBD Max 3.3 VDD Power Supply Current During Tx, Output Power Dependant (915MHz) Power Supply Current (IDD) during Rx (915MHz) Standby Power Consumption Logic level (0) CMOS Logic level (1) CMOS Input Leakage Current 0.7 VDD 2 Absolute Maximum Ratings1 Parameter Maximum Input Power + VDD ESD Voltage (Human Body Model) Operating Temperature Storage Temperature 1 Absolute Maximum + 3.6 V TBD - 40oC to + 85oC - 40oC to + 150oC Operation of this Device beyond any of these parameters may cause permanent damage Latch-Up: This chip uses Honeywell's RF-SOI process which is immune to latch-up. ESD Protection: Although this device contains ESD protection circuitry, conventional precautions should be taken to ensure that the Absolute Maximum Ratings are not exceeded. Typical Application Schematic Analog Pwr Rx Ant Vdd Rx Input Tx Ant Tx Out VCO Tank Digital Pwr JST-AWICS09325 Loop Filter and Data Modulation Digital Interface Bus (5 pins) JS Technologies reserves the right to make changes to improve reliability, function or design. JS Technologies does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. This chip was developed in conjunction with the Honeywell Solid State Electronics Center exclusively for JS Technologies Corp. Web Site: Email: 2001 09325 www.jstcorp.com info@jstcorp.com Published Sept 2001 Page 2 JS Technologies, Corp Electronics Division 151 West Street, Suite 202 Annapolis, MD 21401 410-295-5452 1-866-46A-WICS (866-462-9427) |
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