 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER Description The ICS548-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two. Using our patented Phase-Locked Loop (PLL) techniques, the device operates from a frequency range of 10 MHz to 120 MHz in the PLL mode, and up to 160 MHz in the non-PLL mode. In applications that need to maintain low phase noise in the clock tree, the non-PLL (when S3=S2=1) modes should be used. This chip is not a zero delay buffer. Many applications may be able to use the ICS527 for zero delay dividers. Features * * * * * * Packaged in 16-pin SOIC (150 mil) Input clock up to 160 MHz in the non-PLL mode Provides clock outputs of CLK, CLK, and CLK/2 Low skew (500 ps) on CLK, CLK, and CLK/2 All outputs can be tri-stated Entire chip can be powered down by changing one or two select pins * 3.3 V or 5.0 volt operating range * Available in commercial and industrial temperature ranges Block Diagram VDD GND 2 2 CLK S3:S0 4 Clock input Input Buffer Clock Synthesis and Divider Circuitry CLK CLK/2 OE (all outputs) MDS 548-03 B In te grated Circui t Systems l 1 5 25 Race Stre et, San Jose, CA 9 5126 l Revision 030305 te l (4 08) 297 -1201 l w w w. i c s t . c o m ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER Pin Assignment ICLK VDD VDD S3 GND GND S2 S0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DC DC DC CLK CLK CLK/2 OE S1 CLK, CLK, and CLK/2 Select Table (MHz) S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 CLK, CLK Low Input/4 Input Input/2 Low Input x 2 Input/5 Input/3 Low Input/4 Input Input/2 Low Input/6 Input/8 Input/2 CLK/2 Low Input/8 Input/2 Input/4 Low Input Input/10 Input/6 Low Input/8 Input/2 Input/4 Low Input/12 Input/16 Input/4 PLL OFF ON ON ON OFF ON ON ON OFF ON ON ON OFF OFF OFF OFF Input Range Power Down 20 - 120 20 - 120 20 - 120 Power Down 20 - 60 20 - 120 20 - 120 Power Down 10 - 60 10 - 60 10 - 60 Power Down 0 - 160 0 - 160 0 - 160 MDS 548-03 B Integrated Ci rcu it Systems l 2 525 Ra ce St reet, San Jose , CA 9512 6 l Revision 030305 tel (408 ) 29 7-120 1 l w w w. i c s t . c o m ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER Pin Descriptions Pin Number 1 2 3 4 Pin Name ICLK VDD VDD S3 Pin Type Input Power Power Input Connect to 3.3 V or 5 V. Connect to 3.3 V or 5 V. Pin Description Clock input. Connect to an 8 kHz clock input. Connect to a ceramic capacitor and a resistor in series between this pin and CAP2. Refer to the section "Loop Bandwidth and Loop Filter Component Selection". Connect to ground. Connect to ground. Clock Select pin 2. See table on page 2. Clock Select pin 0. See table on page 2. Clock Select pin 1. See table on page 2. Output Enable. Tri-states all clock outputs when low. 5 6 7 8 9 10 11 12 13 14 15 16 GND GND S2 S0 S1 OE CLK/2 CLK CLK DC DC DC Power Power Input Input Input Input Output Clock output divided by 2. See table on page 2. Output Clock output. See table on page 2. Output Inverted clock output. See table on page 2. -- -- -- Don't connect. Do not connect anything to this pin. Don't connect. Do not connect anything to this pin. Don't connect. Do not connect anything to this pin. External Components The ICS548-03 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01F should be connected between pins 3 and 5, as close to the device as possible. Connect pin 2 directly to pin 3, and pin 6 directly to pin 5. A series termination resistor of 33 may be used on all clock outputs, as close to the device as possible. Leave any unused clock outputs floating. There are no pull-up resistors on the input pins, so they should be connected directly to VDD or ground. MDS 548-03 B Integrated Ci rcu it Systems l 3 525 Ra ce St reet, San Jose , CA 9512 6 l Revision 030305 tel (408 ) 29 7-120 1 l www.icst.com ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS548-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD (referenced to GND) All Inputs and Outputs Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Storage Temperature Junction Temperature Soldering Temperature -0.5 V to 7 V Rating -0.5 V to VDD+0.5 V 0 to +70C -40 to +85C -65 to +150C 150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND) Min. 0 -40 +3.13 Typ. Max. +70 +85 +5.5 Units C C V DC Electrical Characteristics VDD = 3.3 V, Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage, CMOS level Output High Voltage Output Low Voltage Operating Supply Current, 100 MHz clock Short Circuit Current Input Capacitance Symbol VDD VIH VIL VIH VIL VOH VOH VOL IDD IOS CIN Conditions ICLK only (pin 1) ICLK only (pin 1) All other inputs All other inputs IOH = -8 mA IOH = -12 mA IOL = 12 mA S3=S2=S0=0, S1=1 Each output All inputs Min. 3.13 (VDD/2)+1 2 Typ. VDD/2 VDD/2 Max. 5.5 (VDD/2)-1 0.8 Units V V V V V V V VDD-0.4 2.4 0.4 TBD 50 5 V mA mA pF MDS 548-03 B Integrated Ci rcu it Systems l 4 525 Ra ce St reet, San Jose , CA 9512 6 l Revision 030305 tel (408 ) 29 7-120 1 l www.icst.com ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER AC Electrical Characteristics VDD = 3.3 V, Ambient Temperature 0 to +70C, unless stated otherwise Parameter Input Frequency, clock input, PLL on Input Frequency, clock input, PLL off Output Frequency (see table on page 2) Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Output Enable Time, OE high to output on Output Disable Time, OE to tri-state Absolute Clock Period Jitter. PLL modes One Sigma Clock Period Jitter, PLL modes Output clock skew for CLK, CLK, or CLK/2 Symbol fIN fIN fOUT tOR tOF tDC Conditions Min. 10 0 Typ. Max. Units 120 MHz MHz MHz ns ns 55 50 50 % ns ns ps ps 248 ps 0 160 120 Mode dependent 0.8 to 2.0 V 2.0 to 0.8 V At VDD/2 0 0.84 0.74 45 49 to 51 Deviation from mean TBD 61 At VDD/2 Note 1: The phase relationship between input and output clocks can change at power up. Use the ICS570 or ICS527 Zero Delay Buffers for a guaranteed phase relationship. Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 120 115 105 58 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 548-03 B Integrated Ci rcu it Systems l 5 525 Ra ce St reet, San Jose , CA 9512 6 l Revision 030305 tel (408 ) 29 7-120 1 l www.icst.com ICS548-03 LOW SKEW CLOCK INVERTER AND DIVIDER Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 16 Millimeters Symbol E INDEX AREA H Inches Min Max Min Max 12 D A A1 B C D E e H h L h x 45 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 A A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number ICS548M-03 ICS548M-03T ICS548M-03I ICS548M-03IT Marking ICS548M-03 ICS548M-03 ICS548M-03I ICS548M-03I Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC Temperature 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 548-03 B Integrated Ci rcu it Systems l 6 525 Ra ce St reet, San Jose , CA 9512 6 l Revision 030305 tel (408 ) 29 7-120 1 l www.icst.com |
Price & Availability of ICS54803
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |