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BUZ11
Data Sheet June 1999 File Number 2253.2
30A, 50V, 0.040 Ohm, N-Channel Power MOSFET
This is an N-Channel enhancement mode silicon gate power field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. Formerly developmental type TA9771.
Features
* 30A, 50V * rDS(ON) = 0.040 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER BUZ11 PACKAGE TO-220AB BRAND BUZ11
NOTE: When ordering, use the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE)
4-5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
BUZ11
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified BUZ11 50 50 30 120 20 75 0.6 -55 to 150 E 55/150/56 300 260 UNITS V V A A V W W/oC oC
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 30oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG DIN Humidity Category - DIN 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IEC Climatic Category - DIN IEC 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V VGS = VDS, ID = 1mA (Figure 9) TJ = 25oC, VDS = 50V, VGS = 0V TJ = 125oC, VDS = 50V, VGS = 0V Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient IGSS rDS(ON) gfs td(ON) tr td(OFF) tf CISS COSS CRSS RJC RJA VDS = 25V, VGS = 0V, f = 1MHz (Figure 10) VGS = 20V, VDS = 0V ID = 15A, VGS = 10V (Figure 8) VDS = 25V, ID = 15A (Figure 11) VCC = 30V, ID 3A, VGS = 10V, RGS = 50, RL = 10 MIN 50 2.1 4 TYP 3 20 100 10 0.03 8 30 70 180 130 1500 750 250 1.67 75 MAX 4 250 1000 100 0.04 45 110 230 170 2000 1100 400 UNITS V V A A nA S ns ns ns ns pF pF pF
oC/W oC/W
Electrical Specifications
PARAMETER
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulsed Source to Drain Current Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovery Charge NOTES: 2. Pulse Test: Pulse width 300ms, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). SYMBOL ISD ISDM VSD trr QRR TEST CONDITIONS TC = 25oC TC = 25oC TJ = 25oC, ISD = 60A, VGS = 0V TJ = 25oC, ISD = 30A, dISD/dt = 100A/s, VR = 30V MIN TYP 1.7 200 0.25 MAX 30 120 2.6 UNITS A A V ns C
4-6
BUZ11 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 30 0.8
Unless Otherwise Specified
40
VGS > 10V
0.6 0.4
20
10
0.2 0 0 25 50 75 100 TA , CASE TEMPERATURE (oC) 125 150
0
0
50 100 TC, CASE TEMPERATURE (oC)
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
ZJC, TRANSIENT THERMAL IMPEDANCE
1
0.5 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE PDM
0.1
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) 100 101
t1 t2
0.01 10-5
10-4
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
103 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 102 2.5s 10s 100s 101 1ms TC = 25oC TJ = MAX RATED SINGLE PULSE 100 100 101 VDS, DRAIN TO SOURCE VOLTAGE (V) 10ms 100ms DC 102
60 PD = 75W 50 ID, DRAIN CURRENT (A) 10V 40 30 20 10 0 VGS = 8.0V VGS = 7.5V VGS = 7.0V VGS = 6.5V VGS = 6.0V VGS = 5.5V VGS = 5.0V VGS = 4.5V VGS = 4.0V 0 1 2 3 4 5 VDS, DRAIN TO SOURCE VOLTAGE (V) 6 VGS = 20V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
4-7
BUZ11 Typical Performance Curves
IDS(ON), DRAIN TO SOURCE CURRENT (A) 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 25V
Unless Otherwise Specified (Continued)
0.15 rDS(ON), ON-STATE RESISTANCE () PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 5V 5.5V 6V 6.5V 7V 7.5V 8V 9V 10V 20V
15
0.10
10
0.05
5
0
0
1
3 4 5 6 VGS, GATE TO SOURCE VOLTAGE (V)
2
7
8
0
0
20 40 ID, DRAIN CURRENT (A)
60
FIGURE 6. TRANSFER CHARACTERISTICS
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
VGS(TH), GATE THRESHOLD VOLTAGE (V)
0.08 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID = 15A, VGS = 10V 0.06
4
VDS = VGS ID = 1mA
rDS(ON), DRAIN TO SOURCE ON RESISTANCE ()
3
0.04
2
0.02
1
0
-50
0
50
100
150
0
-50
0
50
100
150
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
101 gfs, TRANSCONDUCTANCE (S)
10
8
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 25V TJ = 25oC
C, CAPACITANCE (nF)
100
CISS COSS CRSS
6
4
10-1 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 0 10 20 30 40
2
10-2
0 0 5 10 ID, DRAIN CURRENT (A) 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
4-8
BUZ11 Typical Performance Curves
103 ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = 25oC TJ = 150oC 101
Unless Otherwise Specified (Continued)
15 VGS, GATE TO SOURCE VOLTAGE (V) ID = 45A
102
VDS = 10V 10 VDS = 40V 5
100
10-1
0
0.5 1.0 1.5 2.0 2.5 VSD, SOURCE TO DRAIN VOLTAGE (V)
3.0
0
0
10
20 30 Qg, GATE CHARGE (nC)
40
50
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90%
+
RG DUT
-
VDD
0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 14. SWITCHING TIME TEST CIRCUIT
VDS (ISOLATED SUPPLY)
FIGURE 15. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
Ig(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR Ig(REF) 0
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
4-9
BUZ11
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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4-10

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