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E1467D
32-kHz Clock CMOS IC with Digital Trimming and Alarm
Features
D 32-kHz voltage regulated oscillator D 1.1 V to 2.2 V operating-voltage range D Integrated capacitors for digital trimming D Suitable for up to 12.5 pF quartz D Trimming inputs insensitive to stray capacitance D Output pulse formers D Mask options for motor period and pulse width D Low resistance output for bipolar stepping motor D Alarm function D Motor-fast-test function
Pad Configuration
SC4 SC3 SC2 SC1 * VDD VSS
General Description
9 OSCIN * OSCOUT
1
13
12
11 10
2
8
e 1467D
7 6
ALOUT MOT2 MOT1R
9611897
**ALIN / MTEST
The E1467D is an integrated circuit in CMOS Silicon Gate Technology for analog clocks. It consists of a 32-kHz oscillator, frequency divider, output pulse formers, push-pull motor drivers and alarm output. Integrated capacitors are mask-selectable to accomodate the external quartz crystal. Additional capacitance can be selected through pad bonding for trimming the oscillator frequency.
**MOT1L
*) The pads for VDD and OSCOUT are interchangeable per mask option **) The pads for ALIN/-MTEST and MOT1L are interchangeable per mask-option
Figure 4. Pad configuration
Absolute Maximum Ratings
Parameters Supply voltage Input voltage range, all inputs Output short circuit duration Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Lead temperature during soldering at 2 mm distance, 10 seconds Symbol VSS VIN Ptot Tamb Tstg Tsld Value -0.3 to 5 V (VSS - 0.3 V) x VIN x (VDD + 0.3 V) indefinite 125 mW -20 to +70 -40 to + 125 260 Unit V V mW C C C
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and Microcontrollers' outputs in Atmel Wireless & circuits are protected against
Rev. A2, 15-Jan-01
I II I II I II I II I I II I III I I IIIIIII IIIIII I
3 4 5
electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. This circuit is protected against supply voltage reversal for typically 5 minutes.
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E1467D
Functional Description
Oscillator
An oscillator inverter with feedback resistor is provided for generation of the 32768 Hz clock frequency. Values for the fixed capacitors at OSCIN and OSCOUT are mask-selectable (see note 3 of operating characteristics). Four control inputs SC1 to SC4 enable the addition of integrated trimming capacitors to OSCIN and OSCOUT, providing 15 tuning steps. The output is configured for npn and pnp bipolar capability. The output is an alarm tone modulated by a low frequency. Tone frequencies, modulation frequencies, and on/off times are selectable via the metal mask option.
Alarm Input
A debounced alarm input is provided. Alarm activation is either to VDD or VSS by a mask option.
Trimming Capacitors
A frequency variation of typ. 4 ppm for each tuning step is obtained by bonding the capacitor switch pads to VDD. As none of these pads are bonded, the IC is in an untrimmed state. Figure 5 shows the trimming curve characteristic. Note: For applications which utilize this integrated trimming feature, Atmel Wireless & Microcontrollers will determine optimum values for the integrated capacitors COSCIN and COSCOUT.
Test Functions
For test purposes the ALIN/MTEST pad is open. With a high resistance probe (R w 10 MW, C v 20 pF), a test frequency fTEST of 128 Hz can be measured at the ALIN/ MTEST pad. Connecting ALIN/MTEST (for at least 32 ms) to the opposite polarity for alarm activation changes the motor period from the selected value to TMT (mask-selectable) while the pulse width remains unaffected. This feature can be used for testing the mechanical parts of the clock.
Motor Drive Output
The E1467D contains two push-pull output buffers for driving bipolar stepping motors. During a motor pulse, the n-channel device of one buffer and the p-channel device of the other buffer will be activated. Both n-channel transistor are on and conducting, between output pulses. The outputs are protected against inductive voltage spikes with diodes to both supply pins. The motor output period and pulse width are mask programmable, as listed below: Available motor periods (TM): 125, 250, 500 ms and 2, 16 s Available max. pulse widths (tM): 15, 6, 23.4, 31.25, 46.9 ms Available motor periods for motor test (TMT): 250, 500 ms and 1 s Note: The following constraints for combination of motor period and pulse widths have to be considered: TM u 4 * tM, TMT u 4 * tM or alternatively TM = 2 * tM, TMT = 2 * tM
VDD SC4 SC3 SC2 SC1
VSS
ALIN/ -MT
VSS
MOT1L
Test Crystal Specification
Oscillation frequency Series resistance Static capacitance Dynamic capacitance Load capacitance fOSC = 32768 Hz RS = 30 kW CO = 1.5 pF C1 = 3.0 fF CL optionally 10 or 12.5 pF
Alarm Outputs
The alarm output driver consists of push-pull stage for driving a speaker via an external bipolar transistor.
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I I I I I I I I I I IIIIII II I
1 13 12 11 10 9 8 2
VDD
OSCIN OSCOUT ALOUT MOT2
R1
R3
E1467D
7
3 4
6
5
MOT1R
R2
9611896
Figure 5. Functional test
Rev. A2, 15-Jan-01
E1467D
Operating Characteristics
VSS = 0, VDD = 1.5 V, Tamb = +25C, unless otherwise specified All voltage levels are measured with reference to VSS. Test crystal as specified below. Parameters Operating voltage Operating temperature Operating current Motor drive output Motor output current Motor period Motor period during motor test Motor pulse width Oscillator Startup voltage Frequency stability Integrated input capacitance Integrated output capacitance Input current SC1 to SC4 Alarm/output Output current for driving npn-transistor n-channel p-channel Output current for driving pnp-transistor n-channel p-channel Alarm options Tone frequency Modulation frequency On/Off time Alarm input/motor test Input current Input current Input debounce delay Note 1: Note 2: Note 3: Note 4: Note 5: Test Conditions / Pins Symbol VDD Tamb IDD IM TM TMT tM Within 2 s DVDD = 100 mV VDD = 1.1 to 2.2 V Note 3 VIN = 0.2 V VIN = VDD, note 5 VDD = 1.2 V R3 = 100 kW R2 = 1 kW, note 2, note 4 VDD = 1.2 V R3 = 1 kW R2 = 100 kW, note 2, note 4 IANn IANp 1 -0.5 3 -1 10 mA mA VSTART Df/f COSCIN COSCOUT ISCINL ISCINH 1.2 0.1 Min. 1.1 -20 Typ. 1.5 1 "4.3 See option list See option list See option list 2.2 0.2 Max. 2.2 +70 3 Unit V C mA mA s ms ms V ppm pF pF mA mA
R1 = , note 2 VDD = 1.2 V, R1 = 200 W
See option list See option list 1 5 25 0.05 0.15 0.5
IAPn IAPp fA fMOD tON/tOFF
0.5 -1
1 -2 See option list See option list See option list
-10
mA mA Hz Hz s
ALIN = VDD, peak current ALIN = VSS, peak current
IAINH IAINL tAIN
0.6 -0.6 23.4
3 -3
10 -10 31.2
mA mA ms
Typical parameters represent the statistical mean values See test circuit Values can be selected in 1 pF steps. A total capacitance (COSCIN + COSCOUT) of 38 pF is available npn or pnp driving transistors defined by mask options ISCINH is the peak current of a pulsed current with duty cycle 1:63. Average current is always smaller than 10 nA
Rev. A2, 15-Jan-01
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E1467D
a ALIN/ MT VDD VSS VDD MOT1
tM TM TMT
VSS VDD VSS
MOT2
Motor output signal during normal mode and motortest
Detail a:
1/fTEST
9611898
Figure 6. Motor output signal during normal operation and during motor test
T < tAIN
T > tAIN
T < tV4
T > tV4
ALIN / MTEST b ALOUT
VDD VSS VDD VSS
tON tOFF
Signal on alarm input and alarm output during alarm activation
Detail b:
VDD VSS
1/fA 1/fMOD
Alarm output signal
9611899
Figure 7. Alarm operation
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Rev. A2, 15-Jan-01
E1467D
2.00006 COX = 2.00005 2.00004 2.00003 2.00002 2.00001 0.95 1.05 1.00
Motorperiod (s)
2.00000 1.99999 1.99998 1.99997 1.99996 1.99995 1.99994 1.99993 1.99992 1.99991 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
9611900
Trimming steps
Figure 8. Typical trimming curve characteristic for TM of 2 s
COX means frequency deviation due to production process variations. Trimming inputs SC1 ... SC4 are binary weighted, i.e., SC1 ... SC4 = 0 corresponds to trimming step 0 SC1 ... SC4 = 1 corresponds to trimming step 15 LSB = SC1
Rev. A2, 15-Jan-01
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E1467D
Ordering Information
Table 4. Option list e1267D-
Option Cycle (TM) s Motor Pulse (tM) ms Test (TMT) ms Frequency Hz Modulation Frequency Hz Alarm On/ Off Time s Driver Type Activation Polarity pF Load Cap. Integrated Capacitance COSCIN *) pF COSCOUT *) pF
-B -D -V2 E2
2 2 0.5 2
23.4 31.25 23.4 46.9
250 250 250 250
2048 2048 2048 2048
8 8 8 8
0.5/ 0.5 0.5/ 0.5 0.5/ 0.5 1/ 3
NPN NPN NPN NPN
VSS VDD VSS VSS
10 10 12.5 12.5
17 17 20 20
12 12 16 16
*) on-chip stray capacitance included
Option Pad 1 Pad 2 Pad 3 Pad 4 Pad 5 Pad Designation Pad 6 Pad 7 Pad 8 Pad 9 Pad 10 Pad 11 Pad 12 Pad 13
-B -D -V2 -D
OSCIN OSCIN OSCIN OSCIN
VDD OSCOUT VDD OSCOUT
ALOUT ALOUT ALOUT ALOUT
MOT2 MOT2 MOT2 MOT2
MOT1 MOT1 MOT1 MOT1
MOT1 MOT1 MOT1 ALIN/ TEST
ALIN/ MTEST ALIN/ MTEST ALIN/ MTEST MOT1
VSS VSS VSS VSS
OSCOUT VDD OSCOUT VDD
SC4 SC4 SC4 SC4
SC3 SC3 SC3 SC3
SC2 SC2 SC2 SC2
SC1 SC1 SC1 SC1
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel-wm.com
Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
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Rev. A2, 15-Jan-01

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