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 1P AL (R) C2 0 Series
fax id: 6004
PAL(R)C20 Series
Reprogrammable CMOS PALC 16L8, 16R8, 16R6, 16R4
Features
* CMOS EPROM technology for reprogrammability * High performance at quarter power -- tPD = 25 ns -- tS = 20 ns -- tCO = 15 ns -- ICC = 45 mA * High performance at military temperature -- tPD = 20 ns -- tS = 20 ns -- tCO = 15 ns -- ICC = 70 mA * Commercial and military temperature range * High reliability -- Proven EPROM technology -- >1500V input protection from electrostatic discharge -- 100% AC and DC tested -- 10% power supply tolerances -- High noise immunity -- Security feature prevents pattern duplication -- 100% programming and functional testing
Functional Description
Cypress PALC20 Series devices are high- speed electrically programmable and UV- erasable logic devices produced in a proprietary N-well CMOS EPROM process. These devices utilize a sum-of-products (AND-OR) structure providing users with the ability to program custom logic functions serving unique requirements. PALs are offered in 20-pin plastic and ceramic DIP, plastic SOJ, and ceramic LCC packages. The ceramic package can be equipped with an erasure window; when exposed to UV light, the PAL is erased and can then be reprogrammed. Before programming, AND gates or product terms are connected via EPROM cells to both true and complement inputs. Programming an EPROM cell disconnects an input term from a product term. Selective programming of these cells allows a specific logic function to be implemented in a PALC device. PALC devices are supplied in four functional configurations designated 16R8, 16R6, 16R4, and 16L8. These 8 devices have potentially 16 inputs and 8 outputs configurable by the user. Output configurations of 8 registers, 8 combinatorial, 6 registers and 2 combinatorial as well as 4 registers and 4 combinatorial are provided by the 4 functional variations of the product family.
Logic Symbols and DIP and SOJ Pinouts
16R8
CP I I I I I I I I VSS
1 2 3 4 5 6 7 8 9 10
AND OR GATE ARRAY
16R6
20 19 18 17 16 15 14 13 12 11
16R4
20 19 18 17
16L8
20 19 18 17
VCC O O O O O O O O OE
CP I I I I I I I I VSS
1 2 3 4 5 6 7 8 9 10
AND OR GATE ARRAY
VCC I/O O O O O O O I/O OE
CP I I I I I I I I VSS
1 2 3 4 5 6 7 8 9 10
AND OR GATE ARRAY
VCC I/O I/O O O O O I/O I/O OE
I I I I I I I I I VSS
1 2 3 4 5 6 7 8 9 10
AND OR GATE ARRAY
20 19 18 17 16 15 14 13 12 11
V OCC I/O I/O I/O I/O I/O I/O O I
16 15 14 13 12 11
16 15 14 13 12 11
C20-1
C20-2
C20-3
C20-4
LCC Pinouts
3 2 1 20 19 18 17 16 15 14 910111213 3 2 1 20 19 18 17 16 15 14 910111213 3 2 1 20 19 18 17 16 15 14 910111213 3 2 1 20 19 18 17 16 15 14 910111213
I I I I I
4 5 6 7 8
O O O O O C20-5
I I I I I
4 5 6 7 8
O O O O O C20-6
I I I I I
4 5 6 7 8
I/O O O O O C20-7
I I I I I
4 5 6 7 8
I/O I/O I/O I/O I/O C20-8
PAL is a registered trademark of Advanced Micro Devices.
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
* CA 95134 * 408-943-2600 June 1986 - Revised September 1995


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