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Quad-Channel Digital Isolators, 5 kV ADUM2400/ADuM2401/ADuM2402 FEATURES Low power operation 5 V operation 1.0 mA per channel max @ 0 Mbps to 2 Mbps 3.5 mA per channel max @ 10 Mbps 31 mA per channel max @ 90 Mbps 3 V operation 0.7 mA per channel max @ 0 Mbps to 2 Mbps 2.1 mA per channel max @ 10 Mbps 20 mA per channel max @ 90 Mbps Bidirectional communication 3 V/5 V level translation High temperature operation: 105C High data rate: dc to 90 Mbps (NRZ) Precise timing characteristics 2 ns max pulse-width distortion 2 ns max channel-to-channel matching High common-mode transient immunity: > 25 kV/s Output enable function Wide body SOIC 16-lead package Safety and regulatory approvals (pending) UL recognition: 5000 V rms for 1 minute per UL 1577 CSA component acceptance notice #5A: IEC 60950-1: 600 V rms (reinforced) IEC 60601-1: 250 V rms (reinforced) VDE certificate of conformity DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01 DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000 VIORM = 848 V peak GENERAL DESCRIPTION The ADuM240x are 4-channel digital isolators based on Analog Devices' iCoupler(R) technology. Combining high speed CMOS and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives, such as optocoupler devices. By avoiding the use of LEDs and photodiodes, iCoupler devices remove the design difficulties commonly associated with optocouplers. The typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects are eliminated with the simple iCoupler digital interfaces and stable performance characteristics. The need for external drivers and other discretes is eliminated with these iCoupler products. Furthermore, iCoupler devices run at one-tenth to one-sixth the power of optocouplers at comparable signal data rates. The ADuM240x isolators provide four independent isolation channels in a variety of channel configurations and data rates (see Ordering Guide). The ADuM240x models operate with the supply voltage of either side ranging from 2.7 V to 5.5 V, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. In addition, the ADuM240x provide low pulse-width distortion (<2 ns for CRWZ grade) and tight channel-tochannel matching (<2 ns for CRWZ grade). Unlike other optocoupler alternatives, the ADuM240x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/powerdown conditions. APPLICATIONS General-purpose, high voltage, multichannel isolation Medical equipment Motor drives Power supplies FUNCTIONAL BLOCK DIAGRAMS VDD1 1 GND1 2 VIA 3 VIB 4 VIC 5 VID 6 NC 7 GND1 8 ENCODE ENCODE ENCODE ENCODE DECODE DECODE DECODE DECODE 16 VDD2 15 GND2 14 VOA 13 VOB 12 VOC 11 VOD 05007-001 VDD1 1 GND1 2 VIA 3 VIB 4 VIC 5 VOD 6 VE1 7 GND1 8 ENCODE ENCODE DECODE DECODE DECODE DECODE DECODE ENCODE 16 VDD2 15 GND2 14 VOA 13 VOB 12 VOC 11 VID 05007-002 VDD1 1 GND1 2 VIA 3 VIB 4 VOC 5 VOD 6 VE1 7 GND1 8 ENCODE ENCODE DECODE DECODE DECODE DECODE ENCODE ENCODE 16 VDD2 15 GND2 14 VOA 13 VOB 12 VIC 11 VID 05007-003 10 VE2 9 GND2 10 VE2 9 GND2 10 VE2 9 GND2 Figure 1. ADUM2400 Functional Block Diagram Figure 2. ADuM2401 Functional Block Diagram Figure 3. ADuM2402 Functional Block Diagram Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2005 Analog Devices, Inc. All rights reserved. ADUM2400/ADuM2401/ADuM2402 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Revision History ............................................................................... 2 Electrical Characteristics ................................................................. 3 5 V Operation ............................................................................... 3 3 V Operation ............................................................................... 6 Mixed 5 V/3 V or 3 V/5 V Operation........................................ 9 Package Characteristics ............................................................. 13 Regulatory Information (Pending) .......................................... 13 Insulation and Safety-Related Specifications.......................... 13 DIN EN 60747-5-2 (VDE 0884 Part 2) Insulation Characteristics (Pending).......................................................... 14 Recommended Operating Conditions .................................... 14 Absolute Maximum Ratings ......................................................... 15 ESD Caution................................................................................ 15 Pin Configurations and Pin Function Descriptions .................. 16 Typical Performance Characteristics ........................................... 18 Application Information................................................................ 20 PC Board Layout ........................................................................ 20 Propagation Delay-Related Parameters................................... 20 DC Correctness and Magnetic Field Immunity........................... 20 Power Consumption .................................................................. 21 Insulation Lifetime ..................................................................... 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 REVISION HISTORY 9/05--Revision 0: Initial Version Rev. 0 | Page 2 of 24 ADUM2400/ADuM2401/ADuM2402 ELECTRICAL CHARACTERISTICS 5 V OPERATION 1 4.5 V VDD1 5.5 V, 4.5 V VDD2 5.5 V. All min/max specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25C, VDD1 = VDD2 = 5 V. Table 1. Parameter DC SPECIFICATIONS Input Supply Current, per Channel, Quiescent Output Supply Current, per Channel, Quiescent ADUM2400, Total Supply Current, Four Channels 2 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 Supply Current VDD2 Supply Current ADuM2401, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 Supply Current VDD2 Supply Current ADuM2402, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 or VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 or VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 or VDD2 Supply Current For All Models Input Currents Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Symbol IDDI (Q) IDDO (Q) Min Typ Max 0.50 0.53 0.19 0.21 Unit mA mA Test Conditions IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (90) IDD2 (90) 2.2 0.9 8.6 2.6 76 21 2.8 1.4 10.6 3.5 100 25 mA mA mA mA mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 5 MHz logic signal freq. 5 MHz logic signal freq. 45 MHz logic signal freq. 45 MHz logic signal freq. IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (90) IDD2 (90) 1.8 1.2 7.1 4.1 62 35 2.4 1.8 9.0 5.0 82 43 mA mA mA mA mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 5 MHz logic signal freq. 5 MHz logic signal freq. 45 MHz logic signal freq. 45 MHz logic signal freq. IDD1 (Q), IDD2 (Q) IDD1 (10), IDD2 (10) IDD1 (90), IDD2 (90) IIA, IIB, IIC, IID, IE1, IE2 VIH, VEH VIL, VEL VOAH, VOBH, VOCH, VODH -10 2.0 1.5 2.1 mA DC to 1 MHz logic signal freq. 5.6 7.0 mA 5 MHz logic signal freq. 49 62 mA 45 MHz logic signal freq. 0.01 10 A V 0 VIA, VIB, VIC, VID VDD1 or VDD2, 0 VE1, VE2 VDD1 or VDD2 0.8 VDD1/ VDD2 - 0.1 VDD1/ VDD2 - 0.4 5.0 4.8 0.0 0.1 0.04 0.1 0.2 0.4 V V V V V IOx = -20 A, VIx = VIxH IOx = -4 mA, VIx = VIxH IOx = 20 A, VIx = VIxL IOx = 400 A, VIx = VIxL IOx = 4 mA, VIx = VIxL Logic Low Output Voltages VOAL, VOBL, VOCL, VODL Rev. 0 | Page 3 of 24 ADUM2400/ADuM2401/ADuM2402 Parameter SWITCHING SPECIFICATIONS ADuM240xARWZ Minimum Pulse Width 3 Maximum Data Rate 4 Propagation Delay 5 Pulse-Width Distortion, |tPLH - tPHL|5 Propagation Delay Skew 6 Channel-to-Channel Matching 7 ADuM240xBRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 ADuM240xCRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 For All Models Output Disable Propagation Delay (High/Low to High Impedance) Output Enable Propagation Delay (High Impedance to High/Low) Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity at Logic High Output 8 Common-Mode Transient Immunity at Logic Low Output8 Refresh Rate Input Dynamic Supply Current, per Channel 9 Output Dynamic Supply Current, per Channel9 Symbol Min Typ Max Unit Test Conditions PW tPHL, tPLH PWD tPSK tPSKCD/OD PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 10 20 32 5 1 50 65 1000 ns Mbps 100 ns 40 ns 50 ns 50 ns 100 50 3 15 3 6 ns Mbps ns ns ps/C ns ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 90 18 8.3 120 27 0.5 3 11.1 32 2 10 2 5 ns Mbps ns ns ps/C ns ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels tPHZ, tPLH tPZH, tPZL tR/tF |CMH| |CML| fr IDDI (D) IDDO (D) 6 6 2.5 35 35 1.2 0.19 0.15 8 8 ns ns ns kV/s kV/s Mbps mA/Mbps mA/Mbps CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 25 25 Rev. 0 | Page 4 of 24 ADUM2400/ADuM2401/ADuM2402 1 2 All voltages are relative to their respective ground. Supply current values are for all four channels combined running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 14 for total IDD1 and IDD2 supply currents as a function of data rate for ADUM2400/ADuM2401/ADuM2402 channel configurations. 3 The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed. 4 The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed. 5 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 6 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 Co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate than can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. 0 | Page 5 of 24 ADUM2400/ADuM2401/ADuM2402 3 V OPERATION 1 2.7 V VDD1 3.6 V, 2.7 V VDD2 3.6 V. All min/max specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25C, VDD1 = VDD2 = 3.0 V. Table 2. Parameter DC SPECIFICATIONS Input Supply Current, per Channel, Quiescent Output Supply Current, per Channel, Quiescent ADUM2400, Total Supply Current, Four Channels 2 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 Supply Current VDD2 Supply Current ADuM2401, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 Supply Current VDD2 Supply Current ADuM2402, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 or VDD2 Supply Current 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 or VDD2 Supply Current 90 Mbps (CRWZ Grade Only) VDD1 or VDD2 Supply Current For All Models Input Currents Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Symbol IDDI (Q) IDDO (Q) Min Typ Max Unit mA mA Test Conditions 0.26 0.31 0.11 0.14 IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (90) IDD2 (90) 1.2 0.5 4.5 1.4 42 11 1.9 0.9 6.5 2.0 65 15 mA mA mA mA mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 5 MHz logic signal freq. 5 MHz logic signal freq. 45 MHz logic signal freq. 45 MHz logic signal freq. IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (90) IDD2 (90) 1.0 0.7 3.7 2.2 34 19 1.6 1.2 5.4 3.0 52 27 mA mA mA mA mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 5 MHz logic signal freq. 5 MHz logic signal freq. 45 MHz logic signal freq. 45 MHz logic signal freq. IDD1 (Q), IDD2 (Q) IDD1 (10), IDD2 (10) IDD1 (90), IDD2 (90) IIA, IIB, IIC, IID, IE1, IE2 VIH, VEH VIL, VEL VOAH, VOBH, VOCH, VODH -10 1.6 0.9 1.5 mA DC to 1 MHz logic signal freq. 3.0 4.2 mA 5 MHz logic signal freq. 27 39 mA 45 MHz logic signal freq. 0.01 10 A V 0 VIA, VIB, VIC, VID VDD1 or VDD2, 0 VE1,VE2 VDD1 or VDD2 0.4 VDD1/ VDD2 - 0.1 VDD1/ VDD2 - 0.4 3.0 2.8 0.0 0.1 0.04 0.1 0.2 0.4 V V V V V IOx = -20 A, VIx = VIxH IOx = -4 mA, VIx = VIxH IOx = 20 A, VIx = VIxL IOx = 400 A, VIx = VIxL IOx = 4 mA, VIx = VIxL Logic Low Output Voltages VOAL, VOBL, VOCL, VODL Rev. 0 | Page 6 of 24 ADUM2400/ADuM2401/ADuM2402 Parameter SWITCHING SPECIFICATIONS ADuM240xARWZ Minimum Pulse Width 3 Maximum Data Rate 4 Propagation Delay 5 Pulse-Width Distortion, |tPLH - tPHL|5 Propagation Delay Skew 6 Channel-to-Channel Matching 7 ADuM240xBRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 ADuM240xCRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 For All Models Output Disable Propagation Delay (High/Low to High Impedance) Output Enable Propagation Delay (High Impedance to High/Low) Output Rise/Fall Time (10% to 90%) Common Mode Transient Immunity at Logic High Output 8 Common Mode Transient Immunity at Logic Low Output8 Refresh Rate Input Dynamic Supply Current, per Channel 9 Output Dynamic Supply Current, per Channel9 Symbol Min Typ Max Unit Test Conditions PW tPHL, tPLH PWD tPSK tPSKCD/OD PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 10 20 38 5 1 50 75 1000 ns Mbps 100 ns 40 ns 50 ns 50 ns 100 50 3 22 3 6 ns Mbps ns ns ps/C ns ns ns CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 90 20 8.3 120 34 0.5 3 11.1 45 2 16 2 5 ns Mbps ns ns ps/C ns ns ns CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels tPHZ, tPLH tPZH, tPZL tR/tF |CMH| |CML| fr IDDI (D) IDDO (D) 6 6 3 35 35 1.1 0.10 0.03 8 8 ns ns ns kV/s kV/s Mbps mA/Mbps mA/Mbps CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 25 25 Rev. 0 | Page 7 of 24 ADUM2400/ADuM2401/ADuM2402 1 2 All voltages are relative to their respective ground. Supply current values are for all four channels combined running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 14 for total IDD1 and IDD2 supply currents as a function of data rate for ADUM2400/ADuM2401/ADuM2402 channel configurations. 3 The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed. 4 The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed. 5 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 6 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 Co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8VDD2. CML is the maximum common-mode voltage slew rate than can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. 0 | Page 8 of 24 ADUM2400/ADuM2401/ADuM2402 MIXED 5 V/3 V OR 3 V/5 V OPERATION 1 5 V/3 V operation: 4.5 V VDD1 5.5 V, 2.7 V VDD2 3.6 V. 3 V/5 V operation: 2.7 V VDD1 3.6 V, 4.5 V VDD2 5.5 V. All min/max specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25C; VDD1 = 3.0 V, VDD2 = 5 V; or VDD1 = 5 V, VDD2 = 3.0 V. Table 3. Parameter DC SPECIFICATIONS Input Supply Current, per Channel, Quiescent 5 V/3 V Operation 3 V/5 V Operation Output Supply Current, per Channel, Quiescent 5 V/3 V Operation 3 V/5 V Operation ADUM2400, Total Supply Current, Four Channels 2 DC to 2 Mbps VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation 90 Mbps (CRWZ Grade Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation ADuM2401, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation Symbol IDDI (Q) 0.50 0.26 IDDO (Q) 0.11 0.19 0.14 mA 0.21 mA 0.53 mA 0.31 mA Min Typ Max Unit Test Conditions IDD1 (Q) 2.2 1.2 IDD2 (Q) 0.5 0.9 IDD1 (10) 8.6 4.5 IDD2 (10) 1.4 2.6 IDD1 (90) 76 42 IDD2 (90) 11 21 15 25 mA mA 45 MHz logic signal freq. 45 MHz logic signal freq. 100 65 mA mA 45 MHz logic signal freq. 45 MHz logic signal freq. 2.0 3.5 mA mA 5 MHz logic signal freq. 5 MHz logic signal freq. 10.6 mA 6.5 mA 5 MHz logic signal freq. 5 MHz logic signal freq. 0.9 1.4 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 2.8 1.9 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. IDD1 (Q) 1.8 1.0 IDD2 (Q) 0.7 1.2 IDD1 (10) 7.1 3.7 IDD2 (10) 2.2 4.1 3.0 5.0 mA mA 5 MHz logic signal freq. 5 MHz logic signal freq. 9.0 5.4 mA mA 5 MHz logic signal freq. 5 MHz logic signal freq. 1.2 1.8 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 2.4 1.6 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. Rev. 0 | Page 9 of 24 ADUM2400/ADuM2401/ADuM2402 Parameter 90 Mbps (CRWZ Grade Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation ADuM2402, Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation 90 Mbps (CRWZ Grade Only) VDD1 Supply Current 5 V/3 V Operation 3 V/5 V Operation VDD2 Supply Current 5 V/3 V Operation 3 V/5 V Operation For All Models Input Currents Logic High Input Threshold 5 V/3 V Operation 3 V/5 V Operation Logic Low Input Threshold 5 V/3 V Operation 3 V/5 V Operation Logic High Output Voltages Symbol IDD1 (90) 62 34 IDD2 (90) 19 35 27 43 mA mA 45 MHz logic signal freq. 45 MHz logic signal freq. 82 52 mA mA 45 MHz logic signal freq. 45 MHz logic signal freq. Min Typ Max Unit Test Conditions IDD1 (Q) 1.5 0.9 IDD2 (Q) 0.9 1.5 IDD1 (10) 5.6 3.0 IDD2 (10) 3.0 5.6 IDD1 (90) 49 27 IDD2 (90) 27 49 IIA, IIB, IIC, IID, IE1, IE2 VIH, VEH -10 0.01 39 62 10 mA mA A 45 MHz logic signal freq. 45 MHz logic signal freq. 0 VIA,VIB, VIC,VID VDD1 or VDD2, 0 VE1, VE2 VDD1 or VDD2 62 39 mA mA 45 MHz logic signal freq. 45 MHz logic signal freq. 4.2 7.0 mA mA 5 MHz logic signal freq. 5 MHz logic signal freq. 7.0 4.2 mA mA 5 MHz logic signal freq. 5 MHz logic signal freq. 1.5 2.1 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 2.1 1.5 mA mA DC to 1 MHz logic signal freq. DC to 1 MHz logic signal freq. 2.0 1.6 VIL, VEL 0.8 0.4 VOAH, VOBH, VDD1/ VOCH, VODH VDD2 - 0.1 VDD1/ VDD2 - 0.4 VOAL, VOBL, VOCL, VODL VDD1/VDD2 VDD1/VDD2 - 0.2 0.0 0.04 0.2 0.1 0.1 0.4 V V V V V V V V V IOx = -20 A, VIx = VIxH IOx = -4 mA, VIx = VIxH IOx = 20 A, VIx = VIxL IOx = 400 A, VIx = VIxL IOx = 4 mA, VIx = VIxL Logic Low Output Voltages Rev. 0 | Page 10 of 24 ADUM2400/ADuM2401/ADuM2402 Parameter SWITCHING SPECIFICATIONS ADuM240xARWZ Minimum Pulse Width 3 Maximum Data Rate 4 Propagation Delay 5 Pulse-Width Distortion, |tPLH - tPHL|5 Propagation Delay Skew 6 Channel-to-Channel Matching 7 ADuM240xBRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 ADuM240xCRWZ Minimum Pulse Width3 Maximum Data Rate4 Propagation Delay5 Pulse-Width Distortion, |tPLH - tPHL|5 Change vs. Temperature Propagation Delay Skew6 Channel-to-Channel Matching, Co-Directional Channels7 Channel-to-Channel Matching, Opposing-Directional Channels7 For All Models Output Disable Propagation Delay (High/Low to High Impedance) Output Enable Propagation Delay (High Impedance to High/Low) Output Rise/Fall Time (10% to 90%) 5 V/3 V Operation 3 V/5 V Operation Common-Mode Transient Immunity at Logic High Output 8 Common-Mode Transient Immunity at Logic Low Output8 Refresh Rate 5 V/3 V Operation 3 V/5 V Operation Input Dynamic Supply Current, per Channel 9 5 V/3 V Operation 3 V/5 V Operation Output Dynamic Supply Current, per Channel9 5 V/3 V Operation 3 V/5 V Operation Symbol Min Typ Max Unit Test Conditions PW tPHL, tPLH PWD tPSK tPSKCD/OD PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 10 15 35 5 1 50 70 1000 ns Mbps 100 ns 40 ns 50 ns 50 ns 100 50 3 22 3 6 ns Mbps ns ns ps/C ns ns ns CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF,CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels PW tPHL, tPLH PWD tPSK tPSKCD tPSKOD 90 20 8.3 120 30 0.5 3 11.1 ns Mbps 40 ns 2 ns ps/C 14 ns 2 ns 5 ns CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels tPHZ, tPLH tPZH, tPZL tR/tf 6 6 8 8 ns ns CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels CL = 15pF, CMOS signal levels |CMH| |CML| fr 25 25 3.0 2.5 35 35 ns ns kV/s kV/s VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 1.2 1.1 IDDI (D) 0.19 0.10 IDDI (D) 0.03 0.05 Mbps Mbps mA/Mbps mA/Mbps mA/Mbps mA/Mbps Rev. 0 | Page 11 of 24 ADUM2400/ADuM2401/ADuM2402 1 2 All voltages are relative to their respective ground. Supply current values are for all four channels combined running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 14 for total IDD1 and IDD2 supply currents as a function of data rate for ADUM2400/ADuM2401/ADuM2402 channel configurations. 3 The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed. 4 The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed. 5 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 6 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 7 Co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 8 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8VDD2. CML is the maximum common-mode voltage slew rate than can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. 0 | Page 12 of 24 ADUM2400/ADuM2401/ADuM2402 PACKAGE CHARACTERISTICS Table 4. Parameter Resistance (Input-Output) 1 Capacitance (Input-Output)1 Input Capacitance 2 IC Junction-to-Case Thermal Resistance, Side 1 IC Junction-to-Case Thermal Resistance, Side 2 1 2 Symbol RI-O CI-O CI jci jco Min Typ 1012 2.2 4.0 33 28 Max Unit pF pF C/W C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside Device considered a 2-terminal device: Pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together and Pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION (PENDING) Table 5. UL 1 Recognized under 1577 component recognition program1 5000 V rms isolation voltage CSA Approved under CSA Component Acceptance Notice #5A Reinforced insulation per CSA 60950-1-03 and IEC 60950-1,600 V rms (848 V peak) maximum working voltage Approved per IEC 60601-1 VDE 2 Certified according to DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-012 Basic insulation, 848 V peak Reinforced insulation, 250 V rms maximum working voltage 1 2 Complies with DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01, DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000 Reinforced insulation, 560 V peak In accordance with UL1577, each ADuM240x is proof tested by applying an insulation test voltage 6000 V rms for 1 second (current leakage detection limit = 10 A). In accordance with DIN EN 60747-5-2, each ADuM240x is proof tested by applying an insulation test voltage 1590 V peak for 1 second (partial discharge detection limit = 5 pC). INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 6. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group Symbol L(I01) L(I02) Value 5000 7.46 min 8.10 min 0.017 min >175 IIIa Unit Conditions V rms 1-minute duration. mm Measured from input terminals to output terminals, shortest distance through air. mm Measured from input terminals to output terminals, shortest distance path along body. mm Insulation distance through insulation. V DIN IEC 112/VDE 0303 Part 1. Material Group (DIN VDE 0110, 1/89, Table 1). CTI Rev. 0 | Page 13 of 24 ADUM2400/ADuM2401/ADuM2402 DIN EN 60747-5-2 (VDE 0884 PART 2) INSULATION CHARACTERISTICS (PENDING) Table 7. Description Installation classification per DIN VDE 0110 For Rated Mains Voltage 300 V rms For Rated Mains Voltage 450 V rms For Rated Mains Voltage 600 V rms Climatic Classification Pollution Degree (DIN VDE 0110, Table 1) Maximum Working Insulation Voltage Input to Output Test Voltage, Method b1 VIORM x 1.875 = VPR, 100% Production Test, tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a After Environmental Tests Subgroup 1 VIORM x 1.6 = VPR, tm = 60 sec, Partial Discharge < 5p C After Input and/or Safety Test Subgroup 2/3 VIORM x 1.2 = VPR, tm = 60 sec, Partial Discharge < 5p C Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec) Safety-Limiting Values (Maximum value allowed in the event of a failure, also see Figure 4) Case Temperature Side 1 Current Side 2 Current Insulation Resistance at TS, VIO = 500 V Symbol Characteristic I-IV I-II I-II 40/105/21 2 848 1590 Unit VIORM VPR VPR V peak V peak 1357 1018 6000 150 265 335 >109 V peak V peak V peak C mA mA VTR TS IS1 IS2 RS These isolators are suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by means of protective circuits. "*" marking on packages denotes DIN EN 60747-5-2 approval for 846 V peak working voltage. 350 RECOMMENDED OPERATING CONDITIONS Table 8. SIDE #2 300 SAFETY-LIMITING CURRENT (mA) 250 200 150 SIDE #1 100 50 0 0 50 100 150 CASE TEMPERATURE (C) 200 Parameter Operating Temperature Supply Voltages 1 Input Signal Rise and Fall Times 1 Symbol TA VDD1, VDD 2 Min -40 2.7 Max +105 5.5 1.0 Unit C V ms All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on immunity to external magnetic fields. Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 05007-003 Rev. 0 | Page 14 of 24 ADUM2400/ADuM2401/ADuM2402 ABSOLUTE MAXIMUM RATINGS Table 9. Parameter Storage Temperature Ambient Operating Temperature Supply Voltages 1 Input Voltage1, 2 Output Voltage1, 2 Average Output Current, Per Pin 3 Side 1 Side 2 Common-Mode Transients 4 1 2 Symbol TST TA VDD1, VDD2 VIA, VIB, VIC, VID, VE1,VE2 VOA, VOB, VOC, VOD IO1 IO2 Min -65 -40 -0.5 -0.5 -0.5 -18 -22 -100 Max 150 105 7.0 VDDI + 0.5 VDDO + 0.5 18 22 +100 Unit C C V V V mA mA kV/s All voltages are relative to their respective ground. VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. See the PC Board Layout section. 3 See Figure 4 for maximum rated current values for various temperatures. 4 Refers to common-mode transients across the insulation barrier. Common-mode transients exceeding the Absolute Maximum Rating may cause latch-up or permanent damage. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Ambient temperature = 25C, unless otherwise noted. Table 10. Maximum Continuous Working Voltage 1 Parameter AC Voltage, Bipolar Waveform AC Voltage, Unipolar Waveform DC Voltage 1 Max 565 848 848 Unit VPK VPK V Constraint 50-year minimum lifetime Maximum CSA/VDE approved working voltage Maximum CSA/VDE approved working voltage Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Table 11. Truth Table (Positive Logic) VIX Input 1 H L X X X X VEX Input H or NC H or NC L H or NC L X VDDI State1 Powered Powered Powered Unpowered Unpowered Powered VDDO State1 Powered Powered Powered Powered Powered Unpowered VOX Output1 Notes H L Z H Outputs returns to input state within 1 s of VDDI power restoration. Z Indeterminate Outputs returns to input state within 1 s of VDDO power restoration if VEX state is H or NC. Outputs returns to high impedance state within 8 ns of VDDO power restoration if VEX state is L. 1 VIX and VOX refer to the input and output signals of a given channel (A, B, C, or D). VEX refers to the output enable signal on the same side as the VOX outputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 15 of 24 ADUM2400/ADuM2401/ADuM2402 PIN CONFIGURATIONS AND PIN FUNCTION DESCRIPTIONS VDD1 1 *GND1 2 VIA 3 VIB 4 VIC 5 VID 6 NC 7 *GND1 8 16 15 VDD2 GND2* VOA VDD1 1 *GND1 2 VIA 3 VIB 4 VIC 5 VOD 6 VE1 7 05007-005 16 15 VDD2 GND2* VOA VDD1 1 *GND1 2 VIA 3 VIB 4 VOC 5 VOD 6 VE1 7 05007-006 16 15 VDD2 GND2* VOA ADUM2400 14 ADuM2401 14 ADuM2402 14 13 VOB TOP VIEW (Not to Scale) 12 VOC 11 10 9 13 VOB TOP VIEW (Not to Scale) 12 VOC 11 10 9 13 VOB TOP VIEW (Not to Scale) 12 VIC 11 10 9 VOD VE2 GND2* VID VE2 GND2* VID VE2 GND2* 05007-007 *GND1 8 *GND1 8 NC = NO CONNECT NC = NO CONNECT NC = NO CONNECT Figure 5. ADUM2400 Pin Configuration Figure 6. ADuM2401 Pin Configuration Figure 7. ADuM2402 Pin Configuration * Pin 2 and Pin 8 are internally connected. Connecting both to GND1 is recommended. Pin 9 and Pin 15 are internally connected. Connecting both to GND2 is recommended. Output enable Pin 10 on the ADUM2400 may be left disconnected if outputs are always enabled. Output enable Pin 7 and Pin 10 on the ADuM2401/ADuM2402 may be left disconnected if outputs are always enabled. In noisy environments, connecting Pin 7 (for ADuM2401 and ADuM2402) and Pin 10 (for all models) to an external logic high or low is recommended. Table 12. ADUM2400 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic VDD1 GND1 VIA VIB VIC VID NC GND1 GND2 VE2 Function Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Input D. No Connect. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOA, VOB, VOC, and VOD outputs are enabled when VE2 is high or disconnected. VOA, VOB, VOC, and VOD outputs are disabled when VE2 is low. Logic Output D. Logic Output C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 2, 2.7 V to 5.5 V. Table 13. ADuM2401 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VIC VOD VE1 Function Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Output D. Output enable 1. Active high logic input. VOD output is enabled when VE1 is high or disconnected. VOD is disabled when VE1 is low. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOA, VOB, and VOC outputs are enabled when VE2 is high or disconnected. VOA, VOB, and VOC outputs are disabled when VE2 is low. Logic Input D. Logic Output C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. 8 9 10 GND1 GND2 VE2 11 12 13 14 15 16 VOD VOC VOB VOA GND2 VDD2 11 12 13 14 15 16 VID VOC VOB VOA GND2 VDD2 Rev. 0 | Page 16 of 24 ADUM2400/ADuM2401/ADuM2402 Table 14. ADuM2402 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VOC VOD VE1 Function Supply Voltage for Isolator Side 1, 2.7 V to 5.5 V. Ground 1. Ground reference for isolator Side 1. Logic Input A. Logic Input B. Logic Output C. Logic Output D. Output Enable 1. Active high logic input. VOC and VOD outputs are enabled when VE1 is high or disconnected. VOC and VOD outputs are disabled when VE1 is low. Ground 1. Ground reference for isolator Side 1. Ground 2. Ground reference for isolator Side 2. Output Enable 2. Active high logic input. VOA and VOB outputs are enabled when VE2 is high or disconnected. VOA and VOB outputs are disabled when VE2 is low. Logic Input D. Logic Input C. Logic Output B. Logic Output A. Ground 2. Ground reference for isolator Side 2. Supply Voltage for Isolator Side 2, 2.7 V to 5.5 V. 8 9 10 GND1 GND2 VE2 11 12 13 14 15 16 VID VIC VOB VOA GND2 VDD2 Rev. 0 | Page 17 of 24 ADUM2400/ADuM2401/ADuM2402 TYPICAL PERFORMANCE CHARACTERISTICS 20 80 70 15 60 CURRENT/CHANNEL (mA) CURRENT (mA) 50 40 30 20 10 5V 3V 10 5V 3V 5 05007-008 0 20 40 60 DATA RATE (Mbps) 80 100 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 8. Typical Input Supply Current per Channel vs. Data Rate for 5 V and 3 V Operation (No Output Load) 6 20 Figure 11. Typical ADUM2400 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation 5 15 CURRENT/CHANNEL (mA) 4 CURRENT (mA) 10 3 5V 2 3V 1 10 5V 3V 5 05007-009 0 20 40 60 DATA RATE (Mbps) 80 100 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 9. Typical Output Supply Current per Channel vs. Data Rate for 5 V and 3 V Operation (No Output Load) 10 50 30 8 Figure 12. Typical ADUM2400 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation CURRENT/CHANNEL (mA) 25 6 CURRENT (mA) 20 15 5V 10 4 5V 3V 2 3V 5 05007-010 0 20 40 60 DATA RATE (Mbps) 80 100 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 10. Typical Output Supply Current per Channel vs. Data Rate for 5 V and 3 V Operation (15 pF Output Load) Figure 13. Typical ADuM2401 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation Rev. 0 | Page 18 of 24 05007-013 0 0 05007-012 0 0 05007-011 0 0 ADUM2400/ADuM2401/ADuM2402 40 35 PROPAGATION DELAY (ns) 40 30 3V 35 CURRENT (mA) 25 20 5V 15 3V 10 5 05007-014 30 5V 0 20 40 60 DATA RATE (Mbps) 80 100 -25 0 25 50 TEMPERATURE (C) 75 100 Figure 14. Typical ADuM2401 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation 50 45 40 35 Figure 16. Propagation Delay vs. Temperature, C Grade CURRENT (mA) 30 25 20 5V 15 3V 10 5 05007-015 0 0 20 40 60 DATA RATE (Mbps) 80 100 Figure 15. Typical ADuM2402 VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation Rev. 0 | Page 19 of 24 05007-016 0 25 -50 ADUM2400/ADuM2401/ADuM2402 APPLICATION INFORMATION PC BOARD LAYOUT The ADuM240x digital isolator requires no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 17). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The capacitor value should be between 0.01 F and 0.1 F. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side are connected close to the package. VDD1 GND1 VIA VIB VIC/OC VID/OD VE1 GND1 VDD2 GND2 VOA VOB VOC/IC VOD/ID VE2 GND2 DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. The decoder is bistable and is therefore either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than 2 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than approximately 5 s, the input side is assumed to be without power or nonfunctional; in which case, the isolator output is forced to a default state (see Table 11) by the watchdog timer circuit. The limitation on the ADuM240x's magnetic field immunity is set by the condition in which induced voltage in the transformer's receiving coil is large enough to either falsely set or reset the decoder. The analysis below defines the conditions under which this may occur. The 3 V operating condition of the ADuM240x is examined as it represents the most susceptible mode of operation. The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at about 0.5 V, therefore establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is given by V = (-d/dt)rn2; n = 1, 2,..., N where: is the magnetic flux density (gauss). N is the number of turns in the receiving coil. rn is the radius of the nth turn in the receiving coil (cm). Given the geometry of the receiving coil in the ADuM240x and an imposed requirement that the induced voltage be at most 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 19. 100 50% Figure 17. Recommended Printed Circuit Board Layout In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. Furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the device's Absolute Maximum Ratings, thereby leading to latch-up or permanent damage. PROPAGATION DELAY-RELATED PARAMETERS Propagation delay is a parameter that describes the length of time it takes for a logic signal to propagate through a component. The propagation delay to a logic low output may differ from the propagation delay to logic high. INPUT (VIX) 50% tPLH OUTPUT (VOX) tPHL MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kgauss) 05007-020 05007-019 10 Figure 18. Propagation Delay Parameters Pulse-width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signal's timing is preserved. Channel-to-channel matching refers to the maximum amount the propagation delay differs among channels within a single ADuM240x component. Propagation delay skew refers to the maximum amount the propagation delay differs among multiple ADuM240x components operated under the same conditions. 1 0.1 0.01 1M 10k 100k 10M MAGNETIC FIELD FREQUENCY (Hz) 100M Figure 19. Maximum Allowable External Magnetic Flux Density Rev. 0 | Page 20 of 24 05007-021 0.001 1k ADUM2400/ADuM2401/ADuM2402 For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event were to occur during a transmitted pulse (and was of the worst-case polarity), it would reduce the received pulse from > 1.0 V to 0.75 V--still well above the 0.5 V sensing threshold of the decoder. The preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADuM240x transformers. Figure 20 expresses these allowable current magnitudes as a function of frequency for selected distances. As can be seen, the ADuM240x is extremely immune and can be affected only by extremely large currents operated at high frequency and very close to the component. For the 1 MHz example noted, one would have to place a 0.5 kA current 5 mm away from the ADuM240x to affect the component's operation. 1000 MAXIMUM ALLOWABLE CURRENT (kA) POWER CONSUMPTION The supply current at a given channel of the ADuM240x isolator is a function of the supply voltage, the channel's data rate, and the channel's output load. For each input channel, the supply current is given by: IDDI = IDDI (Q) IDDI = IDDI (D) x (2f - fr) + IDDI (Q) For each output channel, the supply current is given by: IDDO = IDDO (Q) -3 f 0.5fr f > 0.5fr f 0.5fr f > 0.5fr IDDO = (IDDO (D) + (0.5 x 10 x CLVDDO) x (2f - fr) + IDDO (Q) where: IDDI (D), IDDO (D) are the input and output dynamic supply currents per channel (mA/Mbps). CL is output load capacitance (pF). VDDO is the output supply voltage (V). DISTANCE = 1m 100 10 DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 f is the input logic signal frequency (MHz, half of the input data rate, NRZ signaling). fr is the input stage refresh rate (Mbps). IDDI (Q), IDDO (Q) are the specified input and output quiescent supply currents (mA). 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) Figure 20. Maximum Allowable Current for Various Current-to-ADuM240x Spacings Note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. 0 | Page 21 of 24 05007-022 0.01 To calculate the total IDD1 and IDD2 supply current, the supply currents for each input and output channel corresponding to IDD1 and IDD2 are calculated and totaled. Figure 8 and Figure 9 provide per-channel supply currents as a function of data rate for an unloaded output condition. Figure 10 provides perchannel supply current as a function of data rate for a 15 pF output condition. Figure 11 through Figure 14 provide total IDD1 and IDD2 supply current as a function of data rate for ADUM2400/ADuM2401/ADuM2402 channel configurations. ADUM2400/ADuM2401/ADuM2402 INSULATION LIFETIME All insulation structures, subjected to sufficient time and/or voltage, are vulnerable to breakdown. In addition to the testing performed by the regulatory agencies, ADI has carried out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM240x. These tests subjected populations of devices to continuous cross-isolation voltages. To accelerate the occurrence of failures, the selected test voltages were values exceeding those of normal use. The time to failure values of these units were recorded and used to calculate acceleration factors. These factors were then used to calculate the time to failure under normal operating conditions. The values shown in Table 10 are the lesser of the following two values: * The value that ensures at least a 50-year lifetime of continuous use. * The maximum CSA/VDE approved working voltage. It should also be noted that the lifetime of the ADuM240x varies according to the waveform type imposed across the isolation barrier. The iCoupler insulation structure is stressed differently depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 21, Figure 22, and Figure 23 illustrate the different isolation voltage waveforms. Rated Peak Voltage 0V 05007-021 Figure 21. Bipolar AC Waveform Rated Peak Voltage 05007-022 0V Figure 22. Unipolar AC Waveform Rated Peak Voltage 05007-023 0V Figure 23. DC Waveform Rev. 0 | Page 22 of 24 ADUM2400/ADuM2401/ADuM2402 OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 16 9 7.60 (0.2992) 7.40 (0.2913) 1 8 10.65 (0.4193) 10.00 (0.3937) 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 0.75 (0.0295) x 45 0.25 (0.0098) SEATING PLANE 8 0.33 (0.0130) 0 0.20 (0.0079) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 24. 16-Lead Standard Small Outline Package [SOIC] Wide Body (RW-16) Dimension shown in millimeters and (inches) ORDERING GUIDE Model ADUM2400ARWZ 2, 3 ADUM2400BRWZ2, 3 ADUM2400CRWZ2, 3 ADuM2401ARWZ2, 3 ADuM2401BRWZ2, 3 ADuM2401CRWZ2, 3 ADuM2402ARWZ2, 3 ADuM2402BRWZ2, 3 ADuM2402CRWZ2, 3 1 2 3 Number of Inputs, VDD1 Side 4 4 4 3 3 3 2 2 2 Number of Inputs, VDD2 Side 0 0 0 1 1 1 2 2 2 Maximum Data Rate (Mbps) 1 10 90 1 10 90 1 10 90 Maximum Propagation Delay, 5 V (ns) 100 50 32 100 50 32 100 50 32 Maximum Pulse-Width Distortion (ns) 40 3 2 40 3 2 40 3 2 Temperature Range -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C Package Option 1 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 = 16-lead wide body SOIC. Tape and reel is available. The addition of an -RL suffix designates a 13" (1,000 units) tape and reel option. Z = Pb-free part. Rev. 0 | Page 23 of 24 ADUM2400/ADuM2401/ADuM2402 NOTES (c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05007-0-9/05(0) T T Rev. 0 | Page 24 of 24 |
Price & Availability of ADUM2400
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